Re: [llvm-commits] [llvm] r44860 - /llvm/trunk/docs/LangRef.html
On Dec 11, 2007, at 10:45 PM, Chris Lattner wrote: @foo = internal global i32 0 addrspace(1) @foo = weak global i32 0 addrspace(1) @foo = linkonce global i32 0 addrspace(1) @foo = appending global i32 0 addrspace(1) @foo = dllexport global i32 0 addrspace(1) I prefer that too, but I don't see how you're going to get bison to accept "external global i32 addrspace(1)". The problem is placing the 'addrspace()' betwen the type name and the value of a 'ConstVal'. The pattern for external linkage global variables refers to 'Types' rather than 'ConstVal', so it works just fine. Please verify that the number of shift/reduce and reduce/reduce conflicts doesn't go up. They don't. Ok. It would still be nicer to get to: @foo = dllexport global i32 addrspace(1) 0 :) Yes. Bison ate its own head when I tried to do this though. Also there are nasty side affects of allowing addrspace() on types in ConstVals in the parser as it allows addrspace() then on types used in constant expressions. I think the current way really is best right now. -- Christopher Lamb ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44860 - /llvm/trunk/docs/LangRef.html
On Dec 12, 2007, at 12:16 AM, Christopher Lamb wrote: >>> >>> >>> They don't. >> >> Ok. It would still be nicer to get to: > @foo = dllexport global i32 addrspace(1) 0 >> >> :) > > Yes. Bison ate its own head when I tried to do this though. Also > there are nasty side affects of allowing addrspace() on types in > ConstVals in the parser as it allows addrspace() then on types used > in constant expressions. I think the current way really is best > right now. > ok -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [test-suite] r44931 - /test-suite/trunk/Makefile.programs
Author: evancheng Date: Wed Dec 12 02:05:40 2007 New Revision: 44931 URL: http://llvm.org/viewvc/llvm-project?rev=44931&view=rev Log: Test -optimize-ext-uses as x86 llcbeta. Modified: test-suite/trunk/Makefile.programs Modified: test-suite/trunk/Makefile.programs URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=44931&r1=44930&r2=44931&view=diff == --- test-suite/trunk/Makefile.programs (original) +++ test-suite/trunk/Makefile.programs Wed Dec 12 02:05:40 2007 @@ -233,7 +233,8 @@ LLCBETAOPTION := -enable-sparc-v9-insts endif ifeq ($(ARCH),ARM) -LLCBETAOPTION := -new-coalescer-heuristic=true +LLCBETAOPTION := -optimize-ext-uses +#-new-coalescer-heuristic=true #-disable-rematerialization #-march=thumb endif ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44933 - in /llvm/trunk: docs/LangRef.html include/llvm/Bitcode/LLVMBitCodes.h lib/AsmParser/llvmAsmParser.y lib/Bitcode/Writer/BitcodeWriter.cpp test/Assembler/2007-12-11-Addres
Author: clamb
Date: Wed Dec 12 02:44:39 2007
New Revision: 44933
URL: http://llvm.org/viewvc/llvm-project?rev=44933&view=rev
Log:
Implement part of review feedback for address spaces.
Modified:
llvm/trunk/docs/LangRef.html
llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h
llvm/trunk/lib/AsmParser/llvmAsmParser.y
llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
llvm/trunk/test/Assembler/2007-12-11-AddressSpaces.ll
Modified: llvm/trunk/docs/LangRef.html
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.html?rev=44933&r1=44932&r2=44933&view=diff
==
--- llvm/trunk/docs/LangRef.html (original)
+++ llvm/trunk/docs/LangRef.html Wed Dec 12 02:44:39 2007
@@ -671,7 +671,8 @@
A global variable may be declared to reside in a target-specifc numbered
address space. For targets that support them, address spaces may affect how
optimizations are performed and/or what target instructions are used to access
-the variable. The default address space is zero.
+the variable. The default address space is zero. The address space qualifier
+must precede any other attributes.
LLVM allows an explicit section to be specified for globals. If the target
supports it, it will emit globals to the section specified.
Modified: llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h?rev=44933&r1=44932&r2=44933&view=diff
==
--- llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h (original)
+++ llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h Wed Dec 12 02:44:39 2007
@@ -194,6 +194,7 @@
FUNC_CODE_INST_FREE= 18, // FREE: [opty, op]
FUNC_CODE_INST_ALLOCA = 19, // ALLOCA: [instty, op, align]
FUNC_CODE_INST_LOAD= 20, // LOAD: [opty, op, align, vol]
+// FIXME: Remove STORE in favor of STORE2 in LLVM 3.0
FUNC_CODE_INST_STORE = 21, // STORE: [valty,val,ptr, align, vol]
FUNC_CODE_INST_CALL= 22, // CALL: [attr, fnty, fnid, args...]
FUNC_CODE_INST_VAARG = 23, // VAARG: [valistty, valist, instty]
Modified: llvm/trunk/lib/AsmParser/llvmAsmParser.y
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/AsmParser/llvmAsmParser.y?rev=44933&r1=44932&r2=44933&view=diff
==
--- llvm/trunk/lib/AsmParser/llvmAsmParser.y (original)
+++ llvm/trunk/lib/AsmParser/llvmAsmParser.y Wed Dec 12 02:44:39 2007
@@ -1050,7 +1050,7 @@
%type GlobalName OptGlobalAssign GlobalAssign
%type OptSection SectionString OptGC
-%type OptAlign OptCAlign
+%type OptAlign OptCAlign OptAddrSpace
%token ZEROINITIALIZER TRUETOK FALSETOK BEGINTOK ENDTOK
%token DECLARE DEFINE GLOBAL CONSTANT SECTION ALIAS VOLATILE THREAD_LOCAL
@@ -1137,6 +1137,9 @@
LocalName : LOCALVAR | STRINGCONSTANT | PCTSTRINGCONSTANT ;
OptLocalName : LocalName | /*empty*/ { $$ = 0; };
+OptAddrSpace : ADDRSPACE '(' EUINT64VAL ')' { $$=$3; }
+ | /*empty*/{ $$=0; };
+
/// OptLocalAssign - Value producing statements have an optional assignment
/// component.
OptLocalAssign : LocalName '=' {
@@ -1316,17 +1319,10 @@
$$ = new PATypeHolder($1);
CHECK_FOR_ERROR
}
- | Types '*' { // Pointer type?
+ | Types OptAddrSpace '*' { // Pointer type?
if (*$1 == Type::LabelTy)
GEN_ERROR("Cannot form a pointer to a basic block");
-$$ = new PATypeHolder(HandleUpRefs(PointerType::get(*$1)));
-delete $1;
-CHECK_FOR_ERROR
- }
- | Types ADDRSPACE '(' EUINT64VAL ')' '*' { // Pointer type?
-if (*$1 == Type::LabelTy)
- GEN_ERROR("Cannot form a pointer to a basic block");
-$$ = new PATypeHolder(HandleUpRefs(PointerType::get(*$1, $4)));
+$$ = new PATypeHolder(HandleUpRefs(PointerType::get(*$1, $2)));
delete $1;
CHECK_FOR_ERROR
}
@@ -2073,41 +2069,31 @@
}
CHECK_FOR_ERROR
}
- | OptGlobalAssign GVVisibilityStyle ThreadLocal GlobalType ConstVal {
+ | OptGlobalAssign GVVisibilityStyle ThreadLocal GlobalType ConstVal
+OptAddrSpace {
/* "Externally Visible" Linkage */
if ($5 == 0)
GEN_ERROR("Global value initializer is not a constant");
CurGV = ParseGlobalVariable($1, GlobalValue::ExternalLinkage,
-$2, $4, $5->getType(), $5, $3);
-CHECK_FOR_ERROR
- } GlobalVarAttributes {
-CurGV = 0;
- }
- | OptGlobalAssign GVVisibilityStyle ThreadLocal GlobalType ConstVal
-ADDRSPACE '(' EUINT64VAL ')' {
-/* "Externally Visible" Linkage with address space qualifier */
-if ($5 == 0)
- GEN_ERROR("Global value initializer is not a constant");
-CurGV = ParseGlobalVariable($1, GlobalValue::ExternalLinkage,
-
Re: [llvm-commits] [llvm] r44858 - in /llvm/trunk: include/llvm/Bitcode/LLVMBitCodes.h include/llvm/DerivedTypes.h include/llvm/GlobalVariable.h include/llvm/Instructions.h lib/AsmParser/LLLexer.cpp l
On Dec 11, 2007, at 4:12 PM, Chris Lattner wrote: > Also, should it be possible to place a function in an address space? I think probably not... > Does the embedded C spec allow this? "A function type shall not be qualified by an address-space qualifier." I don't think this precludes the compiler from placing all functions in a non-default address space, however I'm not sure what that would get you other than a different way to handle function pointers. I assume you don't need address spaces to deal specially with function pointers in the back end. -- Christopher Lamb ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44877 - /llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
Hi Owen,
I know it's work in progress. But could you add some comments? I would
like to follow the code. :-)
Thx,
Evan
On Dec 11, 2007, at 12:12 PM, Owen Anderson <[EMAIL PROTECTED]> wrote:
> Author: resistor
> Date: Tue Dec 11 14:12:11 2007
> New Revision: 44877
>
> URL: http://llvm.org/viewvc/llvm-project?rev=44877&view=rev
> Log:
> More progress on StrongPHIElimination. Now we actually USE the
> DomForest!
>
> Modified:
>llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
>
> Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=44877&r1=44876&r2=44877&view=diff
>
> ===
> ===
> ===
> =
> --- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original)
> +++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Tue Dec 11
> 14:12:11 2007
> @@ -97,6 +97,9 @@
> void processBlock(MachineBasicBlock* MBB);
>
> std::vector computeDomForest(std::set&
> instrs);
> +void processPHIUnion(MachineInstr* Inst,
> + std::set& PHIUnion,
> +
> std::vector& DF);
> void breakCriticalEdges(MachineFunction &Fn);
>
> };
> @@ -303,6 +306,92 @@
> }
> }
>
> +void StrongPHIElimination::processPHIUnion(MachineInstr* Inst,
> + std::set&
> PHIUnion,
> +
> std::vector& DF) {
> +
> + std::vector worklist(DF.begin(), DF.end());
> + SmallPtrSet visited;
> +
> + LiveVariables& LV = getAnalysis();
> + unsigned DestReg = Inst->getOperand(0).getReg();
> +
> + while (!worklist.empty()) {
> +DomForestNode* DFNode = worklist.back();
> +
> +LiveVariables::VarInfo& Info = LV.getVarInfo(DFNode->getReg());
> +visited.insert(DFNode);
> +
> +bool inserted = false;
> +SmallPtrSet interferences;
> +for (DomForestNode::iterator CI = DFNode->begin(), CE = DFNode-
> >end();
> + CI != CE; ++CI) {
> + DomForestNode* child = *CI;
> + LiveVariables::VarInfo& CInfo = LV.getVarInfo(child->getReg());
> +
> + if (isLiveOut(Info, CInfo.DefInst->getParent())) {
> +interferences.insert(child);
> + } else if (isLiveIn(Info, CInfo.DefInst->getParent()) ||
> + Info.DefInst->getParent() == CInfo.DefInst-
> >getParent()) {
> +// FIXME: Add (p, c) to possible local interferences
> + }
> +
> + if (!visited.count(child)) {
> +worklist.push_back(child);
> +inserted = true;
> + }
> +}
> +
> +if (interferences.size() == 1) {
> + DomForestNode* child = *interferences.begin();
> +
> + unsigned numParentCopies = 0;
> + unsigned numChildCopies = 0;
> + for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
> +unsigned SrcReg = Inst->getOperand(i-1).getReg();
> +if (SrcReg == DFNode->getReg()) numParentCopies++;
> +else if (SrcReg == child->getReg()) numChildCopies++;
> + }
> +
> + if (numParentCopies < numChildCopies) {
> +// Insert copies for child
> +for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
> + if (Inst->getOperand(i-1).getReg() == child->getReg()) {
> +unsigned SrcReg = Inst->getOperand(i-1).getReg();
> +MachineBasicBlock* From = Inst->getOperand(i).getMBB();
> +
> +Waiting[From].push_back(std::make_pair(SrcReg, DestReg));
> + }
> +}
> +
> +// FIXME: Make child's children parent's children
> + } else {
> +// Insert copies for parent
> +for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
> + if (Inst->getOperand(i-1).getReg() == DFNode->getReg()) {
> +unsigned SrcReg = Inst->getOperand(i-1).getReg();
> +MachineBasicBlock* From = Inst->getOperand(i).getMBB();
> +
> +Waiting[From].push_back(std::make_pair(SrcReg, DestReg));
> + }
> +}
> + }
> +} else if (interferences.size() > 1) {
> + // Insert copies for parent
> + for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
> +if (Inst->getOperand(i-1).getReg() == DFNode->getReg()) {
> + unsigned SrcReg = Inst->getOperand(i-1).getReg();
> + MachineBasicBlock* From = Inst->getOperand(i).getMBB();
> +
> + Waiting[From].push_back(std::make_pair(SrcReg, DestReg));
> +}
> + }
> +}
> +
> +if (!inserted) worklist.pop_back();
> + }
> +}
> +
> /// breakCriticalEdges - Break critical edges coming into blocks
> with PHI
> /// nodes, preserving dominator and livevariable info.
> void StrongPHIElimination::breakCriticalEdges(MachineFunction &Fn) {
>
>
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Re: [llvm-commits] [llvm] r44874 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
On Dec 11, 2007, at 11:40 AM, Bill Wendling <[EMAIL PROTECTED]> wrote:
> Author: void
> Date: Tue Dec 11 13:40:06 2007
> New Revision: 44874
>
> URL: http://llvm.org/viewvc/llvm-project?rev=44874&view=rev
> Log:
> Blark! How in the world did this work without this?!
Is this just cosmetic changes? I am sure I see why this is better?
Just curious.
One thing that is some what annoying to me is if LICM is after live
variables then it won't need to compute vreg def info or liveness
info. I wonder if it is possible to move the pass after live variables?
Evan
> Modified:
>llvm/trunk/lib/CodeGen/MachineLICM.cpp
>
> Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=44874&r1=44873&r2=44874&view=diff
>
> ===
> ===
> ===
> =
> --- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Dec 11 13:40:06 2007
> @@ -43,6 +43,8 @@
>
> namespace {
> class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass {
> +MachineFunction *CurMF;// Current MachineFunction
> +
> // Various analyses that we use...
> MachineLoopInfo *LI; // Current MachineLoopInfo
> MachineDominatorTree *DT; // Machine dominator tree for the
> current Loop
> @@ -91,7 +93,7 @@
> /// MapVirtualRegisterDefs - Create a map of which machine
> instruction
> /// defines a virtual register.
> ///
> -void MapVirtualRegisterDefs(const MachineFunction &MF);
> +void MapVirtualRegisterDefs();
>
> /// IsInSubLoop - A little predicate that returns true if the
> specified
> /// basic block is in a subloop of the current one, not the
> current one
> @@ -182,12 +184,15 @@
> if (!PerformLICM) return false; // For debugging.
>
> Changed = false;
> - TII = MF.getTarget().getInstrInfo();
> + CurMF = &MF;
> + TII = CurMF->getTarget().getInstrInfo();
>
> // Get our Loop information...
> LI = &getAnalysis();
> DT = &getAnalysis();
>
> + MapVirtualRegisterDefs();
> +
> for (MachineLoopInfo::iterator
> I = LI->begin(), E = LI->end(); I != E; ++I) {
> MachineLoop *L = *I;
> @@ -205,9 +210,9 @@
> /// MapVirtualRegisterDefs - Create a map of which machine
> instruction defines a
> /// virtual register.
> ///
> -void MachineLICM::MapVirtualRegisterDefs(const MachineFunction &MF) {
> +void MachineLICM::MapVirtualRegisterDefs() {
> for (MachineFunction::const_iterator
> - I = MF.begin(), E = MF.end(); I != E; ++I) {
> + I = CurMF->begin(), E = CurMF->end(); I != E; ++I) {
> const MachineBasicBlock &MBB = *I;
>
> for (MachineBasicBlock::const_iterator
>
>
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Re: [llvm-commits] [llvm] r44858 - in /llvm/trunk: include/llvm/Bitcode/LLVMBitCodes.h include/llvm/DerivedTypes.h include/llvm/GlobalVariable.h include/llvm/Instructions.h lib/AsmParser/LLLexer.cpp l
On Dec 11, 2007, at 4:12 PM, Chris Lattner wrote: Making the address space default to zero is convenient, but dangerous. This means that xforms that play with pointers need to be very careful to propagate this info in some cases. Do you think this is the best way to go? Do many clients of PointerType::get need to be aware of addr spaces? I'm going to add a new method for getting a pointer type 'PointerType::getUnqual()' that only takes an element type, the standard 'PointerType::get()' will take both an element type and address space with no default values. This should at least make it explicit in the code which clients do not pass in an address space. There are currently many clients, so this should help make the work incremental. -- Christopher Lamb ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r44935 - /llvm-gcc-4.2/trunk/gcc/passes.c
Author: baldrick Date: Wed Dec 12 09:11:38 2007 New Revision: 44935 URL: http://llvm.org/viewvc/llvm-project?rev=44935&view=rev Log: Turn off ipa-pure-const, the pass that deduces whether functions are pure and constant: it makes wrong deductions because it doesn't know about LLVM's array_ref hack. At some point we should turn of all of the ipa passes, however the gcc inlining pass knows how to deal with exception handlers much better than we do, so leave that on for the moment. Modified: llvm-gcc-4.2/trunk/gcc/passes.c Modified: llvm-gcc-4.2/trunk/gcc/passes.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/passes.c?rev=44935&r1=44934&r2=44935&view=diff == --- llvm-gcc-4.2/trunk/gcc/passes.c (original) +++ llvm-gcc-4.2/trunk/gcc/passes.c Wed Dec 12 09:11:38 2007 @@ -485,10 +485,14 @@ NEXT_PASS (pass_early_local_passes); NEXT_PASS (pass_ipa_cp); NEXT_PASS (pass_ipa_inline); +/* LLVM LOCAL begin */ +#ifndef ENABLE_LLVM NEXT_PASS (pass_ipa_reference); NEXT_PASS (pass_ipa_pure_const); NEXT_PASS (pass_ipa_type_escape); NEXT_PASS (pass_ipa_pta); +#endif +/* LLVM LOCAL end */ *p = NULL; /* All passes needed to lower the function into shape optimizers can ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44936 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/2007-12-12-GEPScale.ll
Author: wmat
Date: Wed Dec 12 09:21:32 2007
New Revision: 44936
URL: http://llvm.org/viewvc/llvm-project?rev=44936&view=rev
Log:
1. "Upgrage" comments.
2. Using zero-extended value of Scale and unsigned division is safe provided
that Scale doesn't have the sign bit set.
Previously these 2 instructions:
%p = bitcast [100 x {i8,i8,i8}]* %x to i8*
%q = getelementptr i8* %p, i32 -4
were combined into:
%q = getelementptr [100 x { i8, i8, i8 }]* %x, i32 0,
i32 1431655764, i32 0
what was incorrect.
Added:
llvm/trunk/test/Transforms/InstCombine/2007-12-12-GEPScale.ll
Modified:
llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=44936&r1=44935&r2=44936&view=diff
==
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Wed Dec 12
09:21:32 2007
@@ -8879,8 +8879,8 @@
if (!isa(X->getType())) {
// Not interesting. Source pointer must be a cast from pointer.
} else if (HasZeroPointerIndex) {
- // transform: GEP (cast [10 x ubyte]* X to [0 x ubyte]*), long 0, ...
- // into : GEP [10 x ubyte]* X, long 0, ...
+ // transform: GEP (bitcast [10 x i8]* X to [0 x i8]*), i32 0, ...
+ // into : GEP [10 x i8]* X, i32 0, ...
//
// This occurs when the program declares an array extern like "int X[];"
//
@@ -8900,8 +8900,8 @@
}
} else if (GEP.getNumOperands() == 2) {
// Transform things like:
- // %t = getelementptr ubyte* cast ([2 x int]* %str to uint*), uint %V
- // into: %t1 = getelementptr [2 x int*]* %str, int 0, uint %V; cast
+ // %t = getelementptr i32* bitcast ([2 x i32]* %str to i32*), i32 %V
+ // into: %t1 = getelementptr [2 x i32]* %str, i32 0, i32 %V; bitcast
const Type *SrcElTy = cast(X->getType())->getElementType();
const Type
*ResElTy=cast(PtrOp->getType())->getElementType();
if (isa(SrcElTy) &&
@@ -8917,12 +8917,11 @@
}
// Transform things like:
- // getelementptr sbyte* cast ([100 x double]* X to sbyte*), int %tmp
+ // getelementptr i8* bitcast ([100 x double]* X to i8*), i32 %tmp
// (where tmp = 8*tmp2) into:
- // getelementptr [100 x double]* %arr, int 0, int %tmp.2
+ // getelementptr [100 x double]* %arr, i32 0, i32 %tmp2; bitcast
- if (isa(SrcElTy) &&
- (ResElTy == Type::Int8Ty || ResElTy == Type::Int8Ty)) {
+ if (isa(SrcElTy) && ResElTy == Type::Int8Ty) {
uint64_t ArrayEltSize =
TD->getABITypeSize(cast(SrcElTy)->getElementType());
@@ -8949,16 +8948,18 @@
NewIdx = Inst->getOperand(0);
}
}
-
+
// If the index will be to exactly the right offset with the scale
taken
-// out, perform the transformation.
-if (Scale && Scale->getZExtValue() % ArrayEltSize == 0) {
- if (isa(Scale))
-Scale = ConstantInt::get(Scale->getType(),
- Scale->getZExtValue() / ArrayEltSize);
+// out, perform the transformation. Note, we don't know whether Scale
is
+// signed or not. We'll use unsigned version of division/modulo
+// operation after making sure Scale doesn't have the sign bit set.
+if (Scale && Scale->getSExtValue() >= 0LL &&
+Scale->getZExtValue() % ArrayEltSize == 0) {
+ Scale = ConstantInt::get(Scale->getType(),
+ Scale->getZExtValue() / ArrayEltSize);
if (Scale->getZExtValue() != 1) {
Constant *C = ConstantExpr::getIntegerCast(Scale,
NewIdx->getType(),
- true /*SExt*/);
+ false /*ZExt*/);
Instruction *Sc = BinaryOperator::createMul(NewIdx, C, "idxscale");
NewIdx = InsertNewInstBefore(Sc, GEP);
}
Added: llvm/trunk/test/Transforms/InstCombine/2007-12-12-GEPScale.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2007-12-12-GEPScale.ll?rev=44936&view=auto
==
--- llvm/trunk/test/Transforms/InstCombine/2007-12-12-GEPScale.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2007-12-12-GEPScale.ll Wed Dec 12
09:21:32 2007
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep 1431655764
+
+target datalayout =
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+
+define i8* @foo([100 x {i8,i8,i8}]* %x) {
+entry:
+%p
[llvm-commits] [llvm] r44937 - in /llvm/trunk/lib: Analysis/AliasAnalysis.cpp VMCore/Instruction.cpp
Author: baldrick
Date: Wed Dec 12 10:01:40 2007
New Revision: 44937
URL: http://llvm.org/viewvc/llvm-project?rev=44937&view=rev
Log:
Revert r44626, which turned off the use of readonly
and readnone for functions with bodies because it
broke llvm-gcc-4.2 bootstrap. It turns out that,
because of LLVM's array_ref hack, gcc was computing
pure/const attributes wrong (now fixed by turning
off the gcc ipa-pure-const pass).
Modified:
llvm/trunk/lib/Analysis/AliasAnalysis.cpp
llvm/trunk/lib/VMCore/Instruction.cpp
Modified: llvm/trunk/lib/Analysis/AliasAnalysis.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/AliasAnalysis.cpp?rev=44937&r1=44936&r2=44937&view=diff
==
--- llvm/trunk/lib/Analysis/AliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/AliasAnalysis.cpp Wed Dec 12 10:01:40 2007
@@ -116,17 +116,13 @@
AliasAnalysis::ModRefBehavior
AliasAnalysis::getModRefBehavior(CallSite CS,
std::vector *Info) {
- if (CS.doesNotAccessMemory() &&
- // FIXME: workaround gcc bootstrap breakage
- CS.getCalledFunction() && CS.getCalledFunction()->isDeclaration())
+ if (CS.doesNotAccessMemory())
// Can't do better than this.
return DoesNotAccessMemory;
ModRefBehavior MRB = UnknownModRefBehavior;
if (Function *F = CS.getCalledFunction())
MRB = getModRefBehavior(F, CS, Info);
- if (MRB != DoesNotAccessMemory && CS.onlyReadsMemory() &&
- // FIXME: workaround gcc bootstrap breakage
- CS.getCalledFunction() && CS.getCalledFunction()->isDeclaration())
+ if (MRB != DoesNotAccessMemory && CS.onlyReadsMemory())
return OnlyReadsMemory;
return MRB;
}
@@ -134,15 +130,11 @@
AliasAnalysis::ModRefBehavior
AliasAnalysis::getModRefBehavior(Function *F,
std::vector *Info) {
- if (F->doesNotAccessMemory() &&
- // FIXME: workaround gcc bootstrap breakage
- F->isDeclaration())
+ if (F->doesNotAccessMemory())
// Can't do better than this.
return DoesNotAccessMemory;
ModRefBehavior MRB = getModRefBehavior(F, CallSite(), Info);
- if (MRB != DoesNotAccessMemory && F->onlyReadsMemory() &&
- // FIXME: workaround gcc bootstrap breakage
- F->isDeclaration())
+ if (MRB != DoesNotAccessMemory && F->onlyReadsMemory())
return OnlyReadsMemory;
return MRB;
}
Modified: llvm/trunk/lib/VMCore/Instruction.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instruction.cpp?rev=44937&r1=44936&r2=44937&view=diff
==
--- llvm/trunk/lib/VMCore/Instruction.cpp (original)
+++ llvm/trunk/lib/VMCore/Instruction.cpp Wed Dec 12 10:01:40 2007
@@ -13,7 +13,6 @@
#include "llvm/Type.h"
#include "llvm/Instructions.h"
-#include "llvm/IntrinsicInst.h" // FIXME: remove
#include "llvm/Function.h"
#include "llvm/Support/CallSite.h"
#include "llvm/Support/LeakDetector.h"
@@ -209,8 +208,6 @@
case Instruction::VAArg:
return true;
case Instruction::Call:
-if (!isa(this))
- return true; // FIXME: workaround gcc bootstrap breakage
return !cast(this)->onlyReadsMemory();
case Instruction::Load:
return cast(this)->isVolatile();
___
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Re: [llvm-commits] [llvm] r44858 - in /llvm/trunk: include/llvm/Bitcode/LLVMBitCodes.h include/llvm/DerivedTypes.h include/llvm/GlobalVariable.h include/llvm/Instructions.h lib/AsmParser/LLLexer.cpp l
On Dec 12, 2007, at 12:39 AM, Christopher Lamb wrote: > > On Dec 11, 2007, at 4:12 PM, Chris Lattner wrote: > >> Also, should it be possible to place a function in an address space? > > I think probably not... > >> Does the embedded C spec allow this? > > "A function type shall not be qualified by an address-space > qualifier." Ok, sounds great to me. Simple is good. -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44874 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
On Dec 12, 2007, at 1:38 AM, Evan Cheng wrote: > > > On Dec 11, 2007, at 11:40 AM, Bill Wendling <[EMAIL PROTECTED]> > wrote: > >> Author: void >> Date: Tue Dec 11 13:40:06 2007 >> New Revision: 44874 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=44874&view=rev >> Log: >> Blark! How in the world did this work without this?! > > One thing that is some what annoying to me is if LICM is after live > variables then it won't need to compute vreg def info or liveness > info. I wonder if it is possible to move the pass after live > variables? What would this give? liveness for vregs is trivial in ssa form, no? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44952 - /llvm/trunk/include/llvm/ADT/Trie.h
Author: asl
Date: Wed Dec 12 13:08:44 2007
New Revision: 44952
URL: http://llvm.org/viewvc/llvm-project?rev=44952&view=rev
Log:
Use vector for child storage instead of map. This will also make
our life during future GraphTraits'ing slightly easier.
Modified:
llvm/trunk/include/llvm/ADT/Trie.h
Modified: llvm/trunk/include/llvm/ADT/Trie.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Trie.h?rev=44952&r1=44951&r2=44952&view=diff
==
--- llvm/trunk/include/llvm/ADT/Trie.h (original)
+++ llvm/trunk/include/llvm/ADT/Trie.h Wed Dec 12 13:08:44 2007
@@ -22,7 +22,6 @@
// FIXME:
// - Labels are usually small, maybe it's better to use SmallString
-// - Something efficient for child storage
// - Should we use char* during construction?
// - Should we templatize Empty with traits-like interface?
// - GraphTraits interface
@@ -39,10 +38,21 @@
DontMatch = 0,
HaveCommonPart
} QueryResult;
+typedef std::vector NodeVector;
+typedef typename std::vector::iterator NodeVectorIter;
+
+struct NodeCmp {
+ bool operator() (Node* N1, Node* N2) {
+return (N1->Label[0] < N2->Label[0]);
+ }
+ bool operator() (Node* N, char Id) {
+return (N->Label[0] < Id);
+ }
+};
std::string Label;
Payload Data;
-std::map Children;
+NodeVector Children;
public:
inline explicit Node(const Payload& data, const std::string& label = ""):
Label(label), Data(data) { }
@@ -70,9 +80,44 @@
inline void setLabel(const std::string& label) { Label = label; }
inline const std::string& getLabel() const { return Label; }
-inline bool addEdge(Node* N) {
- const std::string& Label = N->getLabel();
- return Children.insert(std::make_pair(Label[0], N)).second;
+#if 0
+inline void dump() {
+ std::cerr << "Node: " << this << "\n"
+<< "Label: " << Label << "\n"
+<< "Children:\n";
+
+ for (NodeVectorIter I = Children.begin(), E = Children.end(); I != E;
++I)
+std::cerr << (*I)->Label << "\n";
+}
+#endif
+
+inline void addEdge(Node* N) {
+ if (Children.empty())
+Children.push_back(N);
+ else {
+NodeVectorIter I = std::lower_bound(Children.begin(), Children.end(),
+N, NodeCmp());
+// FIXME: no dups are allowed
+Children.insert(I, N);
+ }
+}
+
+inline Node* getEdge(char Id) {
+ Node* fNode = NULL;
+ NodeVectorIter I = std::lower_bound(Children.begin(), Children.end(),
+ Id, NodeCmp());
+ if (I != Children.end() && (*I)->Label[0] == Id)
+fNode = *I;
+
+ return fNode;
+}
+
+inline void setEdge(Node* N) {
+ char Id = N->Label[0];
+ NodeVectorIter I = std::lower_bound(Children.begin(), Children.end(),
+ Id, NodeCmp());
+ assert(I != Children.end() && "Node does not exists!");
+ *I = N;
}
QueryResult query(const std::string& s) const {
@@ -101,6 +146,8 @@
std::vector Nodes;
Payload Empty;
+ inline Node* getRoot() const { return Nodes[0]; }
+
inline Node* addNode(const Payload& data, const std::string label = "") {
Node* N = new Node(data, label);
Nodes.push_back(N);
@@ -108,21 +155,19 @@
}
inline Node* splitEdge(Node* N, char Id, size_t index) {
-assert(N->Children.count(Id) && "Node doesn't exist");
-
-Node* eNode = N->Children[Id];
+Node* eNode = N->getEdge(Id);
+assert(eNode && "Node doesn't exist");
const std::string &l = eNode->Label;
assert(index > 0 && index < l.length() && "Trying to split too far!");
std::string l1 = l.substr(0, index);
std::string l2 = l.substr(index);
-eNode->Label = l2;
-
Node* nNode = addNode(Empty, l1);
-nNode->addEdge(eNode);
+N->setEdge(nNode);
-N->Children[Id] = nNode;
+eNode->Label = l2;
+nNode->addEdge(eNode);
return nNode;
}
@@ -136,8 +181,6 @@
delete Nodes[i];
}
- inline Node* getRoot() const { return Nodes[0]; }
-
bool addString(const std::string& s, const Payload& data) {
Node* cNode = getRoot();
Node* tNode = NULL;
@@ -145,8 +188,7 @@
while (tNode == NULL) {
char Id = s1[0];
- if (cNode->Children.count(Id)) {
-Node* nNode = cNode->Children[Id];
+ if (Node* nNode = cNode->getEdge(Id)) {
typename Node::QueryResult r = nNode->query(s1);
switch (r) {
@@ -167,7 +209,7 @@
nNode = splitEdge(cNode, Id, r);
tNode = addNode(data, s1.substr(r));
nNode->addEdge(tNode);
-}
+ }
} else {
tNode = addNode(data, s1);
cNode->addEdge(tNode);
@@ -183,8 +225,8 @@
std::string s1(s);
while (tNode == NULL) {
- if (cNode->Children.count(s1[0])
Re: [llvm-commits] [llvm] r44858 - in /llvm/trunk: include/llvm/Bitcode/LLVMBitCodes.h include/llvm/DerivedTypes.h include/llvm/GlobalVariable.h include/llvm/Instructions.h lib/AsmParser/LLLexer.cpp l
On Dec 12, 2007, at 1:32 AM, Christopher Lamb wrote: > > On Dec 11, 2007, at 4:12 PM, Chris Lattner wrote: > >> Making the address space default to zero is convenient, but >> dangerous. This means that xforms that play with pointers need to be >> very careful to propagate this info in some cases. Do you think this >> is the best way to go? Do many clients of PointerType::get need to >> be aware of addr spaces? > > I'm going to add a new method for getting a pointer type > 'PointerType::getUnqual()' that only takes an element type, the > standard 'PointerType::get()' will take both an element type and > address space with no default values. This should at least make it > explicit in the code which clients do not pass in an address space. > There are currently many clients, so this should help make the work > incremental. Excellent idea, -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44933 - in /llvm/trunk: docs/LangRef.html include/llvm/Bitcode/LLVMBitCodes.h lib/AsmParser/llvmAsmParser.y lib/Bitcode/Writer/BitcodeWriter.cpp test/Assembler/2007-12-11-Ad
> URL: http://llvm.org/viewvc/llvm-project?rev=44933&view=rev > Log: > Implement part of review feedback for address spaces. Also, please update the alloca/malloc descriptions to say that the pointer has to be in the default address space, and plz make the verifier check this. Thanks! -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44874 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
On Dec 12, 2007 1:38 AM, Evan Cheng <[EMAIL PROTECTED]> wrote: > > > On Dec 11, 2007, at 11:40 AM, Bill Wendling <[EMAIL PROTECTED]> wrote: > > > Author: void > > Date: Tue Dec 11 13:40:06 2007 > > New Revision: 44874 > > > > URL: http://llvm.org/viewvc/llvm-project?rev=44874&view=rev > > Log: > > Blark! How in the world did this work without this?! > > Is this just cosmetic changes? I am sure I see why this is better? > Just curious. > This is the part of the patch that has the "real" change. The rest are cosmetic. // Get our Loop information... LI = &getAnalysis(); DT = &getAnalysis(); + MapVirtualRegisterDefs(); + > One thing that is some what annoying to me is if LICM is after live > variables then it won't need to compute vreg def info or liveness > info. I wonder if it is possible to move the pass after live variables? > I'm sure I could move it, but as Chris asked, isn't it trivial to get this information anyway? Also, I'm kind of hesitant to put so much effort into compile-time performance issues when it doesn't even have partial (let alone full) functionality right now. We don't know what impact any of those optimizations have or if they are necessary yet. :-) -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44874 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
On Dec 12, 2007, at 11:12 AM, Bill Wendling wrote: > >> One thing that is some what annoying to me is if LICM is after live >> variables then it won't need to compute vreg def info or liveness >> info. I wonder if it is possible to move the pass after live >> variables? >> > I'm sure I could move it, but as Chris asked, isn't it trivial to get > this information anyway? Also, I'm kind of hesitant to put so much > effort into compile-time performance issues when it doesn't even have > partial (let alone full) functionality right now. We don't know what > impact any of those optimizations have or if they are necessary yet. > :-) It's something to keep in mind. Not critical right now if we are not hoisting anything with implicit defs / uses. If we are keeping LICM before livevariables, we will have to compute liveness in the BB's where the invariants are hoisted to. Now that I think about it, we *cannot* use the register scavenger to do this because it also depends on kill / dead markers on the operands. The scavenger's job is not to add the kill / dead markers, it is to track what registers are live at any point of the BB. This means you'll have to walk the BB and track all physical register defs and uses in the BB. Evan > > -bw > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44874 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
On Dec 12, 2007, at 9:59 AM, Chris Lattner wrote: > > On Dec 12, 2007, at 1:38 AM, Evan Cheng wrote: > >> >> >> On Dec 11, 2007, at 11:40 AM, Bill Wendling <[EMAIL PROTECTED]> >> wrote: >> >>> Author: void >>> Date: Tue Dec 11 13:40:06 2007 >>> New Revision: 44874 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=44874&view=rev >>> Log: >>> Blark! How in the world did this work without this?! >> >> One thing that is some what annoying to me is if LICM is after live >> variables then it won't need to compute vreg def info or liveness >> info. I wonder if it is possible to move the pass after live >> variables? > > What would this give? liveness for vregs is trivial in ssa form, no? But not physical registers. Evan > > -Chris > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44874 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
vreg definition info is trivial but there is no reverse link from vreg to defining MachineInstruction. That's what MachineLICM::MapVirtualRegisterDefs() is constructing. Evan On Dec 12, 2007, at 11:59 AM, Evan Cheng wrote: > > On Dec 12, 2007, at 9:59 AM, Chris Lattner wrote: > >> >> On Dec 12, 2007, at 1:38 AM, Evan Cheng wrote: >> >>> >>> >>> On Dec 11, 2007, at 11:40 AM, Bill Wendling <[EMAIL PROTECTED]> >>> wrote: >>> Author: void Date: Tue Dec 11 13:40:06 2007 New Revision: 44874 URL: http://llvm.org/viewvc/llvm-project?rev=44874&view=rev Log: Blark! How in the world did this work without this?! >>> >>> One thing that is some what annoying to me is if LICM is after live >>> variables then it won't need to compute vreg def info or liveness >>> info. I wonder if it is possible to move the pass after live >>> variables? >> >> What would this give? liveness for vregs is trivial in ssa form, no? > > But not physical registers. > > Evan > >> >> -Chris >> ___ >> llvm-commits mailing list >> llvm-commits@cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44874 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
On Dec 12, 2007 11:32 AM, Evan Cheng <[EMAIL PROTECTED]> wrote: > On Dec 12, 2007, at 11:12 AM, Bill Wendling wrote: > > I'm sure I could move it, but as Chris asked, isn't it trivial to get > > this information anyway? Also, I'm kind of hesitant to put so much > > effort into compile-time performance issues when it doesn't even have > > partial (let alone full) functionality right now. We don't know what > > impact any of those optimizations have or if they are necessary yet. > > :-) > > It's something to keep in mind. Not critical right now if we are not > hoisting anything with implicit defs / uses. > Sounds good. :-) > If we are keeping LICM before livevariables, we will have to compute > liveness in the BB's where the invariants are hoisted to. Now that I > think about it, we *cannot* use the register scavenger to do this > because it also depends on kill / dead markers on the operands. The > scavenger's job is not to add the kill / dead markers, it is to track > what registers are live at any point of the BB. This means you'll > have to walk the BB and track all physical register defs and uses in > the BB. > I see. Okay, so by the time I get to the point where I'm moving instructions that access physical registers, I should have the pass after LiveVariables... -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44954 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/vec_ctbits.ll
Author: djg
Date: Wed Dec 12 16:21:26 2007
New Revision: 44954
URL: http://llvm.org/viewvc/llvm-project?rev=44954&view=rev
Log:
Allow vector integer constants to be created with
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.
Added:
llvm/trunk/test/CodeGen/X86/vec_ctbits.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=44954&r1=44953&r2=44954&view=diff
==
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Dec 12 16:21:26
2007
@@ -687,22 +687,35 @@
SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT, bool isT)
{
assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
- assert(!MVT::isVector(VT) && "Cannot create Vector ConstantSDNodes!");
+
+ MVT::ValueType EltVT =
+MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
// Mask out any bits that are not valid for this constant.
- Val &= MVT::getIntVTBitMask(VT);
+ Val &= MVT::getIntVTBitMask(EltVT);
unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
FoldingSetNodeID ID;
- AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
+ AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
ID.AddInteger(Val);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
-return SDOperand(E, 0);
- SDNode *N = new ConstantSDNode(isT, Val, VT);
- CSEMap.InsertNode(N, IP);
- AllNodes.push_back(N);
- return SDOperand(N, 0);
+ SDNode *N = NULL;
+ if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
+if (!MVT::isVector(VT))
+ return SDOperand(N, 0);
+ if (!N) {
+N = new ConstantSDNode(isT, Val, EltVT);
+CSEMap.InsertNode(N, IP);
+AllNodes.push_back(N);
+ }
+
+ SDOperand Result(N, 0);
+ if (MVT::isVector(VT)) {
+SmallVector Ops;
+Ops.assign(MVT::getVectorNumElements(VT), Result);
+Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
+ }
+ return Result;
}
SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT::ValueType VT,
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=44954&r1=44953&r2=44954&view=diff
==
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Dec 12 16:21:26 2007
@@ -483,6 +483,12 @@
setOperationAction(ISD::CTPOP, (MVT::ValueType)VT, Expand);
setOperationAction(ISD::CTTZ, (MVT::ValueType)VT, Expand);
setOperationAction(ISD::CTLZ, (MVT::ValueType)VT, Expand);
+setOperationAction(ISD::SHL, (MVT::ValueType)VT, Expand);
+setOperationAction(ISD::SRA, (MVT::ValueType)VT, Expand);
+setOperationAction(ISD::SRL, (MVT::ValueType)VT, Expand);
+setOperationAction(ISD::ROTL, (MVT::ValueType)VT, Expand);
+setOperationAction(ISD::ROTR, (MVT::ValueType)VT, Expand);
+setOperationAction(ISD::BSWAP, (MVT::ValueType)VT, Expand);
}
if (Subtarget->hasMMX()) {
Added: llvm/trunk/test/CodeGen/X86/vec_ctbits.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_ctbits.ll?rev=44954&view=auto
==
--- llvm/trunk/test/CodeGen/X86/vec_ctbits.ll (added)
+++ llvm/trunk/test/CodeGen/X86/vec_ctbits.ll Wed Dec 12 16:21:26 2007
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -march=x86-64
+
+declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>)
+declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>)
+declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
+
+define <2 x i64> @footz(<2 x i64> %a) {
+ %c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a)
+ ret <2 x i64> %c
+}
+define <2 x i64> @foolz(<2 x i64> %a) {
+ %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a)
+ ret <2 x i64> %c
+}
+define <2 x i64> @foopop(<2 x i64> %a) {
+ %c = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %a)
+ ret <2 x i64> %c
+}
___
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[llvm-commits] [llvm] r44955 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h
Author: djg Date: Wed Dec 12 16:25:09 2007 New Revision: 44955 URL: http://llvm.org/viewvc/llvm-project?rev=44955&view=rev Log: Remove a forward-declaration for a non-existant class. Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=44955&r1=44954&r2=44955&view=diff == --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original) +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Wed Dec 12 16:25:09 2007 @@ -24,7 +24,6 @@ class MachineInstr; class TargetMachine; -class MachineCodeForInstruction; class TargetRegisterClass; class LiveVariables; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44874 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp
On Dec 12, 2007, at 2:02 PM, Bill Wendling wrote: > On Dec 12, 2007 11:32 AM, Evan Cheng <[EMAIL PROTECTED]> wrote: >> On Dec 12, 2007, at 11:12 AM, Bill Wendling wrote: >>> I'm sure I could move it, but as Chris asked, isn't it trivial to >>> get >>> this information anyway? Also, I'm kind of hesitant to put so much >>> effort into compile-time performance issues when it doesn't even >>> have >>> partial (let alone full) functionality right now. We don't know what >>> impact any of those optimizations have or if they are necessary yet. >>> :-) >> >> It's something to keep in mind. Not critical right now if we are not >> hoisting anything with implicit defs / uses. >> > Sounds good. :-) > >> If we are keeping LICM before livevariables, we will have to compute >> liveness in the BB's where the invariants are hoisted to. Now that I >> think about it, we *cannot* use the register scavenger to do this >> because it also depends on kill / dead markers on the operands. The >> scavenger's job is not to add the kill / dead markers, it is to track >> what registers are live at any point of the BB. This means you'll >> have to walk the BB and track all physical register defs and uses in >> the BB. >> > I see. Okay, so by the time I get to the point where I'm moving > instructions that access physical registers, I should have the pass > after LiveVariables... Yeah, maybe. :-) We'll discuss some more. Evan > > -bw > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm-gcc-4.2] r44891 - in /llvm-gcc-4.2/trunk/gcc: llvm-backend.cpp testsuite/g++.dg/init/llvm-convert-1.C
Hi Devang,
> Do not emit pending decls twice.
...
> --- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original)
> +++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Tue Dec 11 17:17:57 2007
> @@ -897,7 +897,8 @@
>}
>
>if (TheDebugInfo) TheDebugInfo->EmitGlobalVariable(GV, decl);
> -
> +
> + TREE_ASM_WRITTEN(decl) = 1;
>timevar_pop(TV_LLVM_GLOBALS);
> }
at the start of the function there is:
void emit_global_to_llvm(tree decl) {
if (errorcount || sorrycount) return;
Should this be
if (errorcount || sorrycount) {
TREE_ASM_WRITTEN(fndecl) = 1;
return; // Do not process broken code.
}
like in llvm_emit_code_for_current_function?
And if so, maybe it should be like that too
in emit_alias_to_llvm. What do you think?
Ciao,
Duncan.
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Re: [llvm-commits] [llvm] r44954 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/vec_ctbits.ll
On Dec 12, 2007, at 2:21 PM, Dan Gohman wrote:
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/
> X86ISelLowering.cpp?rev=44954&r1=44953&r2=44954&view=diff
>
> ==
>
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Dec 12
> 16:21:26 2007
> @@ -483,6 +483,12 @@
> setOperationAction(ISD::CTPOP, (MVT::ValueType)VT, Expand);
> setOperationAction(ISD::CTTZ, (MVT::ValueType)VT, Expand);
> setOperationAction(ISD::CTLZ, (MVT::ValueType)VT, Expand);
> +setOperationAction(ISD::SHL, (MVT::ValueType)VT, Expand);
> +setOperationAction(ISD::SRA, (MVT::ValueType)VT, Expand);
> +setOperationAction(ISD::SRL, (MVT::ValueType)VT, Expand);
> +setOperationAction(ISD::ROTL, (MVT::ValueType)VT, Expand);
> +setOperationAction(ISD::ROTR, (MVT::ValueType)VT, Expand);
> +setOperationAction(ISD::BSWAP, (MVT::ValueType)VT, Expand);
>}
Hi Dan,
How do you create these nodes with vector types (in C)? I don't think
the legalizer is capable of expanding these ops with vector types?
Evan
>
>if (Subtarget->hasMMX()) {
>
> Added: llvm/trunk/test/CodeGen/X86/vec_ctbits.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/
> X86/vec_ctbits.ll?rev=44954&view=auto
>
> ==
>
> --- llvm/trunk/test/CodeGen/X86/vec_ctbits.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/vec_ctbits.ll Wed Dec 12 16:21:26 2007
> @@ -0,0 +1,18 @@
> +; RUN: llvm-as < %s | llc -march=x86-64
> +
> +declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>)
> +declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>)
> +declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
> +
> +define <2 x i64> @footz(<2 x i64> %a) {
> + %c = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %a)
> + ret <2 x i64> %c
> +}
> +define <2 x i64> @foolz(<2 x i64> %a) {
> + %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a)
> + ret <2 x i64> %c
> +}
> +define <2 x i64> @foopop(<2 x i64> %a) {
> + %c = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %a)
> + ret <2 x i64> %c
> +}
>
>
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[llvm-commits] [llvm-gcc-4.2] r44958 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Author: dpatel
Date: Wed Dec 12 16:55:05 2007
New Revision: 44958
URL: http://llvm.org/viewvc/llvm-project?rev=44958&view=rev
Log:
set TREE_ASM_WRITTEN bit even if node is not processed due to previous errors.
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp?rev=44958&r1=44957&r2=44958&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp Wed Dec 12 16:55:05 2007
@@ -600,7 +600,10 @@
// emit_alias_to_llvm - Given decl and target emit alias to target.
void emit_alias_to_llvm(tree decl, tree target, tree target_decl) {
- if (errorcount || sorrycount) return;
+ if (errorcount || sorrycount) {
+TREE_ASM_WRITTEN(decl) = 1;
+return; // Do not process broken code.
+ }
timevar_push(TV_LLVM_GLOBALS);
@@ -769,7 +772,10 @@
/// LLVM as a global variable. This function implements the end of
/// assemble_variable.
void emit_global_to_llvm(tree decl) {
- if (errorcount || sorrycount) return;
+ if (errorcount || sorrycount) {
+TREE_ASM_WRITTEN(decl) = 1;
+return; // Do not process broken code.
+ }
// FIXME: Support alignment on globals: DECL_ALIGN.
// FIXME: DECL_PRESERVE_P indicates the var is marked with attribute 'used'.
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Re: [llvm-commits] [llvm-gcc-4.2] r44958 - /llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
On Dec 12, 2007 2:55 PM, Devang Patel <[EMAIL PROTECTED]> wrote: > +return; // Do not process broken code. Where's your sense of adventure?! ;-) -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44959 - in /llvm/trunk: autoconf/configure.ac configure include/llvm/Config/config.h.in include/llvm/System/Host.h include/llvm/Target/TargetData.h lib/ExecutionEngine/Execution
Author: baldrick
Date: Wed Dec 12 17:03:45 2007
New Revision: 44959
URL: http://llvm.org/viewvc/llvm-project?rev=44959&view=rev
Log:
Remove host endianness info from TargetData and
put it in a new header System/Host.h instead.
Instead of getting the endianness from configure,
calculate it directly.
Added:
llvm/trunk/include/llvm/System/Host.h
Modified:
llvm/trunk/autoconf/configure.ac
llvm/trunk/configure
llvm/trunk/include/llvm/Config/config.h.in
llvm/trunk/include/llvm/Target/TargetData.h
llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
llvm/trunk/lib/Target/TargetData.cpp
Modified: llvm/trunk/autoconf/configure.ac
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=44959&r1=44958&r2=44959&view=diff
==
--- llvm/trunk/autoconf/configure.ac (original)
+++ llvm/trunk/autoconf/configure.ac Wed Dec 12 17:03:45 2007
@@ -227,10 +227,7 @@
AC_SUBST(ARCH,$llvm_cv_target_arch)
dnl Check for the endianness of the target
-AC_C_BIGENDIAN([AC_SUBST([ENDIAN],[big]),
-AC_DEFINE([MSB_FIRST], [1], [Define if this target is big
endian])],
- [AC_SUBST([ENDIAN],[little]),
-AC_DEFINE([LSB_FIRST], [1], [Define if this target is little
endian])])
+AC_C_BIGENDIAN(AC_SUBST([ENDIAN],[big]),AC_SUBST([ENDIAN],[little]))
dnl Check for build platform executable suffix if we're crosscompiling
if test "$cross_compiling" = yes; then
Modified: llvm/trunk/configure
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=44959&r1=44958&r2=44959&view=diff
==
--- llvm/trunk/configure (original)
+++ llvm/trunk/configure Wed Dec 12 17:03:45 2007
@@ -828,6 +828,7 @@
LLVM_ON_UNIX
LLVM_ON_WIN32
ARCH
+ENDIAN
CC
CFLAGS
LDFLAGS
@@ -838,7 +839,6 @@
CPP
GREP
EGREP
-ENDIAN
LLVM_CROSS_COMPILING
BUILD_CC
BUILD_EXEEXT
@@ -4183,19 +4183,9 @@
case $ac_cv_c_bigendian in
yes)
ENDIAN=big
-,
-
-cat >>confdefs.h <<\_ACEOF
-#define MSB_FIRST 1
-_ACEOF
;;
no)
ENDIAN=little
-,
-
-cat >>confdefs.h <<\_ACEOF
-#define LSB_FIRST 1
-_ACEOF
;;
*)
{ { echo "$as_me:$LINENO: error: unknown endianness
@@ -9881,7 +9871,7 @@
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext < conftest.$ac_ext
+ echo '#line 11809 "configure"' > conftest.$ac_ext
if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
(eval $ac_compile) 2>&5
ac_status=$?
@@ -13456,11 +13446,11 @@
-e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
-e 's:$: $lt_compiler_flag:'`
- (eval echo "\"\$as_me:13459: $lt_compile\"" >&5)
+ (eval echo "\"\$as_me:13449: $lt_compile\"" >&5)
(eval "$lt_compile" 2>conftest.err)
ac_status=$?
cat conftest.err >&5
- echo "$as_me:13463: \$? = $ac_status" >&5
+ echo "$as_me:13453: \$? = $ac_status" >&5
if (exit $ac_status) && test -s "$ac_outfile"; then
# The compiler can only warn and ignore the option if not recognized
# So say no if there are warnings other than the usual output.
@@ -13724,11 +13714,11 @@
-e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
-e 's:$: $lt_compiler_flag:'`
- (eval echo "\"\$as_me:13727: $lt_compile\"" >&5)
+ (eval echo "\"\$as_me:13717: $lt_compile\"" >&5)
(eval "$lt_compile" 2>conftest.err)
ac_status=$?
cat conftest.err >&5
- echo "$as_me:13731: \$? = $ac_status" >&5
+ echo "$as_me:13721: \$? = $ac_status" >&5
if (exit $ac_status) && test -s "$ac_outfile"; then
# The compiler can only warn and ignore the option if not recognized
# So say no if there are warnings other than the usual output.
@@ -13828,11 +13818,11 @@
-e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
-e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
-e 's:$: $lt_compiler_flag:'`
- (eval echo "\"\$as_me:13831: $lt_compile\"" >&5)
+ (eval echo "\"\$as_me:13821: $lt_compile\"" >&5)
(eval "$lt_compile" 2>out/conftest.err)
ac_status=$?
cat out/conftest.err >&5
- echo "$as_me:13835: \$? = $ac_status" >&5
+ echo "$as_me:13825: \$? = $ac_status" >&5
if (exit $ac_status) && test -s out/conftest2.$ac_objext
then
# The compiler can only warn and ignore the option if not recognized
@@ -16136,7 +16126,7 @@
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext < conftest.$ac_ext <&5)
+ (eval echo "\"\$as_me:18565: $lt_compile\"" >&5)
(eval "$lt_compile" 2>conftest.err)
ac_status=$?
cat conftest.err >&5
- echo "$as_me:18579: \$? = $ac_status" >&5
+ echo "$as_me:18569: \$? = $ac_status" >&5
if (exit $ac_status) && test -s "$ac_outfile"; then
# The compiler can only warn and ignore the option if not recogn
Re: [llvm-commits] [llvm] r44959 - in /llvm/trunk: autoconf/configure.ac configure include/llvm/Config/config.h.in include/llvm/System/Host.h include/llvm/Target/TargetData.h lib/ExecutionEngine/Execu
On Dec 12, 2007 3:03 PM, Duncan Sands <[EMAIL PROTECTED]> wrote: > Remove host endianness info from TargetData and > put it in a new header System/Host.h instead. > Instead of getting the endianness from configure, > calculate it directly. > Way to obviate my last post. ;-) -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44960 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Sparc/ l
Author: evancheng
Date: Wed Dec 12 17:12:09 2007
New Revision: 44960
URL: http://llvm.org/viewvc/llvm-project?rev=44960&view=rev
Log:
Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always
re-materializable and they should not be spilled.
Added:
llvm/trunk/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td
llvm/trunk/lib/Target/IA64/IA64InstrInfo.td
llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td
llvm/trunk/lib/Target/Target.td
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib/Target/X86/X86InstrMMX.td
llvm/trunk/lib/Target/X86/X86InstrSSE.td
llvm/trunk/lib/Target/X86/X86InstrX86-64.td
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=44960&r1=44959&r2=44960&view=diff
==
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Wed Dec 12 17:12:09 2007
@@ -48,47 +48,48 @@
const unsigned M_LOAD_FLAG = 1 << 5;
const unsigned M_STORE_FLAG= 1 << 6;
const unsigned M_INDIRECT_FLAG = 1 << 7;
+const unsigned M_IMPLICIT_DEF_FLAG = 1 << 8;
// M_CONVERTIBLE_TO_3_ADDR - This is a 2-address instruction which can be
// changed into a 3-address instruction if the first two operands cannot be
// assigned to the same register. The target must implement the
// TargetInstrInfo::convertToThreeAddress method for this instruction.
-const unsigned M_CONVERTIBLE_TO_3_ADDR = 1 << 8;
+const unsigned M_CONVERTIBLE_TO_3_ADDR = 1 << 9;
// This M_COMMUTABLE - is a 2- or 3-address instruction (of the form X = op Y,
// Z), which produces the same result if Y and Z are exchanged.
-const unsigned M_COMMUTABLE= 1 << 9;
+const unsigned M_COMMUTABLE= 1 << 10;
// M_TERMINATOR_FLAG - Is this instruction part of the terminator for a basic
// block? Typically this is things like return and branch instructions.
// Various passes use this to insert code into the bottom of a basic block, but
// before control flow occurs.
-const unsigned M_TERMINATOR_FLAG = 1 << 10;
+const unsigned M_TERMINATOR_FLAG = 1 << 11;
// M_USES_CUSTOM_DAG_SCHED_INSERTION - Set if this instruction requires custom
// insertion support when the DAG scheduler is inserting it into a machine
basic
// block.
-const unsigned M_USES_CUSTOM_DAG_SCHED_INSERTION = 1 << 11;
+const unsigned M_USES_CUSTOM_DAG_SCHED_INSERTION = 1 << 12;
// M_VARIABLE_OPS - Set if this instruction can have a variable number of extra
// operands in addition to the minimum number operands specified.
-const unsigned M_VARIABLE_OPS = 1 << 12;
+const unsigned M_VARIABLE_OPS = 1 << 13;
// M_PREDICABLE - Set if this instruction has a predicate operand that
// controls execution. It may be set to 'always'.
-const unsigned M_PREDICABLE= 1 << 13;
+const unsigned M_PREDICABLE= 1 << 14;
// M_REMATERIALIZIBLE - Set if this instruction can be trivally re-materialized
// at any time, e.g. constant generation, load from constant pool.
-const unsigned M_REMATERIALIZIBLE = 1 << 14;
+const unsigned M_REMATERIALIZIBLE = 1 << 15;
// M_NOT_DUPLICABLE - Set if this instruction cannot be safely duplicated.
// (e.g. instructions with unique labels attached).
-const unsigned M_NOT_DUPLICABLE= 1 << 15;
+const unsigned M_NOT_DUPLICABLE= 1 << 16;
// M_HAS_OPTIONAL_DEF - Set if this instruction has an optional definition,
e.g.
// ARM instructions which can set condition code if 's' bit is set.
-const unsigned M_HAS_OPTIONAL_DEF = 1 << 16;
+const unsigned M_HAS_OPTIONAL_DEF = 1 << 17;
// Machine operand flags
// M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it
Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=44960&r1=44959&r2=44960&view=diff
==
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Wed Dec 12 17:12:09 2007
@@ -613,8 +613,10 @@
return false;
isLoad = false;
- if (tii_->isTriviallyReMaterializable(MI)) {
-isLoad = MI->getInstrDescriptor()->Flags & M_LOAD_FLAG;
+ const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
+ if ((TID->Flags & M_IMPLICIT_DEF_FLAG) ||
+ tii_->isTriviallyReMaterializable(MI)) {
+i
[llvm-commits] [llvm] r44961 - /llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
Author: evancheng
Date: Wed Dec 12 17:15:59 2007
New Revision: 44961
URL: http://llvm.org/viewvc/llvm-project?rev=44961&view=rev
Log:
Cosmetic change.
Modified:
llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=44961&r1=44960&r2=44961&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Dec 12 17:15:59 2007
@@ -872,6 +872,9 @@
///
int getNodeId() const { return NodeId; }
+ /// setNodeId - Set unique node id.
+ void setNodeId(int Id) { NodeId = Id; }
+
typedef SmallVector::const_iterator use_iterator;
use_iterator use_begin() const { return Uses.begin(); }
use_iterator use_end() const { return Uses.end(); }
@@ -951,10 +954,6 @@
///
void Profile(FoldingSetNodeID &ID);
- void setNodeId(int Id) {
-NodeId = Id;
- }
-
protected:
friend class SelectionDAG;
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[llvm-commits] [llvm] r44965 - /llvm/trunk/lib/Transforms/Instrumentation/EdgeProfiling.cpp
Author: lattner
Date: Wed Dec 12 18:04:46 2007
New Revision: 44965
URL: http://llvm.org/viewvc/llvm-project?rev=44965&view=rev
Log:
Fix for edge profiling, patch by 'Marc' for PR1857
Modified:
llvm/trunk/lib/Transforms/Instrumentation/EdgeProfiling.cpp
Modified: llvm/trunk/lib/Transforms/Instrumentation/EdgeProfiling.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/EdgeProfiling.cpp?rev=44965&r1=44964&r2=44965&view=diff
==
--- llvm/trunk/lib/Transforms/Instrumentation/EdgeProfiling.cpp (original)
+++ llvm/trunk/lib/Transforms/Instrumentation/EdgeProfiling.cpp Wed Dec 12
18:04:46 2007
@@ -84,7 +84,7 @@
// Okay, we are guaranteed that the edge is no longer critical. If
we
// only have a single successor, insert the counter in this block,
// otherwise insert it in the successor block.
- if (TI->getNumSuccessors() == 0) {
+ if (TI->getNumSuccessors() == 1) {
// Insert counter at the start of the block
IncrementCounterInBlock(BB, i++, Counters);
} else {
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[llvm-commits] [llvm] r44969 - in /llvm/trunk/utils/TableGen: CodeGenInstruction.h CodeGenTarget.cpp InstrInfoEmitter.cpp
Author: evancheng
Date: Wed Dec 12 18:42:35 2007
New Revision: 44969
URL: http://llvm.org/viewvc/llvm-project?rev=44969&view=rev
Log:
Oops. Forgot these.
Modified:
llvm/trunk/utils/TableGen/CodeGenInstruction.h
llvm/trunk/utils/TableGen/CodeGenTarget.cpp
llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=44969&r1=44968&r2=44969&view=diff
==
--- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original)
+++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Wed Dec 12 18:42:35 2007
@@ -92,6 +92,7 @@
bool isCall;
bool isLoad;
bool isStore;
+bool isImplicitDef;
bool isPredicable;
bool isConvertibleToThreeAddress;
bool isCommutable;
Modified: llvm/trunk/utils/TableGen/CodeGenTarget.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenTarget.cpp?rev=44969&r1=44968&r2=44969&view=diff
==
--- llvm/trunk/utils/TableGen/CodeGenTarget.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenTarget.cpp Wed Dec 12 18:42:35 2007
@@ -384,6 +384,7 @@
isCall = R->getValueAsBit("isCall");
isLoad = R->getValueAsBit("isLoad");
isStore = R->getValueAsBit("isStore");
+ isImplicitDef= R->getValueAsBit("isImplicitDef");
bool isTwoAddress = R->getValueAsBit("isTwoAddress");
isPredicable = R->getValueAsBit("isPredicable");
isConvertibleToThreeAddress =
R->getValueAsBit("isConvertibleToThreeAddress");
Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=44969&r1=44968&r2=44969&view=diff
==
--- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Wed Dec 12 18:42:35 2007
@@ -243,6 +243,7 @@
if (Inst.isCall) OS << "|M_CALL_FLAG";
if (Inst.isLoad) OS << "|M_LOAD_FLAG";
if (Inst.isStore || isStore) OS << "|M_STORE_FLAG";
+ if (Inst.isImplicitDef)OS << "|M_IMPLICIT_DEF_FLAG";
if (Inst.isPredicable) OS << "|M_PREDICABLE";
if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR";
if (Inst.isCommutable) OS << "|M_COMMUTABLE";
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[llvm-commits] [llvm] r44970 - in /llvm/trunk: lib/Target/X86/X86ISelDAGToDAG.cpp lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/fold-and-shift.ll
Author: evancheng
Date: Wed Dec 12 18:43:27 2007
New Revision: 44970
URL: http://llvm.org/viewvc/llvm-project?rev=44970&view=rev
Log:
Fold some and + shift in x86 addressing mode.
Added:
llvm/trunk/test/CodeGen/X86/fold-and-shift.ll
Modified:
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.td
Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=44970&r1=44969&r2=44970&view=diff
==
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Dec 12 18:43:27 2007
@@ -582,7 +582,7 @@
}
int id = N.Val->getNodeId();
- bool Available = isSelected(id);
+ bool AlreadySelected = isSelected(id); // Already selected, not yet replaced.
switch (N.getOpcode()) {
default: break;
@@ -605,7 +605,7 @@
// If value is available in a register both base and index components have
// been picked, we can't fit the result available in the register in the
// addressing mode. Duplicate GlobalAddress or ConstantPool as
displacement.
-if (!Available || (AM.Base.Reg.Val && AM.IndexReg.Val)) {
+if (!AlreadySelected || (AM.Base.Reg.Val && AM.IndexReg.Val)) {
bool isStatic = TM.getRelocationModel() == Reloc::Static;
SDOperand N0 = N.getOperand(0);
// Mac OS X X86-64 lower 4G address is not available.
@@ -653,7 +653,7 @@
break;
case ISD::SHL:
-if (Available || AM.IndexReg.Val != 0 || AM.Scale != 1)
+if (AlreadySelected || AM.IndexReg.Val != 0 || AM.Scale != 1)
break;
if (ConstantSDNode *CN = dyn_cast(N.Val->getOperand(1))) {
@@ -690,7 +690,7 @@
// FALL THROUGH
case ISD::MUL:
// X*[3,5,9] -> X+X*[2,4,8]
-if (!Available &&
+if (!AlreadySelected &&
AM.BaseType == X86ISelAddressMode::RegBase &&
AM.Base.Reg.Val == 0 &&
AM.IndexReg.Val == 0) {
@@ -725,7 +725,7 @@
break;
case ISD::ADD:
-if (!Available) {
+if (!AlreadySelected) {
X86ISelAddressMode Backup = AM;
if (!MatchAddress(N.Val->getOperand(0), AM, false, Depth+1) &&
!MatchAddress(N.Val->getOperand(1), AM, false, Depth+1))
@@ -740,7 +740,7 @@
case ISD::OR:
// Handle "X | C" as "X + C" iff X is known to have C bits clear.
-if (Available) break;
+if (AlreadySelected) break;
if (ConstantSDNode *CN = dyn_cast(N.getOperand(1))) {
X86ISelAddressMode Backup = AM;
@@ -758,6 +758,44 @@
AM = Backup;
}
break;
+
+ case ISD::AND: {
+// Handle "(x << C1) & C2" as "(X & (C2>>C1)) << C1" if safe and if this
+// allows us to fold the shift into this addressing mode.
+if (AlreadySelected) break;
+SDOperand Shift = N.getOperand(0);
+if (Shift.getOpcode() != ISD::SHL) break;
+
+// Scale must not be used already.
+if (AM.IndexReg.Val != 0 || AM.Scale != 1) break;
+
+ConstantSDNode *C2 = dyn_cast(N.getOperand(1));
+ConstantSDNode *C1 = dyn_cast(Shift.getOperand(1));
+if (!C1 || !C2) break;
+
+// Not likely to be profitable if either the AND or SHIFT node has more
+// than one use (unless all uses are for address computation). Besides,
+// isel mechanism requires their node ids to be reused.
+if (!N.hasOneUse() || !Shift.hasOneUse())
+ break;
+
+// Verify that the shift amount is something we can fold.
+unsigned ShiftCst = C1->getValue();
+if (ShiftCst != 1 && ShiftCst != 2 && ShiftCst != 3)
+ break;
+
+// Get the new AND mask, this folds to a constant.
+SDOperand NewANDMask = CurDAG->getNode(ISD::SRL, N.getValueType(),
+ SDOperand(C2, 0), SDOperand(C1, 0));
+SDOperand NewAND = CurDAG->getNode(ISD::AND, N.getValueType(),
+ Shift.getOperand(0), NewANDMask);
+NewANDMask.Val->setNodeId(Shift.Val->getNodeId());
+NewAND.Val->setNodeId(N.Val->getNodeId());
+
+AM.Scale = 1 << ShiftCst;
+AM.IndexReg = NewAND;
+return false;
+ }
}
return MatchAddressBase(N, AM, isRoot, Depth);
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=44970&r1=44969&r2=44970&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Wed Dec 12 18:43:27 2007
@@ -2613,6 +2613,10 @@
def : Pat<(i32 (anyext (loadi8 addr:$src))), (MOVZX32rm8 addr:$src)>;
def : Pat<(i32 (anyext (loadi16 addr:$src))), (MOVZX32rm16 addr:$src)>;
+// (and (i32 load), 255) -> (zextload i8)
+def : Pat<(i32 (and (loadi32 addr:$src), (i32 255))), (MOVZX32rm8 addr:$src)>;
+def : Pat<(i32 (and (loadi32 addr:$src), (i3
[llvm-commits] [test-suite] r44971 - /test-suite/trunk/Makefile.programs
Author: evancheng Date: Wed Dec 12 18:51:41 2007 New Revision: 44971 URL: http://llvm.org/viewvc/llvm-project?rev=44971&view=rev Log: Doh. Modified: test-suite/trunk/Makefile.programs Modified: test-suite/trunk/Makefile.programs URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=44971&r1=44970&r2=44971&view=diff == --- test-suite/trunk/Makefile.programs (original) +++ test-suite/trunk/Makefile.programs Wed Dec 12 18:51:41 2007 @@ -222,7 +222,8 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),x86) -LLCBETAOPTION := -new-coalescer-heuristic=true +LLCBETAOPTION := -optimize-ext-uses +#-new-coalescer-heuristic=true #-tailcallopt #-regalloc=local -fast #-disable-rematerialization @@ -233,8 +234,7 @@ LLCBETAOPTION := -enable-sparc-v9-insts endif ifeq ($(ARCH),ARM) -LLCBETAOPTION := -optimize-ext-uses -#-new-coalescer-heuristic=true +LLCBETAOPTION := -new-coalescer-heuristic=true #-disable-rematerialization #-march=thumb endif ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44960 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Spar
On Dec 12, 2007, at 3:12 PM, Evan Cheng wrote:
>isLoad = false;
> - if (tii_->isTriviallyReMaterializable(MI)) {
> -isLoad = MI->getInstrDescriptor()->Flags & M_LOAD_FLAG;
> + const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
> + if ((TID->Flags & M_IMPLICIT_DEF_FLAG) ||
> + tii_->isTriviallyReMaterializable(MI)) {
> +isLoad = TID->Flags & M_LOAD_FLAG;
> return true;
>}
Hi Evan,
At one point were discussed eliminating
TII::isTriviallyReMaterializable. The argument is that target
implementations shouldn't have to know about algorithms, they should
just describe properties of the target, and the algorithm should
figure out if it can make the xform from that info.
Is this a pipe dream? :)
-Chris
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[llvm-commits] [llvm] r44973 - /llvm/trunk/configure
Author: sampo
Date: Wed Dec 12 19:18:52 2007
New Revision: 44973
URL: http://llvm.org/viewvc/llvm-project?rev=44973&view=rev
Log:
Do not build CBackend and MSIL regardless of configured targets
Modified:
llvm/trunk/configure
Modified: llvm/trunk/configure
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=44973&r1=44972&r2=44973&view=diff
==
--- llvm/trunk/configure (original)
+++ llvm/trunk/configure Wed Dec 12 19:18:52 2007
@@ -4566,7 +4566,7 @@
fi
case "$enableval" in
- all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU" ;;
+ all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU
CBackend MSIL" ;;
host-only)
case "$llvm_cv_target_arch" in
x86) TARGETS_TO_BUILD="X86" ;;
@@ -4594,6 +4594,8 @@
arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
mips)TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
+cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
+msil)TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
*) { { echo "$as_me:$LINENO: error: Unrecognized target $a_target" >&5
echo "$as_me: error: Unrecognized target $a_target" >&2;}
{ (exit 1); exit 1; }; } ;;
@@ -4601,7 +4603,6 @@
done
;;
esac
-TARGETS_TO_BUILD="CBackend MSIL $TARGETS_TO_BUILD"
TARGETS_TO_BUILD=$TARGETS_TO_BUILD
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Re: [llvm-commits] [llvm] r44960 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Spar
On Dec 12, 2007, at 5:07 PM, Chris Lattner wrote:
> On Dec 12, 2007, at 3:12 PM, Evan Cheng wrote:
>>isLoad = false;
>> - if (tii_->isTriviallyReMaterializable(MI)) {
>> -isLoad = MI->getInstrDescriptor()->Flags & M_LOAD_FLAG;
>> + const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
>> + if ((TID->Flags & M_IMPLICIT_DEF_FLAG) ||
>> + tii_->isTriviallyReMaterializable(MI)) {
>> +isLoad = TID->Flags & M_LOAD_FLAG;
>> return true;
>>}
>
> Hi Evan,
>
> At one point were discussed eliminating
> TII::isTriviallyReMaterializable. The argument is that target
> implementations shouldn't have to know about algorithms, they should
> just describe properties of the target, and the algorithm should
> figure out if it can make the xform from that info.
What do you mean? The targets don't know about the remat algorithm.
It's just the spiller making use of a some property of the instructions.
Evan
>
> Is this a pipe dream? :)
>
> -Chris
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Re: [llvm-commits] [llvm] r44960 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Spar
On Dec 12, 2007, at 5:37 PM, Evan Cheng wrote:
>
> On Dec 12, 2007, at 5:07 PM, Chris Lattner wrote:
>
>> On Dec 12, 2007, at 3:12 PM, Evan Cheng wrote:
>>>isLoad = false;
>>> - if (tii_->isTriviallyReMaterializable(MI)) {
>>> -isLoad = MI->getInstrDescriptor()->Flags & M_LOAD_FLAG;
>>> + const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
>>> + if ((TID->Flags & M_IMPLICIT_DEF_FLAG) ||
>>> + tii_->isTriviallyReMaterializable(MI)) {
>>> +isLoad = TID->Flags & M_LOAD_FLAG;
>>> return true;
>>>}
>>
>> Hi Evan,
>>
>> At one point were discussed eliminating
>> TII::isTriviallyReMaterializable. The argument is that target
>> implementations shouldn't have to know about algorithms, they should
>> just describe properties of the target, and the algorithm should
>> figure out if it can make the xform from that info.
>
> What do you mean? The targets don't know about the remat algorithm.
> It's just the spiller making use of a some property of the
> instructions.
Ok, you are talking about isTriviallyReMaterializable, not
M_IMPLICIT_DEF_FLAG. Right now it is defined as this:
bool isTriviallyReMaterializable(MachineInstr *MI) const {
return (MI->getInstrDescriptor()->Flags & M_REMATERIALIZIBLE) &&
isReallyTriviallyReMaterializable(MI);
}
X86::isReallyTriviallyReMaterializable() is:
...
case X86::MMX_MOVD64rm:
case X86::MMX_MOVQ64rm:
// Loads from constant pools are trivially rematerializable.
return MI->getOperand(1).isRegister() && MI->getOperand
(2).isImmediate() &&
MI->getOperand(3).isRegister() && MI->getOperand
(4).isConstantPoolIndex() &&
MI->getOperand(1).getReg() == 0 &&
MI->getOperand(2).getImmedValue() == 1 &&
MI->getOperand(3).getReg() == 0;
}
The targets is only describing properties of the instruction because
we are not able to describe addressing mode in a generic way. Seems
like we are not too far off from your "pipe dream". :-)
Evan
>
> Evan
>
>>
>> Is this a pipe dream? :)
>>
>> -Chris
>> ___
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>
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Re: [llvm-commits] [llvm] r44960 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Spar
>> At one point were discussed eliminating >> TII::isTriviallyReMaterializable. The argument is that target >> implementations shouldn't have to know about algorithms, they should >> just describe properties of the target, and the algorithm should >> figure out if it can make the xform from that info. > > What do you mean? The targets don't know about the remat algorithm. > It's just the spiller making use of a some property of the > instructions. The comment above isTriviallyReMaterializable says: /// isTriviallyReMaterializable - Return true if the instruction is trivially /// rematerializable, meaning it has no side effects and requires no operands /// that aren't always available. Why not just expose the properties "has no side effects" and "requires no operands that are not always available"? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44960 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Spar
>>> At one point were discussed eliminating
>>> TII::isTriviallyReMaterializable. The argument is that target
>>> implementations shouldn't have to know about algorithms, they should
>>> just describe properties of the target, and the algorithm should
>>> figure out if it can make the xform from that info.
>>
>> What do you mean? The targets don't know about the remat algorithm.
>> It's just the spiller making use of a some property of the
>> instructions.
>
> Ok, you are talking about isTriviallyReMaterializable, not
> M_IMPLICIT_DEF_FLAG. Right now it is defined as this:
Right.
>bool isTriviallyReMaterializable(MachineInstr *MI) const {
> return (MI->getInstrDescriptor()->Flags & M_REMATERIALIZIBLE) &&
> isReallyTriviallyReMaterializable(MI);
>}
>
> X86::isReallyTriviallyReMaterializable() is:
> ...
>case X86::MMX_MOVD64rm:
>case X86::MMX_MOVQ64rm:
> // Loads from constant pools are trivially rematerializable.
> return MI->getOperand(1).isRegister() && MI->getOperand
> (2).isImmediate() &&
> MI->getOperand(3).isRegister() && MI->getOperand
> (4).isConstantPoolIndex() &&
> MI->getOperand(1).getReg() == 0 &&
> MI->getOperand(2).getImmedValue() == 1 &&
> MI->getOperand(3).getReg() == 0;
>}
>
> The targets is only describing properties of the instruction because
> we are not able to describe addressing mode in a generic way. Seems
> like we are not too far off from your "pipe dream". :-)
aha! How about we have some new property "can be moved with
impunity" which laods from the constant pool would return true for?
This property could then be used by licm and is better than calling
it "rematerializable", which depends on the implementation of remat.
I'd like to nuke M_REMATERIALIZIBLE and
isReallyTriviallyReMaterializable, replacing them with the properties
that are actually needed.
-Chris
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[llvm-commits] [llvm-gcc-4.2] r44975 - in /llvm-gcc-4.2/trunk/gcc: config/darwin.h except.c unwind-dw2.c
Author: johannes
Date: Wed Dec 12 19:51:55 2007
New Revision: 44975
URL: http://llvm.org/viewvc/llvm-project?rev=44975&view=rev
Log:
Use Unwind_Resume_or_Rethrow instead of Unwind_Resume
for Darwin stack unwind.
Modified:
llvm-gcc-4.2/trunk/gcc/config/darwin.h
llvm-gcc-4.2/trunk/gcc/except.c
llvm-gcc-4.2/trunk/gcc/unwind-dw2.c
Modified: llvm-gcc-4.2/trunk/gcc/config/darwin.h
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin.h?rev=44975&r1=44974&r2=44975&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/config/darwin.h (original)
+++ llvm-gcc-4.2/trunk/gcc/config/darwin.h Wed Dec 12 19:51:55 2007
@@ -1277,6 +1277,10 @@
else if (!MACHO_DYNAMIC_NO_PIC_P) \
argvec.push_back ("--relocation-model=static")
#endif /* defined (TARGET_386) */
+
+/* On Darwin _Unwind_Resume is sensitive to the dynamic stack layout; we
+ use _Unwind_Resume_or_Rethrow instead. */
+#define LLVM_STACKSENSITIVE_UNWIND_RESUME 1
#endif
/* LLVM LOCAL end */
Modified: llvm-gcc-4.2/trunk/gcc/except.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/except.c?rev=44975&r1=44974&r2=44975&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/except.c (original)
+++ llvm-gcc-4.2/trunk/gcc/except.c Wed Dec 12 19:51:55 2007
@@ -4054,8 +4054,12 @@
/* The default c++ routines aren't actually c++ specific, so use those. */
/* LLVM local begin */
llvm_unwind_resume_libfunc = llvm_init_one_libfunc ( USING_SJLJ_EXCEPTIONS ?
- "_Unwind_SjLj_Resume"
- : "_Unwind_Resume");
+ "_Unwind_SjLj_Resume"
+#ifdef LLVM_STACKSENSITIVE_UNWIND_RESUME
+ : "_Unwind_Resume_or_Rethrow");
+#else
+ : "_Unwind_Resume");
+#endif
/* LLVM local end */
}
Modified: llvm-gcc-4.2/trunk/gcc/unwind-dw2.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/unwind-dw2.c?rev=44975&r1=44974&r2=44975&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/unwind-dw2.c (original)
+++ llvm-gcc-4.2/trunk/gcc/unwind-dw2.c Wed Dec 12 19:51:55 2007
@@ -1511,7 +1511,14 @@
static inline _Unwind_Ptr
uw_identify_context (struct _Unwind_Context *context)
{
+/* LLVM LOCAL begin
+ This change is needed to match Apple's installed libgcc. */
+#ifdef LLVM_STACKSENSITIVE_UNWIND_RESUME
+ return _Unwind_GetCFA (context);
+#else
return _Unwind_GetIP (context);
+#endif
+/* LLVM LOCAL end */
}
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Re: [llvm-commits] [llvm] r44973 - /llvm/trunk/configure
Did you forget to check in configure.ac for this change?
-Tanya
On Dec 12, 2007, at 5:18 PM, Nate Begeman wrote:
> Author: sampo
> Date: Wed Dec 12 19:18:52 2007
> New Revision: 44973
>
> URL: http://llvm.org/viewvc/llvm-project?rev=44973&view=rev
> Log:
> Do not build CBackend and MSIL regardless of configured targets
>
> Modified:
> llvm/trunk/configure
>
> Modified: llvm/trunk/configure
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?
> rev=44973&r1=44972&r2=44973&view=diff
>
> ==
>
> --- llvm/trunk/configure (original)
> +++ llvm/trunk/configure Wed Dec 12 19:18:52 2007
> @@ -4566,7 +4566,7 @@
> fi
>
> case "$enableval" in
> - all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips
> CellSPU" ;;
> + all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips
> CellSPU CBackend MSIL" ;;
>host-only)
> case "$llvm_cv_target_arch" in
>x86) TARGETS_TO_BUILD="X86" ;;
> @@ -4594,6 +4594,8 @@
> arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
> mips)TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
> spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
> +cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
> +msil)TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
> *) { { echo "$as_me:$LINENO: error: Unrecognized target
> $a_target" >&5
> echo "$as_me: error: Unrecognized target $a_target" >&2;}
> { (exit 1); exit 1; }; } ;;
> @@ -4601,7 +4603,6 @@
>done
>;;
> esac
> -TARGETS_TO_BUILD="CBackend MSIL $TARGETS_TO_BUILD"
> TARGETS_TO_BUILD=$TARGETS_TO_BUILD
>
>
>
>
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Re: [llvm-commits] [llvm] r44960 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Spar
On Dec 12, 2007, at 5:51 PM, Chris Lattner wrote:
At one point were discussed eliminating
TII::isTriviallyReMaterializable. The argument is that target
implementations shouldn't have to know about algorithms, they
should
just describe properties of the target, and the algorithm should
figure out if it can make the xform from that info.
>>>
>>> What do you mean? The targets don't know about the remat algorithm.
>>> It's just the spiller making use of a some property of the
>>> instructions.
>>
>> Ok, you are talking about isTriviallyReMaterializable, not
>> M_IMPLICIT_DEF_FLAG. Right now it is defined as this:
>
> Right.
>
>>bool isTriviallyReMaterializable(MachineInstr *MI) const {
>> return (MI->getInstrDescriptor()->Flags & M_REMATERIALIZIBLE) &&
>> isReallyTriviallyReMaterializable(MI);
>>}
>>
>> X86::isReallyTriviallyReMaterializable() is:
>> ...
>>case X86::MMX_MOVD64rm:
>>case X86::MMX_MOVQ64rm:
>> // Loads from constant pools are trivially rematerializable.
>> return MI->getOperand(1).isRegister() && MI->getOperand
>> (2).isImmediate() &&
>> MI->getOperand(3).isRegister() && MI->getOperand
>> (4).isConstantPoolIndex() &&
>> MI->getOperand(1).getReg() == 0 &&
>> MI->getOperand(2).getImmedValue() == 1 &&
>> MI->getOperand(3).getReg() == 0;
>>}
>>
>> The targets is only describing properties of the instruction because
>> we are not able to describe addressing mode in a generic way. Seems
>> like we are not too far off from your "pipe dream". :-)
>
> aha! How about we have some new property "can be moved with
> impunity" which laods from the constant pool would return true for?
> This property could then be used by licm and is better than calling
> it "rematerializable", which depends on the implementation of remat.
The problem is the property requires understanding of the MI
addressing mode. There is no way to specify a static property to
describe that. Unless we want to use different opcodes for
constantpool load, for example.
>
> I'd like to nuke M_REMATERIALIZIBLE and
> isReallyTriviallyReMaterializable, replacing them with the properties
> that are actually needed.
I have no problem with nuking M_REMATERIALIZIBLE. We just have to
replace it with something like M_HAS_SIDE_EFFECT. However, I am not
sure how to eliminate isReallyTriviallyReMaterializable for reason
described above.
Evan
>
> -Chris
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[llvm-commits] [llvm] r44977 - /llvm/trunk/test/ExecutionEngine/2007-12-11-APIntExFuncCall.ll
Author: sheng
Date: Wed Dec 12 20:03:57 2007
New Revision: 44977
URL: http://llvm.org/viewvc/llvm-project?rev=44977&view=rev
Log:
Remove this testcase as it will always fail on
platform like Darwin.
Removed:
llvm/trunk/test/ExecutionEngine/2007-12-11-APIntExFuncCall.ll
Removed: llvm/trunk/test/ExecutionEngine/2007-12-11-APIntExFuncCall.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/ExecutionEngine/2007-12-11-APIntExFuncCall.ll?rev=44976&view=auto
==
--- llvm/trunk/test/ExecutionEngine/2007-12-11-APIntExFuncCall.ll (original)
+++ llvm/trunk/test/ExecutionEngine/2007-12-11-APIntExFuncCall.ll (removed)
@@ -1,54 +0,0 @@
-; RUN: llvm-as < %s -o - | lli -force-interpreter
-; PR1629
-
-; ModuleID = ''
-target datalayout =
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
-target triple = "i686-pc-linux-gnu"
- %struct.X = type { i32 }
[EMAIL PROTECTED] = internal global i64 0, align 8 ;
[#uses=3]
[EMAIL PROTECTED] = internal global %struct.X zeroinitializer ;
<%struct.X*> [#uses=1]
-
-define i32 @main() nounwind {
-entry:
- %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
- %tmp2 = call double @sin( double 1.999000e+00 ) nounwind readonly
; [#uses=1]
- %tmp3 = call double @cos( double 1.99e+00 ) nounwind readonly
; [#uses=1]
- %tmp4 = add double %tmp2, %tmp3 ; [#uses=1]
- %tmp5 = load i8* bitcast (i64* @_ZGVZ4mainE1a to i8*), align 1
; [#uses=1]
- %tmp6 = icmp eq i8 %tmp5, 0 ; [#uses=1]
- %tmp67 = zext i1 %tmp6 to i8; [#uses=1]
- %toBool = icmp ne i8 %tmp67, 0 ; [#uses=1]
- br i1 %toBool, label %cond_true, label %cond_next14
-
-cond_true: ; preds = %entry
- %tmp8 = call i32 @__cxa_guard_acquire( i64* @_ZGVZ4mainE1a ) nounwind
; [#uses=1]
- %tmp9 = icmp ne i32 %tmp8, 0; [#uses=1]
- %tmp910 = zext i1 %tmp9 to i8 ; [#uses=1]
- %toBool12 = icmp ne i8 %tmp910, 0 ; [#uses=1]
- br i1 %toBool12, label %cond_true13, label %cond_next14
-
-cond_true13: ; preds = %cond_true
- call void @_ZN1XC1Ei( %struct.X* @_ZZ4mainE1a, i32 0 ) nounwind
- call void @__cxa_guard_release( i64* @_ZGVZ4mainE1a ) nounwind
- br label %cond_next14
-
-cond_next14: ; preds = %cond_true13, %cond_true, %entry
- %tmp1516 = fptosi double %tmp4 to i32 ; [#uses=1]
- ret i32 %tmp1516
-}
-
-define linkonce void @_ZN1XC1Ei(%struct.X* %this, i32 %val) nounwind {
-entry:
- %"alloca point" = bitcast i32 0 to i32 ; [#uses=0]
- %tmp1 = getelementptr %struct.X* %this, i32 0, i32 0;
[#uses=1]
- store i32 %val, i32* %tmp1, align 4
- ret void
-}
-
-declare double @sin(double) nounwind readonly
-
-declare double @cos(double) nounwind readonly
-
-declare i32 @__cxa_guard_acquire(i64*) nounwind
-
-declare void @__cxa_guard_release(i64*) nounwind
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[llvm-commits] [llvm] r44979 - /llvm/trunk/Makefile
Author: sampo Date: Wed Dec 12 20:17:17 2007 New Revision: 44979 URL: http://llvm.org/viewvc/llvm-project?rev=44979&view=rev Log: Add install-libs target which only installs libraries, not tools Modified: llvm/trunk/Makefile Modified: llvm/trunk/Makefile URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/Makefile?rev=44979&r1=44978&r2=44979&view=diff == --- llvm/trunk/Makefile (original) +++ llvm/trunk/Makefile Wed Dec 12 20:17:17 2007 @@ -37,6 +37,11 @@ OPTIONAL_DIRS := endif +ifeq ($(MAKECMDGOALS),install-libs) + DIRS := $(filter-out tools runtime docs, $(DIRS)) + OPTIONAL_DIRS := $(filter bindings, $(OPTIONAL_DIRS)) +endif + ifeq ($(MAKECMDGOALS),tools-only) DIRS := $(filter-out runtime docs, $(DIRS)) OPTIONAL_DIRS := @@ -81,6 +86,7 @@ tools-only: all libs-only: all +install-libs: install # # Make sure the generated headers are up-to-date. This must be kept in ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r44980 - /llvm/trunk/autoconf/configure.ac
Author: sampo
Date: Wed Dec 12 20:24:45 2007
New Revision: 44980
URL: http://llvm.org/viewvc/llvm-project?rev=44980&view=rev
Log:
Apply CBE/MSIL patch to autoconf
Modified:
llvm/trunk/autoconf/configure.ac
Modified: llvm/trunk/autoconf/configure.ac
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=44980&r1=44979&r2=44980&view=diff
==
--- llvm/trunk/autoconf/configure.ac (original)
+++ llvm/trunk/autoconf/configure.ac Wed Dec 12 20:24:45 2007
@@ -363,7 +363,7 @@
[Build specific host targets: all,host-only,{target-name} (default=all)]),,
enableval=all)
case "$enableval" in
- all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU" ;;
+ all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU
CBackend MSIL" ;;
host-only)
case "$llvm_cv_target_arch" in
x86) TARGETS_TO_BUILD="X86" ;;
@@ -389,12 +389,13 @@
arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
mips)TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
+cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
+msil)TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
*) AC_MSG_ERROR([Unrecognized target $a_target]) ;;
esac
done
;;
esac
-TARGETS_TO_BUILD="CBackend MSIL $TARGETS_TO_BUILD"
AC_SUBST(TARGETS_TO_BUILD,$TARGETS_TO_BUILD)
dnl Prevent the CBackend from using printf("%a") for floating point so older
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[llvm-commits] [llvm] r44981 - in /llvm/trunk: lib/Transforms/Scalar/CodeGenPrepare.cpp test/CodeGen/X86/opt-ext-uses.ll
Author: evancheng
Date: Wed Dec 12 21:32:53 2007
New Revision: 44981
URL: http://llvm.org/viewvc/llvm-project?rev=44981&view=rev
Log:
Be extra careful with extension use optimation. Now turned on by default.
Modified:
llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp
llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll
Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp?rev=44981&r1=44980&r2=44981&view=diff
==
--- llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Wed Dec 12 21:32:53 2007
@@ -36,7 +36,7 @@
namespace {
cl::opt OptExtUses("optimize-ext-uses",
- cl::init(false), cl::Hidden);
+ cl::init(true), cl::Hidden);
}
namespace {
@@ -929,6 +929,10 @@
if (Src->hasOneUse())
return false;
+ // Only do this xform is truncating is free.
+ if (!TLI->isTruncateFree(I->getType(), Src->getType()))
+return false;
+
// Only safe to perform the optimization if the source is also defined in
// this block.
if (!isa(Src) || DefBB != cast(Src)->getParent())
@@ -952,8 +956,11 @@
for (Value::use_iterator UI = Src->use_begin(), E = Src->use_end();
UI != E; ++UI) {
Instruction *User = cast(*UI);
-if (User->getParent() == DefBB) continue;
-if (isa(User))
+BasicBlock *UserBB = User->getParent();
+if (UserBB == DefBB) continue;
+// Be conservative. We don't want this xform to end up introducing
+// reloads just before load / store instructions.
+if (isa(User) || isa(User) || isa(User))
return false;
}
Modified: llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll?rev=44981&r1=44980&r2=44981&view=diff
==
--- llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll (original)
+++ llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll Wed Dec 12 21:32:53 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -optimize-ext-uses=true | grep movw |
count 1
+; RUN: llvm-as < %s | llc -march=x86 | grep movw | count 1
define i16 @t() signext {
entry:
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Re: [llvm-commits] [llvm] r44960 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/Mips/ lib/Target/PowerPC/ lib/Target/Spar
>>> X86::isReallyTriviallyReMaterializable() is: >>> ... >>> case X86::MMX_MOVD64rm: >>> case X86::MMX_MOVQ64rm: >>> // Loads from constant pools are trivially rematerializable. >>> return MI->getOperand(1).isRegister() && MI->getOperand >>> (2).isImmediate() && >>>MI->getOperand(3).isRegister() && MI->getOperand >>> (4).isConstantPoolIndex() && >>>MI->getOperand(1).getReg() == 0 && >>>MI->getOperand(2).getImmedValue() == 1 && >>>MI->getOperand(3).getReg() == 0; >>> } >>> >>> The targets is only describing properties of the instruction because >>> we are not able to describe addressing mode in a generic way. Seems >>> like we are not too far off from your "pipe dream". :-) >> >> aha! How about we have some new property "can be moved with >> impunity" which laods from the constant pool would return true for? >> This property could then be used by licm and is better than calling >> it "rematerializable", which depends on the implementation of remat. > > The problem is the property requires understanding of the MI > addressing mode. There is no way to specify a static property to > describe that. Unless we want to use different opcodes for > constantpool load, for example. Sure, I'm not arguing for a static flag on the TII instead of a virtual method. I'm really saying that you should rename TII::isReallyTriviallyReMaterializable (which is virtual) to TII::isLoadConstant (which remains virtual) if that is what it really is. >> I'd like to nuke M_REMATERIALIZIBLE and >> isReallyTriviallyReMaterializable, replacing them with the properties >> that are actually needed. > > I have no problem with nuking M_REMATERIALIZIBLE. We just have to > replace it with something like M_HAS_SIDE_EFFECT. However, I am not > sure how to eliminate isReallyTriviallyReMaterializable for reason > described above. Ok. Really I'm talking about naming it better and changing the targets from providing "what remat wants" to providing abstract properties of their ISA. If this ends up being a method rename, so be it :) -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44981 - in /llvm/trunk: lib/Transforms/Scalar/CodeGenPrepare.cpp test/CodeGen/X86/opt-ext-uses.ll
Evan Cheng wrote: > @@ -929,6 +929,10 @@ >if (Src->hasOneUse()) > return false; > > + // Only do this xform is truncating is free. Should read ...xform if* truncating... > + if (!TLI->isTruncateFree(I->getType(), Src->getType())) > +return false; > + >// Only safe to perform the optimization if the source is also defined in >// this block. >if (!isa(Src) || DefBB != cast(Src)->getParent()) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44981 - in /llvm/trunk: lib/Transforms/Scalar/CodeGenPrepare.cpp test/CodeGen/X86/opt-ext-uses.ll
On Dec 12, 2007, at 7:32 PM, Evan Cheng wrote:
> Author: evancheng
> Date: Wed Dec 12 21:32:53 2007
> New Revision: 44981
>
> URL: http://llvm.org/viewvc/llvm-project?rev=44981&view=rev
> Log:
> Be extra careful with extension use optimation. Now turned on by
> default.
FYI, on your testcase with -print-isel-input, it looks like multiple
instructions are sunk:
cond_true188: ; preds = %entry
trunc i32 %tmp180181 to i16 ; :0 [#uses=1]
trunc i32 %tmp180181 to i16 ; :1 [#uses=1]
%tmp195196 = trunc i16 %0 to i8 ; [#uses=0]
ret i16 %1
Is this desired?
-Chris
>
>
> Modified:
>llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp
>llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll
>
> Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp?rev=44981&r1=44980&r2=44981&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ==
> --- llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp (original)
> +++ llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Wed Dec 12
> 21:32:53 2007
> @@ -36,7 +36,7 @@
>
> namespace {
> cl::opt OptExtUses("optimize-ext-uses",
> - cl::init(false), cl::Hidden);
> + cl::init(true), cl::Hidden);
> }
>
> namespace {
> @@ -929,6 +929,10 @@
> if (Src->hasOneUse())
> return false;
>
> + // Only do this xform is truncating is free.
> + if (!TLI->isTruncateFree(I->getType(), Src->getType()))
> +return false;
> +
> // Only safe to perform the optimization if the source is also
> defined in
> // this block.
> if (!isa(Src) || DefBB != cast(Src)-
> >getParent())
> @@ -952,8 +956,11 @@
> for (Value::use_iterator UI = Src->use_begin(), E = Src->use_end();
>UI != E; ++UI) {
> Instruction *User = cast(*UI);
> -if (User->getParent() == DefBB) continue;
> -if (isa(User))
> +BasicBlock *UserBB = User->getParent();
> +if (UserBB == DefBB) continue;
> +// Be conservative. We don't want this xform to end up
> introducing
> +// reloads just before load / store instructions.
> +if (isa(User) || isa(User) ||
> isa(User))
> return false;
> }
>
>
> Modified: llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll?rev=44981&r1=44980&r2=44981&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ==
> --- llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll Wed Dec 12 21:32:53
> 2007
> @@ -1,4 +1,4 @@
> -; RUN: llvm-as < %s | llc -march=x86 -optimize-ext-uses=true | grep
> movw | count 1
> +; RUN: llvm-as < %s | llc -march=x86 | grep movw | count 1
>
> define i16 @t() signext {
> entry:
>
>
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[llvm-commits] [llvm] r44986 - /llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
Author: resistor
Date: Wed Dec 12 23:43:37 2007
New Revision: 44986
URL: http://llvm.org/viewvc/llvm-project?rev=44986&view=rev
Log:
Remove ugly and horrible code. It's not necessary for correctness, and can be
added back later if it causes code quality issues.
Modified:
llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=44986&r1=44985&r2=44986&view=diff
==
--- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Wed Dec 12 23:43:37 2007
@@ -330,43 +330,6 @@
LiveVariables::VarInfo& CInfo = LV.getVarInfo(child->getReg());
if (isLiveOut(Info, CInfo.DefInst->getParent())) {
-interferences.insert(child);
- } else if (isLiveIn(Info, CInfo.DefInst->getParent()) ||
- Info.DefInst->getParent() == CInfo.DefInst->getParent()) {
-// FIXME: Add (p, c) to possible local interferences
- }
-
- if (!visited.count(child)) {
-worklist.push_back(child);
-inserted = true;
- }
-}
-
-if (interferences.size() == 1) {
- DomForestNode* child = *interferences.begin();
-
- unsigned numParentCopies = 0;
- unsigned numChildCopies = 0;
- for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
-unsigned SrcReg = Inst->getOperand(i-1).getReg();
-if (SrcReg == DFNode->getReg()) numParentCopies++;
-else if (SrcReg == child->getReg()) numChildCopies++;
- }
-
- if (numParentCopies < numChildCopies) {
-// Insert copies for child
-for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
- if (Inst->getOperand(i-1).getReg() == child->getReg()) {
-unsigned SrcReg = child->getReg();
-MachineBasicBlock* From = Inst->getOperand(i).getMBB();
-
-Waiting[From].push_back(std::make_pair(SrcReg, DestReg));
-PHIUnion.erase(SrcReg);
- }
-}
-
-// FIXME: Make child's children parent's children
- } else {
// Insert copies for parent
for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
if (Inst->getOperand(i-1).getReg() == DFNode->getReg()) {
@@ -377,17 +340,14 @@
PHIUnion.erase(SrcReg);
}
}
+ } else if (isLiveIn(Info, CInfo.DefInst->getParent()) ||
+ Info.DefInst->getParent() == CInfo.DefInst->getParent()) {
+// FIXME: Add (p, c) to possible local interferences
}
-} else if (interferences.size() > 1) {
- // Insert copies for parent
- for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
-if (Inst->getOperand(i-1).getReg() == DFNode->getReg()) {
- unsigned SrcReg = DFNode->getReg();
- MachineBasicBlock* From = Inst->getOperand(i).getMBB();
-
- Waiting[From].push_back(std::make_pair(SrcReg, DestReg));
- PHIUnion.erase(SrcReg);
-}
+
+ if (!visited.count(child)) {
+worklist.push_back(child);
+inserted = true;
}
}
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[llvm-commits] [llvm] r44987 - /llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
Author: resistor
Date: Wed Dec 12 23:53:03 2007
New Revision: 44987
URL: http://llvm.org/viewvc/llvm-project?rev=44987&view=rev
Log:
Add register pairs to the list to check for local interferences.
Modified:
llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=44987&r1=44986&r2=44987&view=diff
==
--- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Wed Dec 12 23:53:03 2007
@@ -99,7 +99,8 @@
std::vector computeDomForest(std::set& instrs);
void processPHIUnion(MachineInstr* Inst,
std::set& PHIUnion,
- std::vector&
DF);
+ std::vector& DF,
+ std::vector >& locals);
void breakCriticalEdges(MachineFunction &Fn);
};
@@ -300,6 +301,10 @@
computeDomForest(PHIUnion);
// Walk DomForest to resolve interferences
+std::vector > localInterferences;
+processPHIUnion(P, PHIUnion, DF, localInterferences);
+
+// FIXME: Check for local interferences
ProcessedNames.insert(PHIUnion.begin(), PHIUnion.end());
++P;
@@ -308,7 +313,8 @@
void StrongPHIElimination::processPHIUnion(MachineInstr* Inst,
std::set& PHIUnion,
-std::vector& DF)
{
+std::vector& DF,
+std::vector >& locals) {
std::vector worklist(DF.begin(), DF.end());
SmallPtrSet visited;
@@ -323,7 +329,6 @@
visited.insert(DFNode);
bool inserted = false;
-SmallPtrSet interferences;
for (DomForestNode::iterator CI = DFNode->begin(), CE = DFNode->end();
CI != CE; ++CI) {
DomForestNode* child = *CI;
@@ -342,7 +347,8 @@
}
} else if (isLiveIn(Info, CInfo.DefInst->getParent()) ||
Info.DefInst->getParent() == CInfo.DefInst->getParent()) {
-// FIXME: Add (p, c) to possible local interferences
+// Add (p, c) to possible local interferences
+locals.push_back(std::make_pair(DFNode->getReg(), child->getReg()));
}
if (!visited.count(child)) {
___
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Re: [llvm-commits] [llvm] r44981 - in /llvm/trunk: lib/Transforms/Scalar/CodeGenPrepare.cpp test/CodeGen/X86/opt-ext-uses.ll
On Dec 12, 2007, at 8:40 PM, Chris Lattner wrote:
> On Dec 12, 2007, at 7:32 PM, Evan Cheng wrote:
>
>> Author: evancheng
>> Date: Wed Dec 12 21:32:53 2007
>> New Revision: 44981
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=44981&view=rev
>> Log:
>> Be extra careful with extension use optimation. Now turned on by
>> default.
>
> FYI, on your testcase with -print-isel-input, it looks like multiple
> instructions are sunk:
>
>
> cond_true188: ; preds = %entry
> trunc i32 %tmp180181 to i16 ; :0 [#uses=1]
> trunc i32 %tmp180181 to i16 ; :1 [#uses=1]
> %tmp195196 = trunc i16 %0 to i8 ; [#uses=0]
> ret i16 %1
>
> Is this desired?
No it's not. I'll look.
Evan
>
> -Chris
>
>>
>>
>> Modified:
>>llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp
>>llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll
>>
>> Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/
>> Scalar/CodeGenPrepare.cpp?rev=44981&r1=44980&r2=44981&view=diff
>>
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> --- llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp (original)
>> +++ llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Wed Dec 12
>> 21:32:53 2007
>> @@ -36,7 +36,7 @@
>>
>> namespace {
>> cl::opt OptExtUses("optimize-ext-uses",
>> - cl::init(false), cl::Hidden);
>> + cl::init(true), cl::Hidden);
>> }
>>
>> namespace {
>> @@ -929,6 +929,10 @@
>> if (Src->hasOneUse())
>> return false;
>>
>> + // Only do this xform is truncating is free.
>> + if (!TLI->isTruncateFree(I->getType(), Src->getType()))
>> +return false;
>> +
>> // Only safe to perform the optimization if the source is also
>> defined in
>> // this block.
>> if (!isa(Src) || DefBB != cast(Src)-
>>> getParent())
>> @@ -952,8 +956,11 @@
>> for (Value::use_iterator UI = Src->use_begin(), E = Src->use_end();
>>UI != E; ++UI) {
>> Instruction *User = cast(*UI);
>> -if (User->getParent() == DefBB) continue;
>> -if (isa(User))
>> +BasicBlock *UserBB = User->getParent();
>> +if (UserBB == DefBB) continue;
>> +// Be conservative. We don't want this xform to end up
>> introducing
>> +// reloads just before load / store instructions.
>> +if (isa(User) || isa(User) ||
>> isa(User))
>> return false;
>> }
>>
>>
>> Modified: llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/
>> X86/opt-ext-uses.ll?rev=44981&r1=44980&r2=44981&view=diff
>>
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> --- llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll (original)
>> +++ llvm/trunk/test/CodeGen/X86/opt-ext-uses.ll Wed Dec 12 21:32:53
>> 2007
>> @@ -1,4 +1,4 @@
>> -; RUN: llvm-as < %s | llc -march=x86 -optimize-ext-uses=true | grep
>> movw | count 1
>> +; RUN: llvm-as < %s | llc -march=x86 | grep movw | count 1
>>
>> define i16 @t() signext {
>> entry:
>>
>>
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[llvm-commits] [llvm] r44997 - /llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp
Author: evancheng Date: Thu Dec 13 01:50:36 2007 New Revision: 44997 URL: http://llvm.org/viewvc/llvm-project?rev=44997&view=rev Log: Fix typo. Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Modified: llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp?rev=44997&r1=44996&r2=44997&view=diff == --- llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/CodeGenPrepare.cpp Thu Dec 13 01:50:36 2007 @@ -929,7 +929,7 @@ if (Src->hasOneUse()) return false; - // Only do this xform is truncating is free. + // Only do this xform if truncating is free. if (!TLI->isTruncateFree(I->getType(), Src->getType())) return false; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44981 - in /llvm/trunk: lib/Transforms/Scalar/CodeGenPrepare.cpp test/CodeGen/X86/opt-ext-uses.ll
Fixed. Thx. Evan On Dec 12, 2007, at 8:26 PM, Nick Lewycky wrote: > Evan Cheng wrote: >> @@ -929,6 +929,10 @@ >>if (Src->hasOneUse()) >> return false; >> >> + // Only do this xform is truncating is free. > > Should read ...xform if* truncating... > >> + if (!TLI->isTruncateFree(I->getType(), Src->getType())) >> +return false; >> + >>// Only safe to perform the optimization if the source is also >> defined in >>// this block. >>if (!isa(Src) || DefBB != cast(Src)- >> >getParent()) > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
