[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp
Changes in directory llvm/lib/Target/ARM: ARMISelLowering.cpp updated: 1.8 -> 1.9 --- Log message: Observe -soft-float. --- Diffs of the changes: (+4 -3) ARMISelLowering.cpp |7 --- 1 files changed, 4 insertions(+), 3 deletions(-) Index: llvm/lib/Target/ARM/ARMISelLowering.cpp diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.8 llvm/lib/Target/ARM/ARMISelLowering.cpp:1.9 --- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.8 Tue Jan 30 14:37:08 2007 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp Wed Jan 31 02:40:13 2007 @@ -28,6 +28,7 @@ #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/SSARegMap.h" +#include "llvm/Target/TargetOptions.h" #include "llvm/ADT/VectorExtras.h" using namespace llvm; @@ -36,7 +37,7 @@ Subtarget = &TM.getSubtarget(); // Uses VFP for Thumb libfuncs if available. - if (Subtarget->isThumb() && Subtarget->hasVFP2()) { + if (!UseSoftFloat && Subtarget->isThumb() && Subtarget->hasVFP2()) { // Single-precision floating-point arithmetic. setLibcallName(RTLIB::ADD_F32, "__addsf3vfp"); setLibcallName(RTLIB::SUB_F32, "__subsf3vfp"); @@ -91,7 +92,7 @@ } addRegisterClass(MVT::i32, ARM::GPRRegisterClass); - if (Subtarget->hasVFP2() && !Subtarget->isThumb()) { + if (!UseSoftFloat && Subtarget->hasVFP2() && !Subtarget->isThumb()) { addRegisterClass(MVT::f32, ARM::SPRRegisterClass); addRegisterClass(MVT::f64, ARM::DPRRegisterClass); } @@ -173,7 +174,7 @@ } setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); - if (Subtarget->hasVFP2() && !Subtarget->isThumb()) + if (!UseSoftFloat && Subtarget->hasVFP2() && !Subtarget->isThumb()) // Turn f64->i64 into FMRRD iff target supports vfp2. setOperationAction(ISD::BIT_CONVERT, MVT::i64, Custom); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/RuntimeLibcalls.h
Changes in directory llvm/include/llvm/CodeGen: RuntimeLibcalls.h updated: 1.1 -> 1.2 --- Log message: Added O_F32 and O_64 in addition to UO_F32 and UO_64 even though by default they call the same libgcc routine. The result of the calls are "tested" differently. --- Diffs of the changes: (+2 -0) RuntimeLibcalls.h |2 ++ 1 files changed, 2 insertions(+) Index: llvm/include/llvm/CodeGen/RuntimeLibcalls.h diff -u llvm/include/llvm/CodeGen/RuntimeLibcalls.h:1.1 llvm/include/llvm/CodeGen/RuntimeLibcalls.h:1.2 --- llvm/include/llvm/CodeGen/RuntimeLibcalls.h:1.1 Fri Jan 12 16:49:32 2007 +++ llvm/include/llvm/CodeGen/RuntimeLibcalls.h Wed Jan 31 03:26:31 2007 @@ -98,6 +98,8 @@ OGT_F64, UO_F32, UO_F64, +O_F32, +O_F64, UNKNOWN_LIBCALL }; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h
Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.104 -> 1.105 --- Log message: Allow the target to override the ISD::CondCode that's to be used to test the result of the comparison libcall against zero. --- Diffs of the changes: (+16 -0) TargetLowering.h | 16 1 files changed, 16 insertions(+) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.104 llvm/include/llvm/Target/TargetLowering.h:1.105 --- llvm/include/llvm/Target/TargetLowering.h:1.104 Mon Jan 29 16:58:52 2007 +++ llvm/include/llvm/Target/TargetLowering.h Wed Jan 31 03:29:11 2007 @@ -855,6 +855,18 @@ return LibcallRoutineNames[Call]; } + /// setCmpLibcallCC - Override the default CondCode to be used to test the + /// result of the comparison libcall against zero. + void setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC) { +CmpLibcallCCs[Call] = CC; + } + + /// getCmpLibcallCC - Get the CondCode that's to be used to test the result of + /// the comparison libcall against zero. + ISD::CondCode getCmpLibcallCC(RTLIB::Libcall Call) const { +return CmpLibcallCCs[Call]; + } + protected: /// addLegalAddressScale - Add a integer (> 1) value which can be used as /// scale in the target addressing mode. Note: the ordering matters so the @@ -992,6 +1004,10 @@ /// const char *LibcallRoutineNames[RTLIB::UNKNOWN_LIBCALL]; + /// CmpLibcallCCs - The ISD::CondCode that should be used to test the result + /// of each of the comparison libcall against zero. + ISD::CondCode CmpLibcallCCs[RTLIB::UNKNOWN_LIBCALL]; + protected: /// When lowering %llvm.memset this field specifies the maximum number of /// store operations that may be substituted for the call to memset. Targets ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp TargetLowering.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.462 -> 1.463 TargetLowering.cpp updated: 1.86 -> 1.87 --- Log message: Allow the target to override the ISD::CondCode that's to be used to test the result of the comparison libcall against zero. --- Diffs of the changes: (+29 -18) LegalizeDAG.cpp| 22 -- TargetLowering.cpp | 25 + 2 files changed, 29 insertions(+), 18 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.462 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.463 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.462 Mon Jan 29 16:58:52 2007 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Jan 31 03:29:11 2007 @@ -3604,72 +3604,58 @@ if (VT == MVT::f32 || VT == MVT::f64) { // Expand into one or more soft-fp libcall(s). RTLIB::Libcall LC1, LC2 = RTLIB::UNKNOWN_LIBCALL; - ISD::CondCode CC1, CC2 = ISD::SETCC_INVALID; switch (cast(CC)->get()) { case ISD::SETEQ: case ISD::SETOEQ: LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64; -CC1 = ISD::SETEQ; break; case ISD::SETNE: case ISD::SETUNE: LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : RTLIB::UNE_F64; -CC1 = ISD::SETNE; break; case ISD::SETGE: case ISD::SETOGE: LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64; -CC1 = ISD::SETGE; break; case ISD::SETLT: case ISD::SETOLT: LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64; -CC1 = ISD::SETLT; break; case ISD::SETLE: case ISD::SETOLE: LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64; -CC1 = ISD::SETLE; break; case ISD::SETGT: case ISD::SETOGT: LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64; -CC1 = ISD::SETGT; break; case ISD::SETUO: +LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64; +break; case ISD::SETO: LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64; -CC1 = cast(CC)->get() == ISD::SETO - ? ISD::SETEQ : ISD::SETNE; break; default: LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64; -CC1 = ISD::SETNE; switch (cast(CC)->get()) { case ISD::SETONE: // SETONE = SETOLT | SETOGT LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64; - CC1 = ISD::SETLT; // Fallthrough case ISD::SETUGT: LC2 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64; - CC2 = ISD::SETGT; break; case ISD::SETUGE: LC2 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64; - CC2 = ISD::SETGE; break; case ISD::SETULT: LC2 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64; - CC2 = ISD::SETLT; break; case ISD::SETULE: LC2 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64; - CC2 = ISD::SETLE; break; case ISD::SETUEQ: LC2 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64; - CC2 = ISD::SETEQ; break; default: assert(0 && "Unsupported FP setcc!"); } @@ -3680,14 +3666,14 @@ DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val, false /*sign irrelevant*/, Dummy); Tmp2 = DAG.getConstant(0, MVT::i32); - CC = DAG.getCondCode(CC1); + CC = DAG.getCondCode(TLI.getCmpLibcallCC(LC1)); if (LC2 != RTLIB::UNKNOWN_LIBCALL) { Tmp1 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(), Tmp1, Tmp2, CC); LHS = ExpandLibCall(TLI.getLibcallName(LC2), DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val, false /*sign irrelevant*/, Dummy); Tmp2 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(), LHS, Tmp2, - DAG.getCondCode(CC2)); + DAG.getCondCode(TLI.getCmpLibcallCC(LC2))); Tmp1 = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp2); Tmp2 = SDOperand(); } Index: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp diff -u llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1.86 llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1.87 --- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1.86 Fri Jan 12 17:30:31 2007 +++ llvm/lib/CodeGen/SelectionDAG/TargetLowering.cppWed Jan 31 03:29:11 2007 @@ -94,6 +94,30 @@ Names[RTLIB::OGT_F64] = "__gtdf2"; Names[RTLIB::UO_F32] = "__unordsf2"; Names[RTLIB::UO_F64] = "__unorddf2"; + Names[RTLIB::O_F32] = "__unordsf2"; + Names[RTLIB::O_F64] = "__unorddf2"; +} + +/// InitCmpLibcallCCs - Set default comparison libcall CC. +/// +static v
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp
Changes in directory llvm/lib/Target/ARM: ARMISelLowering.cpp updated: 1.9 -> 1.10 --- Log message: Specify the right CC for comparison libcalls. --- Diffs of the changes: (+20 -0) ARMISelLowering.cpp | 20 1 files changed, 20 insertions(+) Index: llvm/lib/Target/ARM/ARMISelLowering.cpp diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.9 llvm/lib/Target/ARM/ARMISelLowering.cpp:1.10 --- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.9 Wed Jan 31 02:40:13 2007 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp Wed Jan 31 03:30:58 2007 @@ -58,6 +58,16 @@ setLibcallName(RTLIB::OGE_F32, "__gesf2vfp"); setLibcallName(RTLIB::OGT_F32, "__gtsf2vfp"); setLibcallName(RTLIB::UO_F32, "__unordsf2vfp"); +setLibcallName(RTLIB::O_F32, "__unordsf2vfp"); + +setCmpLibcallCC(RTLIB::OEQ_F32, ISD::SETNE); +setCmpLibcallCC(RTLIB::UNE_F32, ISD::SETNE); +setCmpLibcallCC(RTLIB::OLT_F32, ISD::SETNE); +setCmpLibcallCC(RTLIB::OLE_F32, ISD::SETNE); +setCmpLibcallCC(RTLIB::OGE_F32, ISD::SETNE); +setCmpLibcallCC(RTLIB::OGT_F32, ISD::SETNE); +setCmpLibcallCC(RTLIB::UO_F32, ISD::SETNE); +setCmpLibcallCC(RTLIB::O_F32, ISD::SETEQ); // Double-precision comparisons. setLibcallName(RTLIB::OEQ_F64, "__eqdf2vfp"); @@ -67,6 +77,16 @@ setLibcallName(RTLIB::OGE_F64, "__gedf2vfp"); setLibcallName(RTLIB::OGT_F64, "__gtdf2vfp"); setLibcallName(RTLIB::UO_F64, "__unorddf2vfp"); +setLibcallName(RTLIB::O_F64, "__unorddf2vfp"); + +setCmpLibcallCC(RTLIB::OEQ_F64, ISD::SETNE); +setCmpLibcallCC(RTLIB::UNE_F64, ISD::SETNE); +setCmpLibcallCC(RTLIB::OLT_F64, ISD::SETNE); +setCmpLibcallCC(RTLIB::OLE_F64, ISD::SETNE); +setCmpLibcallCC(RTLIB::OGE_F64, ISD::SETNE); +setCmpLibcallCC(RTLIB::OGT_F64, ISD::SETNE); +setCmpLibcallCC(RTLIB::UO_F64, ISD::SETNE); +setCmpLibcallCC(RTLIB::O_F64, ISD::SETEQ); // Floating-point to integer conversions. // i64 conversions are done via library routines even when generating VFP ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CodeGen/ARM/hello.ll insn-sched1.ll ldm.ll
Changes in directory llvm/test/CodeGen/ARM: hello.ll updated: 1.3 -> 1.4 insn-sched1.ll updated: 1.2 -> 1.3 ldm.ll updated: 1.3 -> 1.4 --- Log message: ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used. --- Diffs of the changes: (+3 -3) hello.ll |2 +- insn-sched1.ll |2 +- ldm.ll |2 +- 3 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/test/CodeGen/ARM/hello.ll diff -u llvm/test/CodeGen/ARM/hello.ll:1.3 llvm/test/CodeGen/ARM/hello.ll:1.4 --- llvm/test/CodeGen/ARM/hello.ll:1.3 Fri Jan 19 03:20:23 2007 +++ llvm/test/CodeGen/ARM/hello.ll Wed Jan 31 07:12:46 2007 @@ -1,6 +1,6 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && ; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | grep mov | wc -l | grep 1 && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | grep mov | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin --disable-fp-elim | grep mov | wc -l | grep 2 %str = internal constant [12 x sbyte] c"Hello World\00" Index: llvm/test/CodeGen/ARM/insn-sched1.ll diff -u llvm/test/CodeGen/ARM/insn-sched1.ll:1.2 llvm/test/CodeGen/ARM/insn-sched1.ll:1.3 --- llvm/test/CodeGen/ARM/insn-sched1.ll:1.2Mon Jan 22 12:56:11 2007 +++ llvm/test/CodeGen/ARM/insn-sched1.llWed Jan 31 07:12:46 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin -mattr=+v6 | grep mov | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin -mattr=+v6 --disable-fp-elim | grep mov | wc -l | grep 2 int %test(int %x) { %tmp = cast int %x to short Index: llvm/test/CodeGen/ARM/ldm.ll diff -u llvm/test/CodeGen/ARM/ldm.ll:1.3 llvm/test/CodeGen/ARM/ldm.ll:1.4 --- llvm/test/CodeGen/ARM/ldm.ll:1.3Mon Jan 22 17:01:22 2007 +++ llvm/test/CodeGen/ARM/ldm.llWed Jan 31 07:12:46 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "ldmia" | wc -l | grep 2 && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "ldmib" | wc -l | grep 1 && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | grep "ldmfd sp\!" | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin --disable-fp-elim | grep "ldmfd sp\!" | wc -l | grep 3 %X = external global [0 x int] ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM: ARMRegisterInfo.cpp updated: 1.47 -> 1.48 --- Log message: ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used. --- Diffs of the changes: (+9 -10) ARMRegisterInfo.cpp | 19 +-- 1 files changed, 9 insertions(+), 10 deletions(-) Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.47 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.48 --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.47Tue Jan 30 17:01:46 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Wed Jan 31 07:12:46 2007 @@ -573,8 +573,7 @@ // There is alloca()'s in this function, must reference off the frame // pointer instead. FrameReg = getFrameRegister(MF); -if (STI.isTargetDarwin()) - Offset -= AFI->getFramePtrSpillOffset(); +Offset -= AFI->getFramePtrSpillOffset(); } unsigned Opcode = MI.getOpcode(); @@ -882,6 +881,12 @@ } } + if (hasFP(MF)) { +MF.changePhyRegUsed(FramePtr, true); +NumGPRSpills++; +CanEliminateFrame = false; + } + if (!CanEliminateFrame) { AFI->setHasStackFrame(true); @@ -895,11 +900,6 @@ ForceLRSpill = false; } -if (STI.isTargetDarwin()) { - MF.changePhyRegUsed(FramePtr, true); - NumGPRSpills++; -} - // If stack and double are 8-byte aligned and we are spilling an odd number // of GPRs. Spill one extra callee save GPR so we won't have to pad between // the integer and double callee save areas. @@ -1030,7 +1030,7 @@ ++MBBI; // Point FP to the stack slot that contains the previous FP. - if (STI.isTargetDarwin()) + if (hasFP(MF)) BuildMI(MBB, MBBI, TII.get(isThumb ? ARM::tADDrSPi : ARM::ADDri), FramePtr) .addFrameIndex(FramePtrSpillFI).addImm(0); @@ -1116,7 +1116,7 @@ if (isThumb) emitSPUpdate(MBB, MBBI, NumBytes, isThumb, TII); else { -if (STI.isTargetDarwin()) { +if (hasFP(MF)){ NumBytes = AFI->getFramePtrSpillOffset() - NumBytes; // Reset SP based on frame pointer only if the stack frame extends beyond // frame pointer stack slot. @@ -1131,7 +1131,6 @@ } else if (NumBytes) { emitSPUpdate(MBB, MBBI, NumBytes, false, TII); } - // Move SP to start of integer callee save spill area 2. movePastCSLoadStoreOps(MBB, MBBI, ARM::FLDD, 3, STI); emitSPUpdate(MBB, MBBI, AFI->getDPRCalleeSavedAreaSize(), false, TII); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Analysis/ConstantFolding.cpp
Changes in directory llvm/lib/Analysis: ConstantFolding.cpp updated: 1.14 -> 1.15 --- Log message: Fix a minor bug in my patch yesterday that broken ConstProp/bswap.ll --- Diffs of the changes: (+1 -1) ConstantFolding.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Analysis/ConstantFolding.cpp diff -u llvm/lib/Analysis/ConstantFolding.cpp:1.14 llvm/lib/Analysis/ConstantFolding.cpp:1.15 --- llvm/lib/Analysis/ConstantFolding.cpp:1.14 Tue Jan 30 22:42:05 2007 +++ llvm/lib/Analysis/ConstantFolding.cpp Wed Jan 31 12:04:55 2007 @@ -210,7 +210,7 @@ case Instruction::Call: if (Function *F = dyn_cast(Ops[0])) if (canConstantFoldCallTo(F)) -return ConstantFoldCall(F, Ops+1, NumOps); +return ConstantFoldCall(F, Ops+1, NumOps-1); return 0; case Instruction::ICmp: case Instruction::FCmp: ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.616 -> 1.617 --- Log message: Revert another incorrectly applied chunk, which fixes InstCombine/vec_insert_to_shuffle.ll --- Diffs of the changes: (+0 -7) InstructionCombining.cpp |7 --- 1 files changed, 7 deletions(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.616 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.617 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.616 Tue Jan 30 22:40:53 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Wed Jan 31 12:09:17 2007 @@ -8992,13 +8992,6 @@ } } - // See if SimplifyDemandedVectorElts can simplify based on this shuffle. For - // example, if this is a splat, then we only demand from one input element. - uint64_t UndefElts; - if (Value *V = SimplifyDemandedVectorElts(&SVI, (1ULL << Mask.size())-1, -UndefElts)) -return ReplaceInstUsesWith(SVI, V); - return MadeChange ? &SVI : 0; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Changes in directory llvm/lib/Target/ARM: ARMConstantIslandPass.cpp updated: 1.14 -> 1.15 --- Log message: ConstPool island bug: watch out for cases where UserMI is the last MI of the BB. --- Diffs of the changes: (+16 -4) ARMConstantIslandPass.cpp | 20 1 files changed, 16 insertions(+), 4 deletions(-) Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.14 llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.15 --- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.14 Tue Jan 30 20:22:22 2007 +++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Wed Jan 31 12:19:07 2007 @@ -461,6 +461,7 @@ /// is out-of-range. If so, pick it up the constant pool value and move it some /// place in-range. bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn, CPUser &U){ + bool isThumb = AFI->isThumbFunction(); MachineInstr *UserMI = U.MI; MachineInstr *CPEMI = U.CPEMI; @@ -477,7 +478,7 @@ // User before the CPE. if (CPEOffset-UserOffset <= U.MaxDisp) return false; - } else if (!AFI->isThumbFunction()) { + } else if (!isThumb) { // Thumb LDR cannot encode negative offset. if (UserOffset-CPEOffset <= U.MaxDisp) return false; @@ -487,15 +488,26 @@ // Solution guaranteed to work: split the user's MBB right after the user and // insert a clone the CPE into the newly created water. - MachineInstr *NextMI = next(MachineBasicBlock::iterator(UserMI)); + MachineBasicBlock *UserMBB = UserMI->getParent(); + MachineBasicBlock *NewMBB; + // TODO: Search for the best place to split the code. In practice, using // loop nesting information to insert these guys outside of loops would be // sufficient. - MachineBasicBlock *NewBB = SplitBlockBeforeInstr(NextMI); + if (&UserMBB->back() == UserMI) { +assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!"); +NewMBB = next(MachineFunction::iterator(UserMBB)); +// Add an unconditional branch from UserMBB to fallthrough block. +BuildMI(UserMBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewMBB); +BBSizes[UserMBB->getNumber()] += isThumb ? 2 : 4; + } else { +MachineInstr *NextMI = next(MachineBasicBlock::iterator(UserMI)); +NewMBB = SplitBlockBeforeInstr(NextMI); + } // Okay, we know we can put an island before UserMBB now, do it! MachineBasicBlock *NewIsland = new MachineBasicBlock(); - Fn.getBasicBlockList().insert(NewBB, NewIsland); + Fn.getBasicBlockList().insert(NewMBB, NewIsland); // Update internal data structures to account for the newly inserted MBB. UpdateForInsertedWaterBlock(NewIsland); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Changes in directory llvm/lib/Target/ARM: ARMConstantIslandPass.cpp updated: 1.15 -> 1.16 --- Log message: Some comments. --- Diffs of the changes: (+6 -2) ARMConstantIslandPass.cpp |8 ++-- 1 files changed, 6 insertions(+), 2 deletions(-) Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.15 llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.16 --- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.15 Wed Jan 31 12:19:07 2007 +++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Wed Jan 31 12:29:27 2007 @@ -420,6 +420,7 @@ NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end()); // Add an unconditional branch from OrigBB to NewBB. + // Note the new unconditional branch is not being recorded. BuildMI(OrigBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewBB); NumSplit++; @@ -498,6 +499,7 @@ assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!"); NewMBB = next(MachineFunction::iterator(UserMBB)); // Add an unconditional branch from UserMBB to fallthrough block. +// Note the new unconditional branch is not being recorded. BuildMI(UserMBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewMBB); BBSizes[UserMBB->getNumber()] += isThumb ? 2 : 4; } else { @@ -590,7 +592,9 @@ return true; } -static inline unsigned getUncondBranchDisp(int Opc) { +/// getUnconditionalBrDisp - Returns the maximum displacement that can fit in the +/// specific unconditional branch instruction. +static inline unsigned getUnconditionalBrDisp(int Opc) { return (Opc == ARM::tB) ? (1<<10)*2 : (1<<23)*4; } @@ -653,7 +657,7 @@ BuildMI(MBB, TII->get(MI->getOpcode())).addMBB(NextBB).addImm(CC); Br.MI = &MBB->back(); BuildMI(MBB, TII->get(Br.UncondBr)).addMBB(DestBB); - unsigned MaxDisp = getUncondBranchDisp(Br.UncondBr); + unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr); ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr)); MI->eraseFromParent(); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] llvm-gcc4: gimplifier fixes
Applied, -Chris Begin forwarded message: From: Duncan Sands <[EMAIL PROTECTED]> Date: January 31, 2007 11:17:37 AM PST To: Chris Lattner <[EMAIL PROTECTED]> Subject: llvm-gcc4: gimplifier fixes isAggregateType, defined in llvm-convert, is identical to isAggregateTreeType, defined in llvm-abi.h. Even the comment is the same. Ciao, Duncan.Index: gcc.llvm.master/gcc/llvm-convert.cpp === --- gcc.llvm.master.orig/gcc/llvm-convert.cpp 2007-01-26 19:25:52.0 +0100 +++ gcc.llvm.master/gcc/llvm-convert.cpp 2007-01-26 19:27:05.0 +0100 @@ -60,13 +60,6 @@ extern int get_pointer_alignment (tree exp, unsigned int max_align); } -/// isAggregateType - Return true if the specified GCC type is an aggregate that -/// cannot live in an LLVM register. -static bool isAggregateType(tree type) { - return TREE_CODE(type) == RECORD_TYPE || TREE_CODE(type) == ARRAY_TYPE || - TREE_CODE(type) == UNION_TYPE || TREE_CODE(type) == COMPLEX_TYPE; -} - /// isGCC_SSA_Temporary - Return true if this is an SSA temporary that we can /// directly compile into an LLVM temporary. This saves us from creating an /// alloca and creating loads/stores of that alloca (a compile-time win). We @@ -75,7 +68,7 @@ static bool isGCC_SSA_Temporary(tree decl) { return TREE_CODE(decl) == VAR_DECL && DECL_GIMPLE_FORMAL_TEMP_P(decl) && !TREE_ADDRESSABLE(decl) && - !isAggregateType(TREE_TYPE(decl)); + !isAggregateTreeType(TREE_TYPE(decl)); } /// isStructWithVarSizeArrayAtEnd - Return true if this StructType contains a @@ -482,7 +475,7 @@ Value *TreeToLLVM::Emit(tree exp, Value *DestLoc) { - assert((isAggregateType(TREE_TYPE(exp)) == (DestLoc != 0) || + assert((isAggregateTreeType(TREE_TYPE(exp)) == (DestLoc != 0) || TREE_CODE(exp) == MODIFY_EXPR) && "Didn't pass DestLoc to an aggregate expr, or passed it to scalar!"); @@ -1274,7 +1267,7 @@ // If this stmt returns an aggregate value (e.g. a call whose result is // ignored), create a temporary to receive the value. Note that we don't // do this for MODIFY_EXPRs as an efficiency hack. -if (isAggregateType(TREE_TYPE(stmt)) && TREE_CODE(stmt) != MODIFY_EXPR) +if (isAggregateTreeType(TREE_TYPE(stmt)) && TREE_CODE(stmt) != MODIFY_EXPR) DestLoc = CreateTemporary(ConvertType(TREE_TYPE(stmt))); Emit(stmt, DestLoc); @@ -2243,11 +2236,12 @@ bool ExpIsSigned = !TYPE_UNSIGNED(TREE_TYPE(exp)); if (DestLoc == 0) { // Scalar to scalar copy. -assert(!isAggregateType(TREE_TYPE(Op)) && "Aggregate to scalar nop_expr!"); +assert(!isAggregateTreeType(TREE_TYPE(Op)) + && "Aggregate to scalar nop_expr!"); Value *OpVal = Emit(Op, DestLoc); if (Ty == Type::VoidTy) return 0; return CastToAnyType(OpVal, OpIsSigned, Ty, ExpIsSigned); - } else if (isAggregateType(TREE_TYPE(Op))) { + } else if (isAggregateTreeType(TREE_TYPE(Op))) { // Aggregate to aggregate copy. DestLoc = CastToType(Instruction::BitCast, DestLoc, PointerType::get(Ty)); Value *OpVal = Emit(Op, DestLoc); @@ -2275,7 +2269,7 @@ tree Op = TREE_OPERAND(exp, 0); const Type *OpTy = ConvertType(TREE_TYPE(Op)); - if (isAggregateType(TREE_TYPE(Op))) { + if (isAggregateTreeType(TREE_TYPE(Op))) { if (DestLoc) { // This is an aggregate-to-agg VIEW_CONVERT_EXPR, just evaluate in place. Value *OpVal = Emit(Op, CastToType(Instruction::BitCast, DestLoc, @@ -3831,7 +3825,7 @@ Value *Arg1 = Emit(Arg1T, 0); // Emit the address of the destination. // The second arg of llvm.va_copy is a pointer to a valist. Value *Arg2; - if (!isAggregateType(TREE_TYPE(Arg2T))) { + if (!isAggregateTreeType(TREE_TYPE(Arg2T))) { // Emit it as a value, then store it to a temporary slot. Value *V2 = Emit(Arg2T, 0); Arg2 = CreateTemporary(V2->getType()); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/Instructions.cpp
Changes in directory llvm/lib/VMCore: Instructions.cpp updated: 1.67 -> 1.68 --- Log message: implement the new GEP instruction ctors. --- Diffs of the changes: (+23 -5) Instructions.cpp | 28 +++- 1 files changed, 23 insertions(+), 5 deletions(-) Index: llvm/lib/VMCore/Instructions.cpp diff -u llvm/lib/VMCore/Instructions.cpp:1.67 llvm/lib/VMCore/Instructions.cpp:1.68 --- llvm/lib/VMCore/Instructions.cpp:1.67 Tue Jan 30 22:40:28 2007 +++ llvm/lib/VMCore/Instructions.cppWed Jan 31 13:47:18 2007 @@ -684,12 +684,12 @@ return Ty; } -void GetElementPtrInst::init(Value *Ptr, const std::vector &Idx) { - NumOperands = 1+Idx.size(); +void GetElementPtrInst::init(Value *Ptr, Value* const *Idx, unsigned NumIdx) { + NumOperands = 1+NumIdx; Use *OL = OperandList = new Use[NumOperands]; OL[0].init(Ptr, this); - for (unsigned i = 0, e = Idx.size(); i != e; ++i) + for (unsigned i = 0; i != NumIdx; ++i) OL[i+1].init(Idx[i], this); } @@ -713,7 +713,7 @@ : Instruction(PointerType::get(checkType(getIndexedType(Ptr->getType(), Idx, true))), GetElementPtr, 0, 0, Name, InBe) { - init(Ptr, Idx); + init(Ptr, &Idx[0], Idx.size()); } GetElementPtrInst::GetElementPtrInst(Value *Ptr, const std::vector &Idx, @@ -721,7 +721,25 @@ : Instruction(PointerType::get(checkType(getIndexedType(Ptr->getType(), Idx, true))), GetElementPtr, 0, 0, Name, IAE) { - init(Ptr, Idx); + init(Ptr, &Idx[0], Idx.size()); +} + +GetElementPtrInst::GetElementPtrInst(Value *Ptr, Value* const *Idx, + unsigned NumIdx, + const std::string &Name, Instruction *InBe) +: Instruction(PointerType::get(checkType(getIndexedType(Ptr->getType(), +Idx, true))), + GetElementPtr, 0, 0, Name, InBe) { + init(Ptr, Idx, NumIdx); +} + +GetElementPtrInst::GetElementPtrInst(Value *Ptr, Value* const *Idx, + unsigned NumIdx, + const std::string &Name, BasicBlock *IAE) +: Instruction(PointerType::get(checkType(getIndexedType(Ptr->getType(), +Idx, true))), + GetElementPtr, 0, 0, Name, IAE) { + init(Ptr, Idx, NumIdx); } GetElementPtrInst::GetElementPtrInst(Value *Ptr, Value *Idx, ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Instructions.h
Changes in directory llvm/include/llvm: Instructions.h updated: 1.51 -> 1.52 --- Log message: implement the new GEP instruction ctors. --- Diffs of the changes: (+1 -1) Instructions.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/Instructions.h diff -u llvm/include/llvm/Instructions.h:1.51 llvm/include/llvm/Instructions.h:1.52 --- llvm/include/llvm/Instructions.h:1.51 Tue Jan 30 22:39:29 2007 +++ llvm/include/llvm/Instructions.hWed Jan 31 13:47:18 2007 @@ -336,7 +336,7 @@ for (unsigned i = 0, E = NumOperands; i != E; ++i) OL[i].init(GEPIOL[i], this); } - void init(Value *Ptr, const std::vector &Idx); + void init(Value *Ptr, Value* const *Idx, unsigned NumIdx); void init(Value *Ptr, Value *Idx0, Value *Idx1); void init(Value *Ptr, Value *Idx); public: ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/README.txt
Changes in directory llvm/lib/Target/PowerPC: README.txt updated: 1.108 -> 1.109 --- Log message: A relatively simple PPC optimization. --- Diffs of the changes: (+27 -0) README.txt | 27 +++ 1 files changed, 27 insertions(+) Index: llvm/lib/Target/PowerPC/README.txt diff -u llvm/lib/Target/PowerPC/README.txt:1.108 llvm/lib/Target/PowerPC/README.txt:1.109 --- llvm/lib/Target/PowerPC/README.txt:1.108Mon Jan 29 15:21:22 2007 +++ llvm/lib/Target/PowerPC/README.txt Wed Jan 31 13:49:20 2007 @@ -595,3 +595,30 @@ it. ===-=== + +We compile this: +int test(_Bool X) { + return X ? 524288 : 0; +} + +to: +_test: +cmplwi cr0, r3, 0 +lis r2, 8 +li r3, 0 +beq cr0, LBB1_2 ;entry +LBB1_1: ;entry +mr r3, r2 +LBB1_2: ;entry +blr + +instead of: +_test: +addic r2,r3,-1 +subfe r0,r2,r3 +slwi r3,r0,19 +blr + +This sort of thing occurs a lot due to globalopt. + +===-=== ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Bytecode/Reader/Reader.cpp
Changes in directory llvm/lib/Bytecode/Reader: Reader.cpp updated: 1.227 -> 1.228 --- Log message: eliminate a temporary vector while parsing gep's from bc files. --- Diffs of the changes: (+6 -3) Reader.cpp |9 ++--- 1 files changed, 6 insertions(+), 3 deletions(-) Index: llvm/lib/Bytecode/Reader/Reader.cpp diff -u llvm/lib/Bytecode/Reader/Reader.cpp:1.227 llvm/lib/Bytecode/Reader/Reader.cpp:1.228 --- llvm/lib/Bytecode/Reader/Reader.cpp:1.227 Tue Jan 30 22:43:00 2007 +++ llvm/lib/Bytecode/Reader/Reader.cpp Wed Jan 31 13:56:15 2007 @@ -30,6 +30,7 @@ #include "llvm/Support/GetElementPtrTypeIterator.h" #include "llvm/Support/Compressor.h" #include "llvm/Support/MathExtras.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringExtras.h" #include #include @@ -799,7 +800,7 @@ if (Oprnds.size() == 0 || !isa(InstTy)) error("Invalid getelementptr instruction!"); - std::vector Idx; + SmallVector Idx; const Type *NextTy = InstTy; for (unsigned i = 1, e = Oprnds.size(); i != e; ++i) { @@ -823,10 +824,12 @@ ValIdx >>= 1; } Idx.push_back(getValue(IdxTy, ValIdx)); -NextTy = GetElementPtrInst::getIndexedType(InstTy, Idx, true); +NextTy = GetElementPtrInst::getIndexedType(InstTy, &Idx[0], Idx.size(), + true); } - Result = new GetElementPtrInst(getValue(iType, Oprnds[0]), Idx); + Result = new GetElementPtrInst(getValue(iType, Oprnds[0]), + &Idx[0], Idx.size()); break; } case 62: // volatile load ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Changes in directory llvm/lib/Target/ARM: ARMConstantIslandPass.cpp updated: 1.16 -> 1.17 --- Log message: When determining whether a pc relative branch / load displacement fits in the instruction field, adjust it for PC value (4 for thumb, 8 for arm). --- Diffs of the changes: (+42 -27) ARMConstantIslandPass.cpp | 69 -- 1 files changed, 42 insertions(+), 27 deletions(-) Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.16 llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.17 --- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.16 Wed Jan 31 12:29:27 2007 +++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Wed Jan 31 13:57:44 2007 @@ -115,7 +115,8 @@ MachineBasicBlock *SplitBlockBeforeInstr(MachineInstr *MI); void UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB); bool HandleConstantPoolUser(MachineFunction &Fn, CPUser &U); -bool BBIsInBranchRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned D); +bool CPEIsInRange(MachineInstr *MI, MachineInstr *CPEMI, unsigned Disp); +bool BBIsInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp); bool FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br); bool FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br); bool FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br); @@ -458,33 +459,41 @@ return NewBB; } -/// HandleConstantPoolUser - Analyze the specified user, checking to see if it -/// is out-of-range. If so, pick it up the constant pool value and move it some -/// place in-range. -bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn, CPUser &U){ - bool isThumb = AFI->isThumbFunction(); - MachineInstr *UserMI = U.MI; - MachineInstr *CPEMI = U.CPEMI; - - unsigned UserOffset = GetOffsetOf(UserMI); +/// CPEIsInRange - Returns true is the distance between specific MI and +/// specific ConstPool entry instruction can fit in MI's displacement field. +bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, MachineInstr *CPEMI, + unsigned MaxDisp) { + unsigned PCAdj = AFI->isThumbFunction() ? 4 : 8; + unsigned UserOffset = GetOffsetOf(MI) + PCAdj; unsigned CPEOffset = GetOffsetOf(CPEMI); DEBUG(std::cerr << "User of CPE#" << CPEMI->getOperand(0).getImm() - << " max delta=" << U.MaxDisp + << " max delta=" << MaxDisp << " at offset " << int(UserOffset-CPEOffset) << "\t" - << *UserMI); + << *MI); - // Check to see if the CPE is already in-range. if (UserOffset < CPEOffset) { // User before the CPE. -if (CPEOffset-UserOffset <= U.MaxDisp) - return false; - } else if (!isThumb) { +if (CPEOffset-UserOffset <= MaxDisp) + return true; + } else if (!AFI->isThumbFunction()) { // Thumb LDR cannot encode negative offset. -if (UserOffset-CPEOffset <= U.MaxDisp) - return false; +if (UserOffset-CPEOffset <= MaxDisp) + return true; } - + return false; +} + +/// HandleConstantPoolUser - Analyze the specified user, checking to see if it +/// is out-of-range. If so, pick it up the constant pool value and move it some +/// place in-range. +bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn, CPUser &U){ + MachineInstr *UserMI = U.MI; + MachineInstr *CPEMI = U.CPEMI; + + // Check to see if the CPE is already in-range. + if (CPEIsInRange(UserMI, CPEMI, U.MaxDisp)) +return false; // Solution guaranteed to work: split the user's MBB right after the user and // insert a clone the CPE into the newly created water. @@ -500,6 +509,7 @@ NewMBB = next(MachineFunction::iterator(UserMBB)); // Add an unconditional branch from UserMBB to fallthrough block. // Note the new unconditional branch is not being recorded. +bool isThumb = AFI->isThumbFunction(); BuildMI(UserMBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewMBB); BBSizes[UserMBB->getNumber()] += isThumb ? 2 : 4; } else { @@ -540,15 +550,19 @@ return true; } -/// BBIsInBranchRange - Returns true is the distance between specific MI and +/// BBIsInRange - Returns true is the distance between specific MI and /// specific BB can fit in MI's displacement field. -bool ARMConstantIslands::BBIsInBranchRange(MachineInstr *MI, - MachineBasicBlock *DestBB, - unsigned MaxDisp) { - unsigned BrOffset = GetOffsetOf(MI); +bool ARMConstantIslands::BBIsInRange(MachineInstr *MI,MachineBasicBlock *DestBB, + unsigned MaxDisp) { + unsigned PCAdj = AFI->isThumbFunction() ? 4 : 8; + unsigned BrOffset = GetOffsetOf(MI) + PCAdj; unsigned DestOffset = GetOffsetOf(DestBB); - // Check to see if the destination BB is in range. + DEBUG(std::cerr << "Branch o
[llvm-commits] CVS: llvm/lib/Transforms/IPO/GlobalOpt.cpp SimplifyLibCalls.cpp
Changes in directory llvm/lib/Transforms/IPO: GlobalOpt.cpp updated: 1.92 -> 1.93 SimplifyLibCalls.cpp updated: 1.90 -> 1.91 --- Log message: eliminate temporary vectors --- Diffs of the changes: (+8 -12) GlobalOpt.cpp| 11 +-- SimplifyLibCalls.cpp |9 +++-- 2 files changed, 8 insertions(+), 12 deletions(-) Index: llvm/lib/Transforms/IPO/GlobalOpt.cpp diff -u llvm/lib/Transforms/IPO/GlobalOpt.cpp:1.92 llvm/lib/Transforms/IPO/GlobalOpt.cpp:1.93 --- llvm/lib/Transforms/IPO/GlobalOpt.cpp:1.92 Tue Jan 30 22:40:53 2007 +++ llvm/lib/Transforms/IPO/GlobalOpt.cpp Wed Jan 31 13:59:55 2007 @@ -452,11 +452,11 @@ &Idxs[0], Idxs.size()); } else { GetElementPtrInst *GEPI = cast(GEP); -std::vector Idxs; +SmallVector Idxs; Idxs.push_back(NullInt); for (unsigned i = 3, e = GEPI->getNumOperands(); i != e; ++i) Idxs.push_back(GEPI->getOperand(i)); -NewPtr = new GetElementPtrInst(NewPtr, Idxs, +NewPtr = new GetElementPtrInst(NewPtr, &Idxs[0], Idxs.size(), GEPI->getName()+"."+utostr(Val), GEPI); } GEP->replaceAllUsesWith(NewPtr); @@ -684,10 +684,9 @@ MallocInst *NewMI = new MallocInst(NewTy, Constant::getNullValue(Type::Int32Ty), MI->getAlignment(), MI->getName(), MI); -std::vector Indices; -Indices.push_back(Constant::getNullValue(Type::Int32Ty)); -Indices.push_back(Indices[0]); -Value *NewGEP = new GetElementPtrInst(NewMI, Indices, +Value* Indices[2]; +Indices[0] = Indices[1] = Constant::getNullValue(Type::Int32Ty); +Value *NewGEP = new GetElementPtrInst(NewMI, Indices, 2, NewMI->getName()+".el0", MI); MI->replaceAllUsesWith(NewGEP); MI->eraseFromParent(); Index: llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp diff -u llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.90 llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.91 --- llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp:1.90 Tue Jan 30 14:08:38 2007 +++ llvm/lib/Transforms/IPO/SimplifyLibCalls.cppWed Jan 31 13:59:55 2007 @@ -505,10 +505,8 @@ // Now that we have the destination's length, we must index into the // destination's pointer to get the actual memcpy destination (end of // the string .. we're concatenating). -std::vector idx; -idx.push_back(strlen_inst); GetElementPtrInst* gep = - new GetElementPtrInst(dest,idx,dest->getName()+".indexed",ci); + new GetElementPtrInst(dest, strlen_inst, dest->getName()+".indexed", ci); // We have enough information to now generate the memcpy call to // do the concatenation for us. @@ -596,9 +594,8 @@ // strchr(s,c) -> offset_of_in(c,s) //(if c is a constant integer and s is a constant string) if (char_found) { - std::vector indices; - indices.push_back(ConstantInt::get(Type::Int64Ty,offset)); - GetElementPtrInst* GEP = new GetElementPtrInst(ci->getOperand(1),indices, + Value* Idx = ConstantInt::get(Type::Int64Ty,offset); + GetElementPtrInst* GEP = new GetElementPtrInst(ci->getOperand(1), Idx, ci->getOperand(1)->getName()+".strchr",ci); ci->replaceAllUsesWith(GEP); } else { ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Utils/CodeExtractor.cpp
Changes in directory llvm/lib/Transforms/Utils: CodeExtractor.cpp updated: 1.47 -> 1.48 --- Log message: eliminate temporary vectors --- Diffs of the changes: (+13 -16) CodeExtractor.cpp | 29 + 1 files changed, 13 insertions(+), 16 deletions(-) Index: llvm/lib/Transforms/Utils/CodeExtractor.cpp diff -u llvm/lib/Transforms/Utils/CodeExtractor.cpp:1.47 llvm/lib/Transforms/Utils/CodeExtractor.cpp:1.48 --- llvm/lib/Transforms/Utils/CodeExtractor.cpp:1.47Thu Jan 11 22:24:46 2007 +++ llvm/lib/Transforms/Utils/CodeExtractor.cpp Wed Jan 31 14:07:32 2007 @@ -303,12 +303,12 @@ for (unsigned i = 0, e = inputs.size(); i != e; ++i) { Value *RewriteVal; if (AggregateArgs) { - std::vector Indices; - Indices.push_back(Constant::getNullValue(Type::Int32Ty)); - Indices.push_back(ConstantInt::get(Type::Int32Ty, i)); + Value *Idx0 = Constant::getNullValue(Type::Int32Ty); + Value *Idx1 = ConstantInt::get(Type::Int32Ty, i); std::string GEPname = "gep_" + inputs[i]->getName(); TerminatorInst *TI = newFunction->begin()->getTerminator(); - GetElementPtrInst *GEP = new GetElementPtrInst(AI, Indices, GEPname, TI); + GetElementPtrInst *GEP = new GetElementPtrInst(AI, Idx0, Idx1, + GEPname, TI); RewriteVal = new LoadInst(GEP, "load" + GEPname, TI); } else RewriteVal = AI++; @@ -390,11 +390,10 @@ params.push_back(Struct); for (unsigned i = 0, e = inputs.size(); i != e; ++i) { - std::vector Indices; - Indices.push_back(Constant::getNullValue(Type::Int32Ty)); - Indices.push_back(ConstantInt::get(Type::Int32Ty, i)); + Value *Idx0 = Constant::getNullValue(Type::Int32Ty); + Value *Idx1 = ConstantInt::get(Type::Int32Ty, i); GetElementPtrInst *GEP = -new GetElementPtrInst(Struct, Indices, +new GetElementPtrInst(Struct, Idx0, Idx1, "gep_" + StructValues[i]->getName()); codeReplacer->getInstList().push_back(GEP); StoreInst *SI = new StoreInst(StructValues[i], GEP); @@ -416,11 +415,10 @@ for (unsigned i = 0, e = outputs.size(); i != e; ++i) { Value *Output = 0; if (AggregateArgs) { - std::vector Indices; - Indices.push_back(Constant::getNullValue(Type::Int32Ty)); - Indices.push_back(ConstantInt::get(Type::Int32Ty, FirstOut + i)); + Value *Idx0 = Constant::getNullValue(Type::Int32Ty); + Value *Idx1 = ConstantInt::get(Type::Int32Ty, FirstOut + i); GetElementPtrInst *GEP -= new GetElementPtrInst(Struct, Indices, += new GetElementPtrInst(Struct, Idx0, Idx1, "gep_reload_" + outputs[i]->getName()); codeReplacer->getInstList().push_back(GEP); Output = GEP; @@ -517,11 +515,10 @@ if (DominatesDef) { if (AggregateArgs) { -std::vector Indices; -Indices.push_back(Constant::getNullValue(Type::Int32Ty)); - Indices.push_back(ConstantInt::get(Type::Int32Ty,FirstOut+out)); +Value *Idx0 = Constant::getNullValue(Type::Int32Ty); +Value *Idx1 = ConstantInt::get(Type::Int32Ty,FirstOut+out); GetElementPtrInst *GEP = - new GetElementPtrInst(OAI, Indices, + new GetElementPtrInst(OAI, Idx0, Idx1, "gep_" + outputs[out]->getName(), NTRet); new StoreInst(outputs[out], GEP, NTRet); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/ADT/SmallVector.h
Changes in directory llvm/include/llvm/ADT: SmallVector.h updated: 1.22 -> 1.23 --- Log message: add missing ctor --- Diffs of the changes: (+7 -0) SmallVector.h |7 +++ 1 files changed, 7 insertions(+) Index: llvm/include/llvm/ADT/SmallVector.h diff -u llvm/include/llvm/ADT/SmallVector.h:1.22 llvm/include/llvm/ADT/SmallVector.h:1.23 --- llvm/include/llvm/ADT/SmallVector.h:1.22Sun Oct 29 23:07:51 2006 +++ llvm/include/llvm/ADT/SmallVector.h Wed Jan 31 14:08:34 2007 @@ -418,6 +418,13 @@ SmallVector() : SmallVectorImpl(NumTsAvailable) { } + SmallVector(unsigned Size, const T &Value) +: SmallVectorImpl(NumTsAvailable) { +this->reserve(Size); +while (Size--) + push_back(Value); + } + template SmallVector(ItTy S, ItTy E) : SmallVectorImpl(NumTsAvailable) { append(S, E); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp InstructionCombining.cpp LowerGC.cpp
Changes in directory llvm/lib/Transforms/Scalar: IndVarSimplify.cpp updated: 1.107 -> 1.108 InstructionCombining.cpp updated: 1.617 -> 1.618 LowerGC.cpp updated: 1.19 -> 1.20 --- Log message: remove temporary vectors. --- Diffs of the changes: (+9 -13) IndVarSimplify.cpp |3 +-- InstructionCombining.cpp |4 ++-- LowerGC.cpp | 15 ++- 3 files changed, 9 insertions(+), 13 deletions(-) Index: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp diff -u llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.107 llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.108 --- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.107 Tue Jan 30 22:40:53 2007 +++ llvm/lib/Transforms/Scalar/IndVarSimplify.cpp Wed Jan 31 14:08:52 2007 @@ -197,8 +197,7 @@ std::string Name = PN->getName(); PN->setName(""); Value *PreInc = new GetElementPtrInst(PN->getIncomingValue(PreheaderIdx), -std::vector(1, NewPhi), Name, -InsertPos); +NewPhi, Name, InsertPos); PN->replaceAllUsesWith(PreInc); } Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.617 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.618 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.617 Wed Jan 31 12:09:17 2007 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Wed Jan 31 14:08:52 2007 @@ -6418,8 +6418,8 @@ // If we found a path from the src to dest, create the getelementptr now. if (SrcElTy == DstElTy) { -std::vector Idxs(NumZeros+1, ZeroUInt); -return new GetElementPtrInst(Src, Idxs); +SmallVector Idxs(NumZeros+1, ZeroUInt); +return new GetElementPtrInst(Src, &Idxs[0], Idxs.size()); } } } Index: llvm/lib/Transforms/Scalar/LowerGC.cpp diff -u llvm/lib/Transforms/Scalar/LowerGC.cpp:1.19 llvm/lib/Transforms/Scalar/LowerGC.cpp:1.20 --- llvm/lib/Transforms/Scalar/LowerGC.cpp:1.19 Tue Jan 30 14:08:38 2007 +++ llvm/lib/Transforms/Scalar/LowerGC.cpp Wed Jan 31 14:08:52 2007 @@ -229,10 +229,7 @@ Constant *One = ConstantInt::get(Type::Int32Ty, 1); // Get a pointer to the prev pointer. - std::vector Par; - Par.push_back(Zero); - Par.push_back(Zero); - Value *PrevPtrPtr = new GetElementPtrInst(AI, Par, "prevptrptr", IP); + Value *PrevPtrPtr = new GetElementPtrInst(AI, Zero, Zero, "prevptrptr", IP); // Load the previous pointer. Value *PrevPtr = new LoadInst(RootChain, "prevptr", IP); @@ -240,12 +237,12 @@ new StoreInst(PrevPtr, PrevPtrPtr, IP); // Set the number of elements in this record. - Par[1] = ConstantInt::get(Type::Int32Ty, 1); - Value *NumEltsPtr = new GetElementPtrInst(AI, Par, "numeltsptr", IP); + Value *NumEltsPtr = new GetElementPtrInst(AI, Zero, One, "numeltsptr", IP); new StoreInst(ConstantInt::get(Type::Int32Ty, GCRoots.size()), NumEltsPtr,IP); + Value* Par[4]; + Par[0] = Zero; Par[1] = ConstantInt::get(Type::Int32Ty, 2); - Par.resize(4); const PointerType *PtrLocTy = cast(GCRootInt->getFunctionType()->getParamType(0)); @@ -256,13 +253,13 @@ // Initialize the meta-data pointer. Par[2] = ConstantInt::get(Type::Int32Ty, i); Par[3] = One; -Value *MetaDataPtr = new GetElementPtrInst(AI, Par, "MetaDataPtr", IP); +Value *MetaDataPtr = new GetElementPtrInst(AI, Par, 4, "MetaDataPtr", IP); assert(isa(GCRoots[i]->getOperand(2)) && "Must be a constant"); new StoreInst(GCRoots[i]->getOperand(2), MetaDataPtr, IP); // Initialize the root pointer to null on entry to the function. Par[3] = Zero; -Value *RootPtrPtr = new GetElementPtrInst(AI, Par, "RootEntPtr", IP); +Value *RootPtrPtr = new GetElementPtrInst(AI, Par, 4, "RootEntPtr", IP); new StoreInst(Null, RootPtrPtr, IP); // Each occurrance of the llvm.gcroot intrinsic now turns into an ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/tools/gccld/gccld.cpp
Changes in directory llvm/tools/gccld: gccld.cpp updated: 1.115 -> 1.116 --- Log message: shutdown the app when done. --- Diffs of the changes: (+3 -1) gccld.cpp |4 +++- 1 files changed, 3 insertions(+), 1 deletion(-) Index: llvm/tools/gccld/gccld.cpp diff -u llvm/tools/gccld/gccld.cpp:1.115 llvm/tools/gccld/gccld.cpp:1.116 --- llvm/tools/gccld/gccld.cpp:1.115Wed Dec 6 19:30:31 2006 +++ llvm/tools/gccld/gccld.cpp Wed Jan 31 14:10:54 2007 @@ -29,6 +29,7 @@ #include "llvm/Transforms/IPO.h" #include "llvm/Transforms/Scalar.h" #include "llvm/Support/CommandLine.h" +#include "llvm/Support/ManagedStatic.h" #include "llvm/Support/FileUtilities.h" #include "llvm/Support/ManagedStatic.h" #include "llvm/Support/Streams.h" @@ -420,6 +421,7 @@ cerr << argv[0] << ": An unexpected unknown exception occurred.\n"; exitCode = 3; } - + + llvm_shutdown(); return exitCode; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrThumb.td
Changes in directory llvm/lib/Target/ARM: ARMInstrThumb.td updated: 1.10 -> 1.11 --- Log message: Thumb asm syntax does not want 's' suffix for flag setting opcodes. --- Diffs of the changes: (+2 -2) ARMInstrThumb.td |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/ARM/ARMInstrThumb.td diff -u llvm/lib/Target/ARM/ARMInstrThumb.td:1.10 llvm/lib/Target/ARM/ARMInstrThumb.td:1.11 --- llvm/lib/Target/ARM/ARMInstrThumb.td:1.10 Tue Jan 30 14:37:08 2007 +++ llvm/lib/Target/ARM/ARMInstrThumb.tdWed Jan 31 14:12:31 2007 @@ -284,7 +284,7 @@ [(set GPR:$dst, (adde GPR:$lhs, GPR:$rhs))]>; def tADDS : TI<(ops GPR:$dst, GPR:$lhs, GPR:$rhs), - "adds $dst, $lhs, $rhs", + "add $dst, $lhs, $rhs", [(set GPR:$dst, (addc GPR:$lhs, GPR:$rhs))]>; @@ -423,7 +423,7 @@ [(set GPR:$dst, (sube GPR:$lhs, GPR:$rhs))]>; def tSUBS : TI<(ops GPR:$dst, GPR:$lhs, GPR:$rhs), -"subs $dst, $lhs, $rhs", +"sub $dst, $lhs, $rhs", [(set GPR:$dst, (subc GPR:$lhs, GPR:$rhs))]>; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] llvm-gcc patch: fix PR1150
Fix PR1150. http://llvm.org/bugs/show_bug.cgi?id=1150 Lauro Index: Makefile.in === --- Makefile.in (revision 262) +++ Makefile.in (working copy) @@ -179,7 +179,9 @@ STAGE_HOST_EXPORTS = \ $(HOST_EXPORTS) \ CC="$(STAGE_CC_WRAPPER) $$r/prev-gcc/xgcc$(exeext) -B$$r/prev-gcc/ -B$(build_tooldir)/bin/"; export CC; \ - CC_FOR_BUILD="$(STAGE_CC_WRAPPER) $$r/prev-gcc/xgcc$(exeext) -B$$r/prev-gcc/ -B$(build_tooldir)/bin/"; export CC_FOR_BUILD; + CC_FOR_BUILD="$(STAGE_CC_WRAPPER) $$r/prev-gcc/xgcc$(exeext) -B$$r/prev-gcc/ -B$(build_tooldir)/bin/"; export CC_FOR_BUILD \ + CXX="$(STAGE_CC_WRAPPER) $$r/prev-gcc/g++$(exeext) -B$$r/prev-gcc/ -B$(build_tooldir)/bin/"; export CXX; \ + CXX_FOR_BUILD="$(STAGE_CC_WRAPPER) $$r/prev-gcc/g++$(exeext) -B$$r/prev-gcc/ -B$(build_tooldir)/bin/"; export CXX_FOR_BUILD; # This is set by the configure script to the list of directories which # should be built using the target tools. @@ -30581,6 +30583,7 @@ # Flags to pass to stage2 and later makes. POSTSTAGE1_FLAGS_TO_PASS = \ CC="$${CC}" CC_FOR_BUILD="$${CC_FOR_BUILD}" \ + CXX="$${CXX}" CXX_FOR_BUILD="$${CXX_FOR_BUILD}" \ STAGE_PREFIX=$$r/stage-gcc/ \ CFLAGS="$(BOOT_CFLAGS)" \ ADAC="\$$(CC)" Index: configure.in === --- configure.in (revision 262) +++ configure.in (working copy) @@ -1118,8 +1118,8 @@ AC_SUBST(gmplibs) AC_SUBST(gmpinc) -# By default, C is the only stage 1 language. -stage1_languages=c +# By default, build C and C++ languages on stage 1. +stage1_languages="c,c++" AC_SUBST(stage1_languages) # Figure out what language subdirectories are present. Index: configure === --- configure (revision 262) +++ configure (working copy) @@ -1269,10 +1269,6 @@ arm-*-elf* | strongarm-*-elf* | xscale-*-elf* | arm*-*-eabi* ) noconfigdirs="$noconfigdirs target-libffi target-qthreads" ;; - arm*-*-linux-gnueabi) -noconfigdirs="$noconfigdirs target-libffi target-qthreads" -noconfigdirs="$noconfigdirs target-libjava target-libobjc" -;; arm*-*-symbianelf*) noconfigdirs="$noconfigdirs ${libgcj} target-libiberty" ;; @@ -1816,7 +1812,7 @@ # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1820: checking for $ac_word" >&5 +echo "configure:1816: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1846,7 +1842,7 @@ # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1850: checking for $ac_word" >&5 +echo "configure:1846: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1897,7 +1893,7 @@ # Extract the first word of "cl", so it can be a program name with args. set dummy cl; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1901: checking for $ac_word" >&5 +echo "configure:1897: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1929,7 +1925,7 @@ fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:1933: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 +echo "configure:1929: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 ac_ext=c # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. @@ -1940,12 +1936,12 @@ cat > conftest.$ac_ext << EOF -#line 1944 "configure" +#line 1940 "configure" #include "confdefs.h" main(){return(0);} EOF -if { (eval echo configure:1949: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:1945: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then ac_cv_prog_cc_works=yes # If we can't run a trivial program, we are probably using a cross compiler. if (./conftest; exit) 2>/dev/null; then @@ -1971,12 +1967,12 @@ { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:1975: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "configure:1971: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 cross_compiling=$ac_cv_prog_cc_cross echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:1980: checking whether we
[llvm-commits] CVS: llvm/lib/Support/FoldingSet.cpp
Changes in directory llvm/lib/Support: FoldingSet.cpp updated: 1.13 -> 1.14 --- Log message: Add some debug output. --- Diffs of the changes: (+4 -0) FoldingSet.cpp |4 1 files changed, 4 insertions(+) Index: llvm/lib/Support/FoldingSet.cpp diff -u llvm/lib/Support/FoldingSet.cpp:1.13 llvm/lib/Support/FoldingSet.cpp:1.14 --- llvm/lib/Support/FoldingSet.cpp:1.13Wed Jan 31 00:04:41 2007 +++ llvm/lib/Support/FoldingSet.cpp Wed Jan 31 15:27:38 2007 @@ -14,8 +14,10 @@ // //===--===// +#define DEBUG_TYPE "foldingset" #include "llvm/ADT/FoldingSet.h" #include "llvm/Support/MathExtras.h" +#include "llvm/Support/Debug.h" #include using namespace llvm; @@ -225,6 +227,7 @@ /// FindNodeOrInsertPos. void FoldingSetImpl::InsertNode(Node *N, void *InsertPos) { // Do we need to grow the hashtable? + DEBUG(DOUT << "INSERT: " << N << '\n'); if (NumNodes+1 > NumBuckets*2) { GrowHashTable(); NodeID ID; @@ -255,6 +258,7 @@ // Because each bucket is a circular list, we don't need to compute N's hash // to remove it. Chase around the list until we find the node (or bucket) // which points to N. + DEBUG(DOUT << "REMOVE: " << N << '\n'); void *Ptr = N->getNextInBucket(); if (Ptr == 0) return false; // Not in folding set. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/TargetData.cpp
Changes in directory llvm/lib/Target: TargetData.cpp updated: 1.83 -> 1.84 --- Log message: Dead comment. --- Diffs of the changes: (+0 -1) TargetData.cpp |1 - 1 files changed, 1 deletion(-) Index: llvm/lib/Target/TargetData.cpp diff -u llvm/lib/Target/TargetData.cpp:1.83 llvm/lib/Target/TargetData.cpp:1.84 --- llvm/lib/Target/TargetData.cpp:1.83 Fri Jan 26 02:11:39 2007 +++ llvm/lib/Target/TargetData.cpp Wed Jan 31 15:31:25 2007 @@ -495,7 +495,6 @@ Alignment = Log2_32(GV->getAlignment()); if (GV->hasInitializer()) { -// Always round up alignment of global doubles to 8 bytes. if (Alignment < 4) { // If the global is not external, see if it is large. If so, give it a // larger alignment. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/docs/LangRef.html
Changes in directory llvm/docs: LangRef.html updated: 1.205 -> 1.206 --- Log message: Preview of the shift instructions becoming Binary Operators. --- Diffs of the changes: (+86 -87) LangRef.html | 173 +-- 1 files changed, 86 insertions(+), 87 deletions(-) Index: llvm/docs/LangRef.html diff -u llvm/docs/LangRef.html:1.205 llvm/docs/LangRef.html:1.206 --- llvm/docs/LangRef.html:1.205Sun Jan 28 09:27:21 2007 +++ llvm/docs/LangRef.html Wed Jan 31 15:39:12 2007 @@ -85,6 +85,9 @@ 'urem' Instruction 'srem' Instruction 'frem' Instruction + 'shl' Instruction + 'lshr' Instruction + 'ashr' Instruction Bitwise Binary Operations @@ -92,9 +95,6 @@ 'and' Instruction 'or' Instruction 'xor' Instruction - 'shl' Instruction - 'lshr' Instruction - 'ashr' Instruction Vector Operations @@ -1952,6 +1952,88 @@ + + 'shl' +Instruction + +Syntax: += shl , ; yields {ty}:result + +Overview: +The 'shl' instruction returns the first operand shifted to +the left a specified number of bits. +Arguments: +Both arguments to the 'shl' instruction must be the same integer type. +Semantics: +The value produced is var1 * 2var2. +Example: + = shl i32 4, %var ; yields {i32}: 4 << %var + = shl i32 4, 2 ; yields {i32}: 16 + = shl i32 1, 10 ; yields {i32}: 1024 + + + + 'lshr' +Instruction + +Syntax: + = lshr , ; yields {ty}:result + + +Overview: +The 'lshr' instruction (logical shift right) returns the first +operand shifted to the right a specified number of bits. + +Arguments: +Both arguments to the 'lshr' instruction must be the same +integer type. + +Semantics: +This instruction always performs a logical shift right operation. The most +significant bits of the result will be filled with zero bits after the +shift. + +Example: + + = lshr i32 4, 1 ; yields {i32}:result = 2 + = lshr i32 4, 2 ; yields {i32}:result = 1 + = lshr i8 4, 3 ; yields {i8}:result = 0 + = lshr i8 -2, 1 ; yields {i8}:result = 0x7FFF + + + + + 'ashr' +Instruction + + +Syntax: + = ashr , ; yields {ty}:result + + +Overview: +The 'ashr' instruction (arithmetic shift right) returns the first +operand shifted to the right a specified number of bits. + +Arguments: +Both arguments to the 'ashr' instruction must be the same +integer type. + +Semantics: +This instruction always performs an arithmetic shift right operation, +The most significant bits of the result will be filled with the sign bit +of var1. + +Example: + + = ashr i32 4, 1 ; yields {i32}:result = 2 + = ashr i32 4, 2 ; yields {i32}:result = 1 + = ashr i8 4, 3 ; yields {i8}:result = 0 + = ashr i8 -2, 1 ; yields {i8}:result = -1 + + + Bitwise Binary Operations @@ -2127,89 +2209,6 @@ = xor i32 %V, -1 ; yields {i32}:result = ~%V - - 'shl' -Instruction - -Syntax: - = shl , i8 ; yields {ty}:result - -Overview: -The 'shl' instruction returns the first operand shifted to -the left a specified number of bits. -Arguments: -The first argument to the 'shl' instruction must be an integer type. The second argument must be an 'i8' -type. -Semantics: -The value produced is var1 * 2var2. -Example: - = shl i32 4, i8 %var ; yields {i32}:result = 4 << %var - = shl i32 4, i8 2 ; yields {i32}:result = 16 - = shl i32 1, i8 10 ; yields {i32}:result = 1024 - - - - 'lshr' -Instruction - -Syntax: - = lshr , i8 ; yields {ty}:result - - -Overview: -The 'lshr' instruction (logical shift right) returns the first -operand shifted to the right a specified number of bits. - -Arguments: -The first argument to the 'lshr' instruction must be an integer type. The second argument must be an 'i8' type. - -Semantics: -This instruction always performs a logical shift right operation. The -var2 most significant bits will be filled with zero bits after the -shift. - -Example: - - = lshr i32 4, i8 1 ; yields {i32}:result = 2 - = lshr i32 4, i8 2; yields {i32}:result = 1 - = lshr i8 4, i8 3 ; yields {i8 }:result = 0 - = lshr i8 -2, i8 1 ; yields {i8 }:result = 0x7FFF - - - - - 'ashr' -Instruction - - -Syntax: - = ashr , i8 ; yields {ty}:result - - -Overview: -The 'ashr' instruction (arithmetic shift right) returns the first -operand shifted to the right a specified number of bits. - -Arguments: -The first argument to the 'ashr' instruction must be an -integer type. The second argument must be an -'i8' type. - -Semantics: -This instruction alw
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM: ARMRegisterInfo.cpp updated: 1.48 -> 1.49 --- Log message: Update comment. --- Diffs of the changes: (+1 -1) ARMRegisterInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.48 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.49 --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.48Wed Jan 31 07:12:46 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Wed Jan 31 16:06:44 2007 @@ -620,7 +620,7 @@ } else if (Opcode == ARM::tADDrSPi) { Offset += MI.getOperand(i+1).getImm(); assert((Offset & 3) == 0 && - "add/sub sp, #imm immediate must be multiple of 4!"); + "Thumb add/sub sp, #imm immediate must be multiple of 4!"); Offset >>= 2; if (Offset == 0) { // Turn it into a move. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMTargetMachine.cpp
Changes in directory llvm/lib/Target/ARM: ARMTargetMachine.cpp updated: 1.18 -> 1.19 --- Log message: Thumb add sp, #imm requires the immediate value be multiple of 4. For now, change preferred alignment of short, byte, bool to 4. --- Diffs of the changes: (+6 -2) ARMTargetMachine.cpp |8 ++-- 1 files changed, 6 insertions(+), 2 deletions(-) Index: llvm/lib/Target/ARM/ARMTargetMachine.cpp diff -u llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.18 llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.19 --- llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.18 Mon Jan 22 17:13:01 2007 +++ llvm/lib/Target/ARM/ARMTargetMachine.cppWed Jan 31 16:08:40 2007 @@ -35,8 +35,12 @@ ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS) : Subtarget(M, FS), DataLayout(Subtarget.isTargetDarwin() ? - std::string("e-p:32:32-d:32:32-l:32:32") : - std::string("e-p:32:32-d:32:64-l:32:64")), + (Subtarget.isThumb() ? +std::string("e-p:32:32-d:32:32-l:32:32-s:16:32-b:8:32-B:8:32") : +std::string("e-p:32:32-d:32:32-l:32:32")) : + (Subtarget.isThumb() ? +std::string("e-p:32:32-d:32:64-l:32:64-s:16:32-b:8:32-B:8:32") : +std::string("e-p:32:32-d:32:64-l:32:64"))), InstrInfo(Subtarget), FrameInfo(Subtarget) {} ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/README-Thumb.txt
Changes in directory llvm/lib/Target/ARM: README-Thumb.txt updated: 1.2 -> 1.3 --- Log message: Add entry. --- Diffs of the changes: (+4 -0) README-Thumb.txt |4 1 files changed, 4 insertions(+) Index: llvm/lib/Target/ARM/README-Thumb.txt diff -u llvm/lib/Target/ARM/README-Thumb.txt:1.2 llvm/lib/Target/ARM/README-Thumb.txt:1.3 --- llvm/lib/Target/ARM/README-Thumb.txt:1.2Fri Jan 26 20:33:22 2007 +++ llvm/lib/Target/ARM/README-Thumb.txtWed Jan 31 16:11:38 2007 @@ -19,3 +19,7 @@ * If we know function size is less than (1 << 16) * 2 bytes, we can use 16-bit jumptable entries (e.g. (L1 - L2) >> 1). Or even smaller entries if the function is even smaller. This also applies to ARM. + +* In thumb mode, short, byte, and bool preferred alignments are currently set + to 4 to accommodate ISA restriction (i.e. add sp, #imm, imm must be multiple + of 4). ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM: ARMRegisterInfo.cpp updated: 1.49 -> 1.50 --- Log message: Darwin ABI requires FP to point to stack slot of prev FP. --- Diffs of the changes: (+14 -3) ARMRegisterInfo.cpp | 17 ++--- 1 files changed, 14 insertions(+), 3 deletions(-) Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.49 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.50 --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.49Wed Jan 31 16:06:44 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Wed Jan 31 16:25:33 2007 @@ -900,6 +900,13 @@ ForceLRSpill = false; } +// Darwin ABI requires FP to point to the stack slot that contains the +// previous FP. +if (STI.isTargetDarwin()) { + MF.changePhyRegUsed(FramePtr, true); + NumGPRSpills++; +} + // If stack and double are 8-byte aligned and we are spilling an odd number // of GPRs. Spill one extra callee save GPR so we won't have to pad between // the integer and double callee save areas. @@ -1029,8 +1036,9 @@ } else if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) ++MBBI; - // Point FP to the stack slot that contains the previous FP. - if (hasFP(MF)) + // Darwin ABI requires FP to point to the stack slot that contains the + // previous FP. + if (STI.isTargetDarwin() || hasFP(MF)) BuildMI(MBB, MBBI, TII.get(isThumb ? ARM::tADDrSPi : ARM::ADDri), FramePtr) .addFrameIndex(FramePtrSpillFI).addImm(0); @@ -1116,7 +1124,9 @@ if (isThumb) emitSPUpdate(MBB, MBBI, NumBytes, isThumb, TII); else { -if (hasFP(MF)){ +// Darwin ABI requires FP to point to the stack slot that contains the +// previous FP. +if (STI.isTargetDarwin() || hasFP(MF)) { NumBytes = AFI->getFramePtrSpillOffset() - NumBytes; // Reset SP based on frame pointer only if the stack frame extends beyond // frame pointer stack slot. @@ -1131,6 +1141,7 @@ } else if (NumBytes) { emitSPUpdate(MBB, MBBI, NumBytes, false, TII); } + // Move SP to start of integer callee save spill area 2. movePastCSLoadStoreOps(MBB, MBBI, ARM::FLDD, 3, STI); emitSPUpdate(MBB, MBBI, AFI->getDPRCalleeSavedAreaSize(), false, TII); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
Hi Lauro, FYI. Darwin ABI requires FP to point to the stack slot where previous FP is spilled. I've fixed this. Evan On Jan 31, 2007, at 5:13 AM, Lauro Ramos Venancio wrote: > > > Changes in directory llvm/lib/Target/ARM: > > ARMRegisterInfo.cpp updated: 1.47 -> 1.48 > --- > Log message: > > ARM fix: Miscompilation when frame pointer can't be eliminated. > Uninitialized frame pointer register is used. > > > --- > Diffs of the changes: (+9 -10) > > ARMRegisterInfo.cpp | 19 +-- > 1 files changed, 9 insertions(+), 10 deletions(-) > > > Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp > diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.47 llvm/lib/ > Target/ARM/ARMRegisterInfo.cpp:1.48 > --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.47 Tue Jan 30 > 17:01:46 2007 > +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Wed Jan 31 07:12:46 2007 > @@ -573,8 +573,7 @@ > // There is alloca()'s in this function, must reference off > the frame > // pointer instead. > FrameReg = getFrameRegister(MF); > -if (STI.isTargetDarwin()) > - Offset -= AFI->getFramePtrSpillOffset(); > +Offset -= AFI->getFramePtrSpillOffset(); >} > >unsigned Opcode = MI.getOpcode(); > @@ -882,6 +881,12 @@ > } >} > > + if (hasFP(MF)) { > +MF.changePhyRegUsed(FramePtr, true); > +NumGPRSpills++; > +CanEliminateFrame = false; > + } > + >if (!CanEliminateFrame) { > AFI->setHasStackFrame(true); > > @@ -895,11 +900,6 @@ >ForceLRSpill = false; > } > > -if (STI.isTargetDarwin()) { > - MF.changePhyRegUsed(FramePtr, true); > - NumGPRSpills++; > -} > - > // If stack and double are 8-byte aligned and we are spilling > an odd number > // of GPRs. Spill one extra callee save GPR so we won't have > to pad between > // the integer and double callee save areas. > @@ -1030,7 +1030,7 @@ > ++MBBI; > >// Point FP to the stack slot that contains the previous FP. > - if (STI.isTargetDarwin()) > + if (hasFP(MF)) > BuildMI(MBB, MBBI, TII.get(isThumb ? ARM::tADDrSPi : > ARM::ADDri), FramePtr) >.addFrameIndex(FramePtrSpillFI).addImm(0); > > @@ -1116,7 +1116,7 @@ >if (isThumb) > emitSPUpdate(MBB, MBBI, NumBytes, isThumb, TII); >else { > -if (STI.isTargetDarwin()) { > +if (hasFP(MF)){ >NumBytes = AFI->getFramePtrSpillOffset() - NumBytes; >// Reset SP based on frame pointer only if the stack frame > extends beyond >// frame pointer stack slot. > @@ -1131,7 +1131,6 @@ > } else if (NumBytes) { >emitSPUpdate(MBB, MBBI, NumBytes, false, TII); > } > - > // Move SP to start of integer callee save spill area 2. > movePastCSLoadStoreOps(MBB, MBBI, ARM::FLDD, 3, STI); > emitSPUpdate(MBB, MBBI, AFI->getDPRCalleeSavedAreaSize(), > false, TII); > > > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CodeGen/ARM/hello.ll insn-sched1.ll ldm.ll
Changes in directory llvm/test/CodeGen/ARM: hello.ll updated: 1.4 -> 1.5 insn-sched1.ll updated: 1.3 -> 1.4 ldm.ll updated: 1.4 -> 1.5 --- Log message: Fix test cases. --- Diffs of the changes: (+11 -10) hello.ll | 17 + insn-sched1.ll |2 +- ldm.ll |2 +- 3 files changed, 11 insertions(+), 10 deletions(-) Index: llvm/test/CodeGen/ARM/hello.ll diff -u llvm/test/CodeGen/ARM/hello.ll:1.4 llvm/test/CodeGen/ARM/hello.ll:1.5 --- llvm/test/CodeGen/ARM/hello.ll:1.4 Wed Jan 31 07:12:46 2007 +++ llvm/test/CodeGen/ARM/hello.ll Wed Jan 31 16:27:07 2007 @@ -1,12 +1,13 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | grep mov | wc -l | grep 1 && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin --disable-fp-elim | grep mov | wc -l | grep 2 +; RUN: llvm-as < %s | llc -march=arm && +; RUN: llvm-as < %s | llc -mtriple=arm-linux | grep mov | wc -l | grep 1 && +; RUN: llvm-as < %s | llc -mtriple=arm-linux --disable-fp-elim | grep mov | wc -l | grep 2 +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep mov | wc -l | grep 2 -%str = internal constant [12 x sbyte] c"Hello World\00" [EMAIL PROTECTED] = internal constant [12 x i8] c"Hello World\00" -int %main() { - %tmp = call int %puts( sbyte* getelementptr ([12 x sbyte]* %str, int 0, uint 0) ) - ret int 0 +define i32 @main() { + %tmp = call i32 @puts( i8* getelementptr ([12 x i8]* @str, i32 0, i64 0) ) ; [#uses=0] + ret i32 0 } -declare int %puts(sbyte*) +declare i32 @puts(i8*) Index: llvm/test/CodeGen/ARM/insn-sched1.ll diff -u llvm/test/CodeGen/ARM/insn-sched1.ll:1.3 llvm/test/CodeGen/ARM/insn-sched1.ll:1.4 --- llvm/test/CodeGen/ARM/insn-sched1.ll:1.3Wed Jan 31 07:12:46 2007 +++ llvm/test/CodeGen/ARM/insn-sched1.llWed Jan 31 16:27:07 2007 @@ -1,5 +1,5 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin -mattr=+v6 --disable-fp-elim | grep mov | wc -l | grep 2 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin -mattr=+v6 | grep mov | wc -l | grep 2 int %test(int %x) { %tmp = cast int %x to short Index: llvm/test/CodeGen/ARM/ldm.ll diff -u llvm/test/CodeGen/ARM/ldm.ll:1.4 llvm/test/CodeGen/ARM/ldm.ll:1.5 --- llvm/test/CodeGen/ARM/ldm.ll:1.4Wed Jan 31 07:12:46 2007 +++ llvm/test/CodeGen/ARM/ldm.llWed Jan 31 16:27:07 2007 @@ -1,7 +1,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "ldmia" | wc -l | grep 2 && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "ldmib" | wc -l | grep 1 && -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin --disable-fp-elim | grep "ldmfd sp\!" | wc -l | grep 3 +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | grep "ldmfd sp\!" | wc -l | grep 3 %X = external global [0 x int] ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/Instructions.cpp
Changes in directory llvm/lib/VMCore: Instructions.cpp updated: 1.68 -> 1.69 --- Log message: Fix build breakage by using correct arguments to getIndexedType in the GEP constructors. --- Diffs of the changes: (+10 -6) Instructions.cpp | 16 ++-- 1 files changed, 10 insertions(+), 6 deletions(-) Index: llvm/lib/VMCore/Instructions.cpp diff -u llvm/lib/VMCore/Instructions.cpp:1.68 llvm/lib/VMCore/Instructions.cpp:1.69 --- llvm/lib/VMCore/Instructions.cpp:1.68 Wed Jan 31 13:47:18 2007 +++ llvm/lib/VMCore/Instructions.cppWed Jan 31 16:30:26 2007 @@ -711,7 +711,8 @@ GetElementPtrInst::GetElementPtrInst(Value *Ptr, const std::vector &Idx, const std::string &Name, Instruction *InBe) : Instruction(PointerType::get(checkType(getIndexedType(Ptr->getType(), - Idx, true))), + &Idx[0], Idx.size(), + true))), GetElementPtr, 0, 0, Name, InBe) { init(Ptr, &Idx[0], Idx.size()); } @@ -719,7 +720,8 @@ GetElementPtrInst::GetElementPtrInst(Value *Ptr, const std::vector &Idx, const std::string &Name, BasicBlock *IAE) : Instruction(PointerType::get(checkType(getIndexedType(Ptr->getType(), - Idx, true))), + &Idx[0], Idx.size(), + true))), GetElementPtr, 0, 0, Name, IAE) { init(Ptr, &Idx[0], Idx.size()); } @@ -728,7 +730,7 @@ unsigned NumIdx, const std::string &Name, Instruction *InBe) : Instruction(PointerType::get(checkType(getIndexedType(Ptr->getType(), -Idx, true))), +Idx, NumIdx, true))), GetElementPtr, 0, 0, Name, InBe) { init(Ptr, Idx, NumIdx); } @@ -737,21 +739,23 @@ unsigned NumIdx, const std::string &Name, BasicBlock *IAE) : Instruction(PointerType::get(checkType(getIndexedType(Ptr->getType(), -Idx, true))), +Idx, NumIdx, true))), GetElementPtr, 0, 0, Name, IAE) { init(Ptr, Idx, NumIdx); } GetElementPtrInst::GetElementPtrInst(Value *Ptr, Value *Idx, const std::string &Name, Instruction *InBe) - : Instruction(PointerType::get(checkType(getIndexedType(Ptr->getType(),Idx))), + : Instruction(PointerType::get(checkType(getIndexedType(Ptr->getType(), + Idx))), GetElementPtr, 0, 0, Name, InBe) { init(Ptr, Idx); } GetElementPtrInst::GetElementPtrInst(Value *Ptr, Value *Idx, const std::string &Name, BasicBlock *IAE) - : Instruction(PointerType::get(checkType(getIndexedType(Ptr->getType(),Idx))), + : Instruction(PointerType::get(checkType(getIndexedType(Ptr->getType(), + Idx))), GetElementPtr, 0, 0, Name, IAE) { init(Ptr, Idx); } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/test/CodeGen/ARM/hello.ll insn-sched1.ll ldm.ll
Evan / Lauro, I don't know what the issue is, but test/CodeGen/ARM/large-stack.ll is failing and going into an infinite busy loop in llc. This is preventing the dejagnu test suite from completing. Reid. On Wed, 2007-01-31 at 16:27 -0600, Evan Cheng wrote: > > Changes in directory llvm/test/CodeGen/ARM: > > hello.ll updated: 1.4 -> 1.5 > insn-sched1.ll updated: 1.3 -> 1.4 > ldm.ll updated: 1.4 -> 1.5 > --- > Log message: > > Fix test cases. > > --- > Diffs of the changes: (+11 -10) > > hello.ll | 17 + > insn-sched1.ll |2 +- > ldm.ll |2 +- > 3 files changed, 11 insertions(+), 10 deletions(-) > > > Index: llvm/test/CodeGen/ARM/hello.ll > diff -u llvm/test/CodeGen/ARM/hello.ll:1.4 llvm/test/CodeGen/ARM/hello.ll:1.5 > --- llvm/test/CodeGen/ARM/hello.ll:1.4Wed Jan 31 07:12:46 2007 > +++ llvm/test/CodeGen/ARM/hello.llWed Jan 31 16:27:07 2007 > @@ -1,12 +1,13 @@ > -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && > -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | grep mov | wc > -l | grep 1 && > -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin > --disable-fp-elim | grep mov | wc -l | grep 2 > +; RUN: llvm-as < %s | llc -march=arm && > +; RUN: llvm-as < %s | llc -mtriple=arm-linux | grep mov | wc -l | grep 1 && > +; RUN: llvm-as < %s | llc -mtriple=arm-linux --disable-fp-elim | grep mov | > wc -l | grep 2 > +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep mov | wc -l | > grep 2 > > -%str = internal constant [12 x sbyte] c"Hello World\00" > [EMAIL PROTECTED] = internal constant [12 x i8] c"Hello World\00" > > -int %main() { > - %tmp = call int %puts( sbyte* getelementptr ([12 x sbyte]* %str, int 0, > uint 0) ) > - ret int 0 > +define i32 @main() { > + %tmp = call i32 @puts( i8* getelementptr ([12 x i8]* @str, i32 0, i64 > 0) ) ; [#uses=0] > + ret i32 0 > } > > -declare int %puts(sbyte*) > +declare i32 @puts(i8*) > > > Index: llvm/test/CodeGen/ARM/insn-sched1.ll > diff -u llvm/test/CodeGen/ARM/insn-sched1.ll:1.3 > llvm/test/CodeGen/ARM/insn-sched1.ll:1.4 > --- llvm/test/CodeGen/ARM/insn-sched1.ll:1.3 Wed Jan 31 07:12:46 2007 > +++ llvm/test/CodeGen/ARM/insn-sched1.ll Wed Jan 31 16:27:07 2007 > @@ -1,5 +1,5 @@ > ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 && > -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin > -mattr=+v6 --disable-fp-elim | grep mov | wc -l | grep 2 > +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin > -mattr=+v6 | grep mov | wc -l | grep 2 > > int %test(int %x) { > %tmp = cast int %x to short > > > Index: llvm/test/CodeGen/ARM/ldm.ll > diff -u llvm/test/CodeGen/ARM/ldm.ll:1.4 llvm/test/CodeGen/ARM/ldm.ll:1.5 > --- llvm/test/CodeGen/ARM/ldm.ll:1.4 Wed Jan 31 07:12:46 2007 > +++ llvm/test/CodeGen/ARM/ldm.ll Wed Jan 31 16:27:07 2007 > @@ -1,7 +1,7 @@ > ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && > ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "ldmia" | wc -l | > grep 2 && > ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "ldmib" | wc -l | > grep 1 && > -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin > --disable-fp-elim | grep "ldmfd sp\!" | wc -l | grep 3 > +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | grep > "ldmfd sp\!" | wc -l | grep 3 > > %X = external global [0 x int] > > > > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/test/CodeGen/ARM/hello.ll insn-sched1.ll ldm.ll
large-stack.ll is falling, but the infinite loop occurs compiling function f3 of long.ll with -enable-thumb. Lauro 2007/1/31, Reid Spencer <[EMAIL PROTECTED]>: > Evan / Lauro, > > I don't know what the issue is, but test/CodeGen/ARM/large-stack.ll is > failing and going into an infinite busy loop in llc. This is preventing > the dejagnu test suite from completing. > > Reid. > > On Wed, 2007-01-31 at 16:27 -0600, Evan Cheng wrote: > > > > Changes in directory llvm/test/CodeGen/ARM: > > > > hello.ll updated: 1.4 -> 1.5 > > insn-sched1.ll updated: 1.3 -> 1.4 > > ldm.ll updated: 1.4 -> 1.5 > > --- > > Log message: > > > > Fix test cases. > > > > --- > > Diffs of the changes: (+11 -10) > > > > hello.ll | 17 + > > insn-sched1.ll |2 +- > > ldm.ll |2 +- > > 3 files changed, 11 insertions(+), 10 deletions(-) > > > > > > Index: llvm/test/CodeGen/ARM/hello.ll > > diff -u llvm/test/CodeGen/ARM/hello.ll:1.4 > > llvm/test/CodeGen/ARM/hello.ll:1.5 > > --- llvm/test/CodeGen/ARM/hello.ll:1.4Wed Jan 31 07:12:46 2007 > > +++ llvm/test/CodeGen/ARM/hello.llWed Jan 31 16:27:07 2007 > > @@ -1,12 +1,13 @@ > > -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && > > -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | grep mov | > > wc -l | grep 1 && > > -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin > > --disable-fp-elim | grep mov | wc -l | grep 2 > > +; RUN: llvm-as < %s | llc -march=arm && > > +; RUN: llvm-as < %s | llc -mtriple=arm-linux | grep mov | wc -l | grep 1 && > > +; RUN: llvm-as < %s | llc -mtriple=arm-linux --disable-fp-elim | grep mov > > | wc -l | grep 2 > > +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep mov | wc -l | > > grep 2 > > > > -%str = internal constant [12 x sbyte] c"Hello World\00" > > [EMAIL PROTECTED] = internal constant [12 x i8] c"Hello World\00" > > > > -int %main() { > > - %tmp = call int %puts( sbyte* getelementptr ([12 x sbyte]* %str, int > > 0, uint 0) ) > > - ret int 0 > > +define i32 @main() { > > + %tmp = call i32 @puts( i8* getelementptr ([12 x i8]* @str, i32 0, i64 > > 0) ) ; [#uses=0] > > + ret i32 0 > > } > > > > -declare int %puts(sbyte*) > > +declare i32 @puts(i8*) > > > > > > Index: llvm/test/CodeGen/ARM/insn-sched1.ll > > diff -u llvm/test/CodeGen/ARM/insn-sched1.ll:1.3 > > llvm/test/CodeGen/ARM/insn-sched1.ll:1.4 > > --- llvm/test/CodeGen/ARM/insn-sched1.ll:1.3 Wed Jan 31 07:12:46 2007 > > +++ llvm/test/CodeGen/ARM/insn-sched1.ll Wed Jan 31 16:27:07 2007 > > @@ -1,5 +1,5 @@ > > ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 && > > -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin > > -mattr=+v6 --disable-fp-elim | grep mov | wc -l | grep 2 > > +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin > > -mattr=+v6 | grep mov | wc -l | grep 2 > > > > int %test(int %x) { > > %tmp = cast int %x to short > > > > > > Index: llvm/test/CodeGen/ARM/ldm.ll > > diff -u llvm/test/CodeGen/ARM/ldm.ll:1.4 llvm/test/CodeGen/ARM/ldm.ll:1.5 > > --- llvm/test/CodeGen/ARM/ldm.ll:1.4 Wed Jan 31 07:12:46 2007 > > +++ llvm/test/CodeGen/ARM/ldm.ll Wed Jan 31 16:27:07 2007 > > @@ -1,7 +1,7 @@ > > ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && > > ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "ldmia" | wc -l > > | grep 2 && > > ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "ldmib" | wc -l > > | grep 1 && > > -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin > > --disable-fp-elim | grep "ldmfd sp\!" | wc -l | grep 3 > > +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple-darwin | grep > > "ldmfd sp\!" | wc -l | grep 3 > > > > %X = external global [0 x int] > > > > > > > > > > ___ > > llvm-commits mailing list > > llvm-commits@cs.uiuc.edu > > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM: ARMRegisterInfo.cpp updated: 1.50 -> 1.51 --- Log message: Don't want to add FramePtr to callee save spill list twice. --- Diffs of the changes: (+2 -8) ARMRegisterInfo.cpp | 10 ++ 1 files changed, 2 insertions(+), 8 deletions(-) Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.50 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.51 --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.50Wed Jan 31 16:25:33 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Wed Jan 31 17:17:29 2007 @@ -881,13 +881,7 @@ } } - if (hasFP(MF)) { -MF.changePhyRegUsed(FramePtr, true); -NumGPRSpills++; -CanEliminateFrame = false; - } - - if (!CanEliminateFrame) { + if (!CanEliminateFrame || hasFP(MF)) { AFI->setHasStackFrame(true); // If LR is not spilled, but at least one of R4, R5, R6, and R7 is spilled. @@ -902,7 +896,7 @@ // Darwin ABI requires FP to point to the stack slot that contains the // previous FP. -if (STI.isTargetDarwin()) { +if (STI.isTargetDarwin() || hasFP(MF)) { MF.changePhyRegUsed(FramePtr, true); NumGPRSpills++; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/test/CodeGen/ARM/hello.ll insn-sched1.ll ldm.ll
I think it's long.ll, right? I am on it now. Evan On Jan 31, 2007, at 2:41 PM, Reid Spencer wrote: > Evan / Lauro, > > I don't know what the issue is, but test/CodeGen/ARM/large-stack.ll is > failing and going into an infinite busy loop in llc. This is > preventing > the dejagnu test suite from completing. > > Reid. > > On Wed, 2007-01-31 at 16:27 -0600, Evan Cheng wrote: >> >> Changes in directory llvm/test/CodeGen/ARM: >> >> hello.ll updated: 1.4 -> 1.5 >> insn-sched1.ll updated: 1.3 -> 1.4 >> ldm.ll updated: 1.4 -> 1.5 >> --- >> Log message: >> >> Fix test cases. >> >> --- >> Diffs of the changes: (+11 -10) >> >> hello.ll | 17 + >> insn-sched1.ll |2 +- >> ldm.ll |2 +- >> 3 files changed, 11 insertions(+), 10 deletions(-) >> >> >> Index: llvm/test/CodeGen/ARM/hello.ll >> diff -u llvm/test/CodeGen/ARM/hello.ll:1.4 llvm/test/CodeGen/ARM/ >> hello.ll:1.5 >> --- llvm/test/CodeGen/ARM/hello.ll:1.4 Wed Jan 31 07:12:46 2007 >> +++ llvm/test/CodeGen/ARM/hello.ll Wed Jan 31 16:27:07 2007 >> @@ -1,12 +1,13 @@ >> -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && >> -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | >> grep mov | wc -l | grep 1 && >> -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple- >> darwin --disable-fp-elim | grep mov | wc -l | grep 2 >> +; RUN: llvm-as < %s | llc -march=arm && >> +; RUN: llvm-as < %s | llc -mtriple=arm-linux | grep mov | wc -l | >> grep 1 && >> +; RUN: llvm-as < %s | llc -mtriple=arm-linux --disable-fp-elim | >> grep mov | wc -l | grep 2 >> +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep mov | >> wc -l | grep 2 >> >> -%str = internal constant [12 x sbyte] c"Hello World\00" >> [EMAIL PROTECTED] = internal constant [12 x i8] c"Hello World\00" >> >> -int %main() { >> -%tmp = call int %puts( sbyte* getelementptr ([12 x sbyte]* %str, >> int 0, uint 0) ) >> -ret int 0 >> +define i32 @main() { >> +%tmp = call i32 @puts( i8* getelementptr ([12 x i8]* @str, i32 >> 0, i64 0) ) ; [#uses=0] >> +ret i32 0 >> } >> >> -declare int %puts(sbyte*) >> +declare i32 @puts(i8*) >> >> >> Index: llvm/test/CodeGen/ARM/insn-sched1.ll >> diff -u llvm/test/CodeGen/ARM/insn-sched1.ll:1.3 llvm/test/CodeGen/ >> ARM/insn-sched1.ll:1.4 >> --- llvm/test/CodeGen/ARM/insn-sched1.ll:1.3 Wed Jan 31 07:12:46 2007 >> +++ llvm/test/CodeGen/ARM/insn-sched1.ll Wed Jan 31 16:27:07 2007 >> @@ -1,5 +1,5 @@ >> ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 && >> -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple- >> darwin -mattr=+v6 --disable-fp-elim | grep mov | wc -l | grep 2 >> +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple- >> darwin -mattr=+v6 | grep mov | wc -l | grep 2 >> >> int %test(int %x) { >> %tmp = cast int %x to short >> >> >> Index: llvm/test/CodeGen/ARM/ldm.ll >> diff -u llvm/test/CodeGen/ARM/ldm.ll:1.4 llvm/test/CodeGen/ARM/ >> ldm.ll:1.5 >> --- llvm/test/CodeGen/ARM/ldm.ll:1.4 Wed Jan 31 07:12:46 2007 >> +++ llvm/test/CodeGen/ARM/ldm.ll Wed Jan 31 16:27:07 2007 >> @@ -1,7 +1,7 @@ >> ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && >> ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep >> "ldmia" | wc -l | grep 2 && >> ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep >> "ldmib" | wc -l | grep 1 && >> -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple- >> darwin --disable-fp-elim | grep "ldmfd sp\!" | wc -l | grep 3 >> +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple- >> darwin | grep "ldmfd sp\!" | wc -l | grep 3 >> >> %X = external global [0 x int] >> >> >> >> >> ___ >> llvm-commits mailing list >> llvm-commits@cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/VMCore/Instructions.cpp
On Jan 31, 2007, at 2:30 PM, Reid Spencer wrote: > Instructions.cpp updated: 1.68 -> 1.69 > --- > Log message: > > Fix build breakage by using correct arguments to getIndexedType in the > GEP constructors. Thanks Reid, sorry for the breakage :( -Chris > > > --- > Diffs of the changes: (+10 -6) > > Instructions.cpp | 16 ++-- > 1 files changed, 10 insertions(+), 6 deletions(-) > > > Index: llvm/lib/VMCore/Instructions.cpp > diff -u llvm/lib/VMCore/Instructions.cpp:1.68 llvm/lib/VMCore/ > Instructions.cpp:1.69 > --- llvm/lib/VMCore/Instructions.cpp:1.68 Wed Jan 31 13:47:18 2007 > +++ llvm/lib/VMCore/Instructions.cpp Wed Jan 31 16:30:26 2007 > @@ -711,7 +711,8 @@ > GetElementPtrInst::GetElementPtrInst(Value *Ptr, const > std::vector &Idx, > const std::string &Name, > Instruction *InBe) >: Instruction(PointerType::get(checkType(getIndexedType(Ptr- > >getType(), > - Idx, > true))), > + &Idx[0], > Idx.size(), > + true))), > GetElementPtr, 0, 0, Name, InBe) { >init(Ptr, &Idx[0], Idx.size()); > } > @@ -719,7 +720,8 @@ > GetElementPtrInst::GetElementPtrInst(Value *Ptr, const > std::vector &Idx, > const std::string &Name, > BasicBlock *IAE) >: Instruction(PointerType::get(checkType(getIndexedType(Ptr- > >getType(), > - Idx, > true))), > + &Idx[0], > Idx.size(), > + true))), > GetElementPtr, 0, 0, Name, IAE) { >init(Ptr, &Idx[0], Idx.size()); > } > @@ -728,7 +730,7 @@ > unsigned NumIdx, > const std::string &Name, > Instruction *InBe) > : Instruction(PointerType::get(checkType(getIndexedType(Ptr- > >getType(), > -Idx, true))), > +Idx, > NumIdx, true))), >GetElementPtr, 0, 0, Name, InBe) { >init(Ptr, Idx, NumIdx); > } > @@ -737,21 +739,23 @@ > unsigned NumIdx, > const std::string &Name, > BasicBlock *IAE) > : Instruction(PointerType::get(checkType(getIndexedType(Ptr- > >getType(), > -Idx, true))), > +Idx, > NumIdx, true))), >GetElementPtr, 0, 0, Name, IAE) { >init(Ptr, Idx, NumIdx); > } > > GetElementPtrInst::GetElementPtrInst(Value *Ptr, Value *Idx, > const std::string &Name, > Instruction *InBe) > - : Instruction(PointerType::get(checkType(getIndexedType(Ptr- > >getType(),Idx))), > + : Instruction(PointerType::get(checkType(getIndexedType(Ptr- > >getType(), > + Idx))), > GetElementPtr, 0, 0, Name, InBe) { >init(Ptr, Idx); > } > > GetElementPtrInst::GetElementPtrInst(Value *Ptr, Value *Idx, > const std::string &Name, > BasicBlock *IAE) > - : Instruction(PointerType::get(checkType(getIndexedType(Ptr- > >getType(),Idx))), > + : Instruction(PointerType::get(checkType(getIndexedType(Ptr- > >getType(), > + Idx))), > GetElementPtr, 0, 0, Name, IAE) { >init(Ptr, Idx); > } > > > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Changes in directory llvm/lib/Target/ARM: ARMConstantIslandPass.cpp updated: 1.17 -> 1.18 --- Log message: Handle an interesting corner case: the constpool_entry being reference is two instructions away, i.e. its address is equal to PC. %r0 = tLDRpci bx CONSTPOOL_ENTRY 0 , 4 --- Diffs of the changes: (+2 -2) ARMConstantIslandPass.cpp |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.17 llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.18 --- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.17 Wed Jan 31 13:57:44 2007 +++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Wed Jan 31 17:35:18 2007 @@ -472,7 +472,7 @@ << " at offset " << int(UserOffset-CPEOffset) << "\t" << *MI); - if (UserOffset < CPEOffset) { + if (UserOffset <= CPEOffset) { // User before the CPE. if (CPEOffset-UserOffset <= MaxDisp) return true; @@ -563,7 +563,7 @@ << " at offset " << int(BrOffset-DestOffset) << "\t" << *MI); - if (BrOffset < DestOffset) { + if (BrOffset <= DestOffset) { if (DestOffset - BrOffset < MaxDisp) return true; } else { ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/test/CodeGen/ARM/hello.ll insn-sched1.ll ldm.ll
Fixed. Evan On Jan 31, 2007, at 3:23 PM, Evan Cheng wrote: > I think it's long.ll, right? I am on it now. > > Evan > > On Jan 31, 2007, at 2:41 PM, Reid Spencer wrote: > >> Evan / Lauro, >> >> I don't know what the issue is, but test/CodeGen/ARM/large- >> stack.ll is >> failing and going into an infinite busy loop in llc. This is >> preventing >> the dejagnu test suite from completing. >> >> Reid. >> >> On Wed, 2007-01-31 at 16:27 -0600, Evan Cheng wrote: >>> >>> Changes in directory llvm/test/CodeGen/ARM: >>> >>> hello.ll updated: 1.4 -> 1.5 >>> insn-sched1.ll updated: 1.3 -> 1.4 >>> ldm.ll updated: 1.4 -> 1.5 >>> --- >>> Log message: >>> >>> Fix test cases. >>> >>> --- >>> Diffs of the changes: (+11 -10) >>> >>> hello.ll | 17 + >>> insn-sched1.ll |2 +- >>> ldm.ll |2 +- >>> 3 files changed, 11 insertions(+), 10 deletions(-) >>> >>> >>> Index: llvm/test/CodeGen/ARM/hello.ll >>> diff -u llvm/test/CodeGen/ARM/hello.ll:1.4 llvm/test/CodeGen/ARM/ >>> hello.ll:1.5 >>> --- llvm/test/CodeGen/ARM/hello.ll:1.4 Wed Jan 31 07:12:46 2007 >>> +++ llvm/test/CodeGen/ARM/hello.ll Wed Jan 31 16:27:07 2007 >>> @@ -1,12 +1,13 @@ >>> -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && >>> -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | >>> grep mov | wc -l | grep 1 && >>> -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple- >>> darwin --disable-fp-elim | grep mov | wc -l | grep 2 >>> +; RUN: llvm-as < %s | llc -march=arm && >>> +; RUN: llvm-as < %s | llc -mtriple=arm-linux | grep mov | wc -l | >>> grep 1 && >>> +; RUN: llvm-as < %s | llc -mtriple=arm-linux --disable-fp-elim | >>> grep mov | wc -l | grep 2 >>> +; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep mov | >>> wc -l | grep 2 >>> >>> -%str = internal constant [12 x sbyte] c"Hello World\00" >>> [EMAIL PROTECTED] = internal constant [12 x i8] c"Hello World\00" >>> >>> -int %main() { >>> - %tmp = call int %puts( sbyte* getelementptr ([12 x sbyte]* %str, >>> int 0, uint 0) ) >>> - ret int 0 >>> +define i32 @main() { >>> + %tmp = call i32 @puts( i8* getelementptr ([12 x i8]* @str, i32 >>> 0, i64 0) ) ; [#uses=0] >>> + ret i32 0 >>> } >>> >>> -declare int %puts(sbyte*) >>> +declare i32 @puts(i8*) >>> >>> >>> Index: llvm/test/CodeGen/ARM/insn-sched1.ll >>> diff -u llvm/test/CodeGen/ARM/insn-sched1.ll:1.3 llvm/test/CodeGen/ >>> ARM/insn-sched1.ll:1.4 >>> --- llvm/test/CodeGen/ARM/insn-sched1.ll:1.3Wed Jan 31 07:12:46 >>> 2007 >>> +++ llvm/test/CodeGen/ARM/insn-sched1.llWed Jan 31 16:27:07 2007 >>> @@ -1,5 +1,5 @@ >>> ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 && >>> -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple- >>> darwin -mattr=+v6 --disable-fp-elim | grep mov | wc -l | grep 2 >>> +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple- >>> darwin -mattr=+v6 | grep mov | wc -l | grep 2 >>> >>> int %test(int %x) { >>> %tmp = cast int %x to short >>> >>> >>> Index: llvm/test/CodeGen/ARM/ldm.ll >>> diff -u llvm/test/CodeGen/ARM/ldm.ll:1.4 llvm/test/CodeGen/ARM/ >>> ldm.ll:1.5 >>> --- llvm/test/CodeGen/ARM/ldm.ll:1.4Wed Jan 31 07:12:46 2007 >>> +++ llvm/test/CodeGen/ARM/ldm.llWed Jan 31 16:27:07 2007 >>> @@ -1,7 +1,7 @@ >>> ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && >>> ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep >>> "ldmia" | wc -l | grep 2 && >>> ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep >>> "ldmib" | wc -l | grep 1 && >>> -; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple- >>> darwin --disable-fp-elim | grep "ldmfd sp\!" | wc -l | grep 3 >>> +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-apple- >>> darwin | grep "ldmfd sp\!" | wc -l | grep 3 >>> >>> %X = external global [0 x int] >>> >>> >>> >>> >>> ___ >>> llvm-commits mailing list >>> llvm-commits@cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Changes in directory llvm/lib/Target/ARM: ARMAsmPrinter.cpp updated: 1.55 -> 1.56 --- Log message: Don't emit unnecessary .align directive. --- Diffs of the changes: (+1 -3) ARMAsmPrinter.cpp |4 +--- 1 files changed, 1 insertion(+), 3 deletions(-) Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp diff -u llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.55 llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.56 --- llvm/lib/Target/ARM/ARMAsmPrinter.cpp:1.55 Tue Jan 30 14:37:08 2007 +++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp Wed Jan 31 17:39:39 2007 @@ -694,10 +694,8 @@ } break; default: { -if (InCPMode && AFI->isThumbFunction()) { - EmitAlignment(1); +if (InCPMode && AFI->isThumbFunction()) InCPMode = false; -} switch (Opc) { case ARM::PICADD: case ARM::PICLD: ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CodeGen/ARM/long.ll
Changes in directory llvm/test/CodeGen/ARM: long.ll updated: 1.11 -> 1.12 --- Log message: Fix test case. --- Diffs of the changes: (+0 -2) long.ll |2 -- 1 files changed, 2 deletions(-) Index: llvm/test/CodeGen/ARM/long.ll diff -u llvm/test/CodeGen/ARM/long.ll:1.11 llvm/test/CodeGen/ARM/long.ll:1.12 --- llvm/test/CodeGen/ARM/long.ll:1.11 Fri Jan 26 18:05:14 2007 +++ llvm/test/CodeGen/ARM/long.ll Wed Jan 31 17:51:35 2007 @@ -9,9 +9,7 @@ ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep "umull" | wc -l | grep 1 && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -enable-thumb && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -enable-thumb | grep "mvn" | wc -l | grep 1 && -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -enable-thumb | grep "adds" | wc -l | grep 1 && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -enable-thumb | grep "adc" | wc -l | grep 1 && -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -enable-thumb | grep "subs " | wc -l | grep 1 && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -enable-thumb | grep "sbc" | wc -l | grep 1 && ; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -enable-thumb | grep "__muldi3" ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
Changes in directory llvm/test/CodeGen/PowerPC: 2007-01-31-InlineAsmAddrMode.ll added (r1.1) --- Log message: new testcase --- Diffs of the changes: (+25 -0) 2007-01-31-InlineAsmAddrMode.ll | 25 + 1 files changed, 25 insertions(+) Index: llvm/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll diff -c /dev/null llvm/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll:1.1 *** /dev/null Wed Jan 31 18:39:06 2007 --- llvm/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll Wed Jan 31 18:38:56 2007 *** *** 0 --- 1,25 + ; RUN: llvm-as < %s | llc -march=ppc32 && + ; RUN: llvm-as < %s | llc -march=ppc64 + + ; Test two things: 1) that a frameidx can be rewritten in an inline asm + ; 2) that inline asms can handle reg+imm addr modes. + + %struct.A = type { i32, i32 } + + implementation ; Functions: + + define void @test1() { + entry: + %Out = alloca %struct.A, align 4; <%struct.A*> [#uses=1] + %tmp2 = getelementptr %struct.A* %Out, i32 0, i32 1 + %tmp5 = call i32 asm "lwbrx $0, $1", "=r,m"(i32* %tmp2 ) + ret void + } + + define void @test2() { + entry: + %Out = alloca %struct.A, align 4; <%struct.A*> [#uses=1] + %tmp2 = getelementptr %struct.A* %Out, i32 0, i32 0 ; [#uses=1] + %tmp5 = call i32 asm "lwbrx $0, $2, $1", "=r,r,bO,m"( i8* null, i32 0, i32* %tmp2 ) ; [#uses=0] + ret void + } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp PPCRegisterInfo.cpp
Changes in directory llvm/lib/Target/PowerPC: PPCAsmPrinter.cpp updated: 1.232 -> 1.233 PPCRegisterInfo.cpp updated: 1.103 -> 1.104 --- Log message: Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll --- Diffs of the changes: (+7 -1) PPCAsmPrinter.cpp |5 - PPCRegisterInfo.cpp |3 +++ 2 files changed, 7 insertions(+), 1 deletion(-) Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.232 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.233 --- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.232 Tue Jan 30 14:08:38 2007 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Jan 31 18:39:08 2007 @@ -436,7 +436,10 @@ const char *ExtraCode) { if (ExtraCode && ExtraCode[0]) return true; // Unknown modifier. - printMemRegReg(MI, OpNo); + if (MI->getOperand(OpNo).isRegister()) +printMemRegReg(MI, OpNo); + else +printMemRegImm(MI, OpNo); return false; } Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.103 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.104 --- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.103 Mon Jan 29 17:20:22 2007 +++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Wed Jan 31 18:39:08 2007 @@ -522,6 +522,9 @@ } // Take into account whether it's an add or mem instruction unsigned OffIdx = (i == 2) ? 1 : 2; + if (MI.getOpcode() == TargetInstrInfo::INLINEASM) +OffIdx = i-1; + // Get the frame index. int FrameIndex = MI.getOperand(i).getFrameIndex(); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/README-Thumb.txt
Changes in directory llvm/lib/Target/ARM: README-Thumb.txt updated: 1.3 -> 1.4 --- Log message: Possible JT improvements. --- Diffs of the changes: (+43 -3) README-Thumb.txt | 46 +++--- 1 files changed, 43 insertions(+), 3 deletions(-) Index: llvm/lib/Target/ARM/README-Thumb.txt diff -u llvm/lib/Target/ARM/README-Thumb.txt:1.3 llvm/lib/Target/ARM/README-Thumb.txt:1.4 --- llvm/lib/Target/ARM/README-Thumb.txt:1.3Wed Jan 31 16:11:38 2007 +++ llvm/lib/Target/ARM/README-Thumb.txtWed Jan 31 19:07:48 2007 @@ -16,10 +16,50 @@ and cmp instructions can use high registers. Also, we can use them as temporaries to spill values into. +* In thumb mode, short, byte, and bool preferred alignments are currently set + to 4 to accommodate ISA restriction (i.e. add sp, #imm, imm must be multiple + of 4). + +//===-===// + +Potential jumptable improvements: + * If we know function size is less than (1 << 16) * 2 bytes, we can use 16-bit jumptable entries (e.g. (L1 - L2) >> 1). Or even smaller entries if the function is even smaller. This also applies to ARM. -* In thumb mode, short, byte, and bool preferred alignments are currently set - to 4 to accommodate ISA restriction (i.e. add sp, #imm, imm must be multiple - of 4). +* Thumb jumptable codegen can improve given some help from the assembler. This + is what we generate right now: + + .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4)) +LPCRELL0: + mov r1, #PCRELV0 + add r1, pc + ldr r0, [r0, r1] + cpy pc, r0 + .align 2 +LJTI1_0_0: + .longLBB1_3 +... + +Note there is another pc relative add that we can take advantage of. + add r1, pc, #imm_8 * 4 + +We should be able to generate: + +LPCRELL0: + add r1, LJTI1_0_0 + ldr r0, [r0, r1] + cpy pc, r0 + .align 2 +LJTI1_0_0: + .longLBB1_3 + +if the assembler can translate the add to: + add r1, pc, #((LJTI1_0_0-(LPCRELL0+4))&0xfffc) + +Note the assembler also does something similar to constpool load: +LPCRELL0: + ldr r0, LCPI1_0 +=> + ldr r0, pc, #((LCPI1_0-(LPCRELL0+4))&0xfffc) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
Changes in directory llvm/lib/Target/ARM: ARMConstantIslandPass.cpp updated: 1.18 -> 1.19 --- Log message: Pessmistically assume the .align 2 before the first constpool entry adds two bytes padding. --- Diffs of the changes: (+12 -2) ARMConstantIslandPass.cpp | 14 -- 1 files changed, 12 insertions(+), 2 deletions(-) Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.18 llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.19 --- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.18 Wed Jan 31 17:35:18 2007 +++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Wed Jan 31 19:09:47 2007 @@ -339,6 +339,13 @@ break; } } + +// In thumb mode, if this block is a constpool island, pessmisticly assume +// it needs to be padded by two byte so it's aligned on 4 byte boundary. +if (AFI->isThumbFunction() && +MBB.begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) + MBBSize += 2; + BBSizes.push_back(MBBSize); } } @@ -465,8 +472,11 @@ unsigned MaxDisp) { unsigned PCAdj = AFI->isThumbFunction() ? 4 : 8; unsigned UserOffset = GetOffsetOf(MI) + PCAdj; - unsigned CPEOffset = GetOffsetOf(CPEMI); - + // In thumb mode, pessmisticly assumes the .align 2 before the first CPE + // in the island adds two byte padding. + unsigned AlignAdj = AFI->isThumbFunction() ? 2 : 0; + unsigned CPEOffset = GetOffsetOf(CPEMI) + AlignAdj; + DEBUG(std::cerr << "User of CPE#" << CPEMI->getOperand(0).getImm() << " max delta=" << MaxDisp << " at offset " << int(UserOffset-CPEOffset) << "\t" ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/tools/lto/Makefile
Changes in directory llvm/tools/lto: Makefile updated: 1.7 -> 1.8 --- Log message: Include Makefile.config before testing OS. --- Diffs of the changes: (+5 -5) Makefile | 10 +- 1 files changed, 5 insertions(+), 5 deletions(-) Index: llvm/tools/lto/Makefile diff -u llvm/tools/lto/Makefile:1.7 llvm/tools/lto/Makefile:1.8 --- llvm/tools/lto/Makefile:1.7 Mon Jan 8 00:25:29 2007 +++ llvm/tools/lto/Makefile Wed Jan 31 19:18:57 2007 @@ -10,6 +10,11 @@ LEVEL = ../.. LIBRARYNAME = LLVMlto +# Include this here so we can get the configuration of the targets +# that have been configured for construction. We have to do this +# early so we can set up LINK_COMPONENTS before includeing Makefile.rules +include $(LEVEL)/Makefile.config + LINK_LIBS_IN_SHARED = 1 ifeq ($(OS),Darwin) SHARED_LIBRARY = 1 @@ -19,11 +24,6 @@ BUILD_ARCHIVE = 1 endif -# Include this here so we can get the configuration of the targets -# that have been configured for construction. We have to do this -# early so we can set up LINK_COMPONENTS before includeing Makefile.rules -include $(LEVEL)/Makefile.config - LINK_COMPONENTS := $(TARGETS_TO_BUILD) ipo scalaropts linker bcreader bcwriter include $(LEVEL)/Makefile.common ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.352 -> 1.353 --- Log message: Emit a better assertion message for PR1133: http://llvm.org/PR1133 --- Diffs of the changes: (+18 -15) SelectionDAGISel.cpp | 33 ++--- 1 files changed, 18 insertions(+), 15 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.352 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.353 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.352Tue Jan 30 14:08:37 2007 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Jan 31 19:21:12 2007 @@ -2663,23 +2663,26 @@ unsigned NumOps = cast(AsmNodeOperands[CurOp])->getValue(); -assert((NumOps & 7) == 2 /*REGDEF*/ && - "Skipped past definitions?"); +if ((NumOps & 7) == 2 /*REGDEF*/) { + // Add NumOps>>3 registers to MatchedRegs. + RegsForValue MatchedRegs; + MatchedRegs.ValueVT = InOperandVal.getValueType(); + MatchedRegs.RegVT = AsmNodeOperands[CurOp+1].getValueType(); + for (unsigned i = 0, e = NumOps>>3; i != e; ++i) { +unsigned Reg = + cast(AsmNodeOperands[++CurOp])->getReg(); +MatchedRegs.Regs.push_back(Reg); + } -// Add NumOps>>3 registers to MatchedRegs. -RegsForValue MatchedRegs; -MatchedRegs.ValueVT = InOperandVal.getValueType(); -MatchedRegs.RegVT = AsmNodeOperands[CurOp+1].getValueType(); -for (unsigned i = 0, e = NumOps>>3; i != e; ++i) { - unsigned Reg=cast(AsmNodeOperands[++CurOp])->getReg(); - MatchedRegs.Regs.push_back(Reg); + // Use the produced MatchedRegs object to + MatchedRegs.getCopyToRegs(InOperandVal, DAG, Chain, Flag, +TLI.getPointerTy()); + MatchedRegs.AddInlineAsmOperands(1 /*REGUSE*/, DAG, AsmNodeOperands); + break; +} else { + assert((NumOps & 7) == 4/*MEM*/ && "Unknown matching constraint!"); + assert(0 && "matching constraints for memory operands unimp"); } - -// Use the produced MatchedRegs object to -MatchedRegs.getCopyToRegs(InOperandVal, DAG, Chain, Flag, - TLI.getPointerTy()); -MatchedRegs.AddInlineAsmOperands(1 /*REGUSE*/, DAG, AsmNodeOperands); -break; } TargetLowering::ConstraintType CTy = TargetLowering::C_RegisterClass; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Support/CommandLine.h
Changes in directory llvm/include/llvm/Support: CommandLine.h updated: 1.57 -> 1.58 --- Log message: Add PrintVersionMessage() that tools can use to print version number without exiting program. --- Diffs of the changes: (+1 -0) CommandLine.h |1 + 1 files changed, 1 insertion(+) Index: llvm/include/llvm/Support/CommandLine.h diff -u llvm/include/llvm/Support/CommandLine.h:1.57 llvm/include/llvm/Support/CommandLine.h:1.58 --- llvm/include/llvm/Support/CommandLine.h:1.57Thu Oct 12 18:50:28 2006 +++ llvm/include/llvm/Support/CommandLine.h Wed Jan 31 19:43:37 2007 @@ -1281,6 +1281,7 @@ extrahelp(const char* help); }; +void PrintVersionMessage(); // This function just prints the help message, exactly the same way as if the // --help option had been given on the command line. // NOTE: THIS FUNCTION TERMINATES THE PROGRAM! ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Support/CommandLine.cpp
Changes in directory llvm/lib/Support: CommandLine.cpp updated: 1.81 -> 1.82 --- Log message: Add PrintVersionMessage() that tools can use to print version number without exiting program. --- Diffs of the changes: (+11 -3) CommandLine.cpp | 14 +++--- 1 files changed, 11 insertions(+), 3 deletions(-) Index: llvm/lib/Support/CommandLine.cpp diff -u llvm/lib/Support/CommandLine.cpp:1.81 llvm/lib/Support/CommandLine.cpp:1.82 --- llvm/lib/Support/CommandLine.cpp:1.81 Thu Dec 7 17:41:45 2006 +++ llvm/lib/Support/CommandLine.cppWed Jan 31 19:43:37 2007 @@ -980,9 +980,7 @@ namespace { class VersionPrinter { public: - void operator=(bool OptionWasSpecified) { -if (OptionWasSpecified) { - if (OverrideVersionPrinter == 0) { + void print() { cout << "Low Level Virtual Machine (http://llvm.org/):\n"; cout << " " << PACKAGE_NAME << " version " << PACKAGE_VERSION; #ifdef LLVM_VERSION_INFO @@ -998,6 +996,11 @@ cout << " with assertions"; #endif cout << ".\n"; + } + void operator=(bool OptionWasSpecified) { +if (OptionWasSpecified) { + if (OverrideVersionPrinter == 0) { +print(); Options->clear(); // Don't bother making option dtors remove from map. exit(1); } else { @@ -1028,6 +1031,11 @@ NormalPrinter = true; } +/// Utility function for printing version number. +void cl::PrintVersionMessage() { + VersionPrinterInstance.print(); +} + void cl::SetVersionPrinter(void (*func)()) { OverrideVersionPrinter = func; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/tools/lto/lto.cpp
Changes in directory llvm/tools/lto: lto.cpp updated: 1.32 -> 1.33 --- Log message: Add printVersion(). Linker can use it to print LLVM version number. --- Diffs of the changes: (+4 -0) lto.cpp |4 1 files changed, 4 insertions(+) Index: llvm/tools/lto/lto.cpp diff -u llvm/tools/lto/lto.cpp:1.32 llvm/tools/lto/lto.cpp:1.33 --- llvm/tools/lto/lto.cpp:1.32 Tue Jan 30 14:08:39 2007 +++ llvm/tools/lto/lto.cpp Wed Jan 31 19:46:06 2007 @@ -457,6 +457,10 @@ return LTO_OPT_SUCCESS; } +void LTO::printVersion() { +cl::PrintVersionMessage(); +} + /// Unused pure-virtual destructor. Must remain empty. LinkTimeOptimizer::~LinkTimeOptimizer() {} ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/LinkTimeOptimizer.h
Changes in directory llvm/include/llvm: LinkTimeOptimizer.h updated: 1.12 -> 1.13 --- Log message: Add printVersion(). Linker can use it to print LLVM version number. --- Diffs of the changes: (+2 -0) LinkTimeOptimizer.h |2 ++ 1 files changed, 2 insertions(+) Index: llvm/include/llvm/LinkTimeOptimizer.h diff -u llvm/include/llvm/LinkTimeOptimizer.h:1.12 llvm/include/llvm/LinkTimeOptimizer.h:1.13 --- llvm/include/llvm/LinkTimeOptimizer.h:1.12 Thu Oct 26 15:46:22 2006 +++ llvm/include/llvm/LinkTimeOptimizer.h Wed Jan 31 19:46:06 2007 @@ -96,6 +96,7 @@ const char *) = 0; virtual void getTargetTriple(const std::string &, std::string &) = 0; virtual void removeModule (const std::string &InputFilename) = 0; +virtual void printVersion () = 0; virtual ~LinkTimeOptimizer() = 0; }; @@ -119,6 +120,7 @@ void getTargetTriple(const std::string &InputFilename, std::string &targetTriple); void removeModule (const std::string &InputFilename); +void printVersion(); // Constructors and destructors LTO() { ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrThumb.td ARMRegisterInfo.cpp
Changes in directory llvm/lib/Target/ARM: ARMInstrThumb.td updated: 1.11 -> 1.12 ARMRegisterInfo.cpp updated: 1.51 -> 1.52 --- Log message: Special epilogue for vararg functions. We cannot do a pop to pc because there follows a sp increment for the va register save region. Instead issue a separate pop to another register, increment sp, and then return: pop {r4, r5, r6, r7} pop {r3} add sp, #3 * 4 bx r3 --- Diffs of the changes: (+24 -5) ARMInstrThumb.td|5 - ARMRegisterInfo.cpp | 24 2 files changed, 24 insertions(+), 5 deletions(-) Index: llvm/lib/Target/ARM/ARMInstrThumb.td diff -u llvm/lib/Target/ARM/ARMInstrThumb.td:1.11 llvm/lib/Target/ARM/ARMInstrThumb.td:1.12 --- llvm/lib/Target/ARM/ARMInstrThumb.td:1.11 Wed Jan 31 14:12:31 2007 +++ llvm/lib/Target/ARM/ARMInstrThumb.tdWed Jan 31 19:49:46 2007 @@ -165,8 +165,11 @@ // Control Flow Instructions. // -let isReturn = 1, isTerminator = 1 in +let isReturn = 1, isTerminator = 1 in { def tBX_RET : TI<(ops), "bx lr", [(ARMretflag)]>; + // Alternative return instruction used by vararg functions. + def tBX_RET_vararg : TI<(ops GPR:$dst), "bx $dst", []>; +} // FIXME: remove when we have a way to marking a MI with these properties. let isLoad = 1, isReturn = 1, isTerminator = 1 in Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.51 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.52 --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.51Wed Jan 31 17:17:29 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Wed Jan 31 19:49:46 2007 @@ -104,11 +104,15 @@ if (!AFI->isThumbFunction() || CSI.empty()) return false; + bool isVarArg = AFI->getVarArgsRegSaveSize() > 0; MachineInstr *PopMI = new MachineInstr(TII.get(ARM::tPOP)); MBB.insert(MI, PopMI); for (unsigned i = CSI.size(); i != 0; --i) { unsigned Reg = CSI[i-1].getReg(); if (Reg == ARM::LR) { + // Special epilogue for vararg functions. See emitEpilogue + if (isVarArg) +continue; Reg = ARM::PC; PopMI->setInstrDescriptor(TII.get(ARM::tPOP_RET)); MBB.erase(MI); @@ -1115,9 +1119,15 @@ NumBytes -= (AFI->getGPRCalleeSavedArea1Size() + AFI->getGPRCalleeSavedArea2Size() + AFI->getDPRCalleeSavedAreaSize()); - if (isThumb) -emitSPUpdate(MBB, MBBI, NumBytes, isThumb, TII); - else { + if (isThumb) { +if (MBBI->getOpcode() == ARM::tBX_RET && +&MBB.front() != MBBI && +prior(MBBI)->getOpcode() == ARM::tPOP) { + MachineBasicBlock::iterator PMBBI = prior(MBBI); + emitSPUpdate(MBB, PMBBI, NumBytes, isThumb, TII); +} else + emitSPUpdate(MBB, MBBI, NumBytes, isThumb, TII); + } else { // Darwin ABI requires FP to point to the stack slot that contains the // previous FP. if (STI.isTargetDarwin() || hasFP(MF)) { @@ -1149,8 +1159,14 @@ emitSPUpdate(MBB, MBBI, AFI->getGPRCalleeSavedArea1Size(), false, TII); } - if (VARegSaveSize) + if (VARegSaveSize) { +// Epilogue for vararg functions: pop LR to R3 and branch off it. +// FIXME: Verify this is still ok when R3 is no longer being reserved. +BuildMI(MBB, MBBI, TII.get(ARM::tPOP)).addReg(ARM::R3); emitSPUpdate(MBB, MBBI, VARegSaveSize, isThumb, TII); +BuildMI(MBB, MBBI, TII.get(ARM::tBX_RET_vararg)).addReg(ARM::R3); +MBB.erase(MBBI); + } } unsigned ARMRegisterInfo::getRARegister() const { ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] One more ARM failure
The llc infinite loop in long.ll appears to be fixed. But, now I have the one below failing on x86-pc-linux-gnu. Please fix or XFAIL. FAIL: /proj/llvm/llvm-4/test/CodeGen/ARM/large-stack.ll: child process exited abnormally .text .globl test1 .align 2 test1: sub sp, sp, #1, 24 @ 256 add sp, sp, #1, 24 @ 256 bx lr .size test1, .-test1 .globl test2 .align 2 test2: sub sp, sp, #72 sub sp, sp, #1, 20 @ 4096 add sp, sp, #72 add sp, sp, #1, 20 @ 4096 bx lr .size test2, .-test2 .globl test3 .align 2 test3: sub sp, sp, #16 sub sp, sp, #3, 4 @ 805306368 mov r0, #0 add r12, sp, #3, 4 @ 805306368 str r0, [r12, #+8] add sp, sp, #16 add sp, sp, #3, 4 @ 805306368 bx lr .size test3, .-test3 .text .globl test1 .align 1 .code 16 .thumb_func test1 test1: sub sp, #64 * 4 add sp, #64 * 4 bx lr .size test1, .-test1 .globl test2 .align 1 .code 16 .thumb_func test2 test2: cpy r12, r3 ldr r3, .CPI2_0 add sp, r3 cpy r3, r12 cpy r12, r3 ldr r3, .CPI2_1 add sp, r3 cpy r3, r12 bx lr .BB2_1: .align 2 .CPI2_0: .long 4294963128 .CPI2_1: .long 4168 .size test2, .-test2 .globl test3 .align 1 .code 16 .thumb_func test3 test3: cpy r12, r3 ldr r3, .CPI3_0 add sp, r3 cpy r3, r12 mov r0, #0 ldr r3, .CPI3_2 add r3, sp str r0, [r3, #2 * 4] cpy r12, r3 ldr r3, .CPI3_1 add sp, r3 cpy r3, r12 bx lr .BB3_1: .align 2 .CPI3_0: .long 3489660912 .CPI3_1: .long 805306384 .CPI3_2: .long 805306368 .size test3, .-test3 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CodeGen/ARM/vargs2.ll
Changes in directory llvm/test/CodeGen/ARM: vargs2.ll updated: 1.5 -> 1.6 --- Log message: Added a thumb vararg test. --- Diffs of the changes: (+4 -1) vargs2.ll |5 - 1 files changed, 4 insertions(+), 1 deletion(-) Index: llvm/test/CodeGen/ARM/vargs2.ll diff -u llvm/test/CodeGen/ARM/vargs2.ll:1.5 llvm/test/CodeGen/ARM/vargs2.ll:1.6 --- llvm/test/CodeGen/ARM/vargs2.ll:1.5 Fri Jan 19 03:20:23 2007 +++ llvm/test/CodeGen/ARM/vargs2.ll Wed Jan 31 19:56:43 2007 @@ -1,4 +1,7 @@ -; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm %% +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -enable-thumb && +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -enable-thumb | grep pop | wc -l | grep 2 + %str = internal constant [4 x sbyte] c"%d\0A\00" ; <[4 x sbyte]*> [#uses=1] implementation ; Functions: ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp ARMTargetMachine.cpp
Changes in directory llvm/lib/Target/ARM: ARMRegisterInfo.cpp updated: 1.52 -> 1.53 ARMTargetMachine.cpp updated: 1.19 -> 1.20 --- Log message: Also set alignment of stack-based structs to 4 in thumb mode. --- Diffs of the changes: (+7 -8) ARMRegisterInfo.cpp |3 +-- ARMTargetMachine.cpp | 12 ++-- 2 files changed, 7 insertions(+), 8 deletions(-) Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.52 llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.53 --- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.52Wed Jan 31 19:49:46 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Wed Jan 31 20:18:36 2007 @@ -708,8 +708,7 @@ } Offset += InstrOffs * Scale; -assert((Scale == 1 || (Offset & (Scale-1)) == 0) && - "Can't encode this offset!"); +assert((Offset & (Scale-1)) == 0 && "Can't encode this offset!"); if (Offset < 0) { Offset = -Offset; isSub = true; Index: llvm/lib/Target/ARM/ARMTargetMachine.cpp diff -u llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.19 llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.20 --- llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.19 Wed Jan 31 16:08:40 2007 +++ llvm/lib/Target/ARM/ARMTargetMachine.cppWed Jan 31 20:18:36 2007 @@ -35,12 +35,12 @@ ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS) : Subtarget(M, FS), DataLayout(Subtarget.isTargetDarwin() ? - (Subtarget.isThumb() ? -std::string("e-p:32:32-d:32:32-l:32:32-s:16:32-b:8:32-B:8:32") : -std::string("e-p:32:32-d:32:32-l:32:32")) : - (Subtarget.isThumb() ? -std::string("e-p:32:32-d:32:64-l:32:64-s:16:32-b:8:32-B:8:32") : -std::string("e-p:32:32-d:32:64-l:32:64"))), + (Subtarget.isThumb() ? + std::string("e-p:32:32-d:32:32-l:32:32-s:16:32-b:8:32-B:8:32-A:32") : + std::string("e-p:32:32-d:32:32-l:32:32")) : + (Subtarget.isThumb() ? + std::string("e-p:32:32-d:32:64-l:32:64-s:16:32-b:8:32-B:8:32-A:32") : + std::string("e-p:32:32-d:32:64-l:32:64"))), InstrInfo(Subtarget), FrameInfo(Subtarget) {} ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll
Changes in directory llvm/test/CodeGen/ARM: 2007-01-31-RegInfoAssert.ll added (r1.1) --- Log message: Add a test case. --- Diffs of the changes: (+16 -0) 2007-01-31-RegInfoAssert.ll | 16 1 files changed, 16 insertions(+) Index: llvm/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll diff -c /dev/null llvm/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll:1.1 *** /dev/null Wed Jan 31 20:27:34 2007 --- llvm/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll Wed Jan 31 20:27:24 2007 *** *** 0 --- 1,16 + ; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -enable-thumb + + %struct.rtx_def = type { i8 } + @str = external global [7 x i8] + + define void @f1() { + %D = alloca %struct.rtx_def, align 1 + %tmp1 = bitcast %struct.rtx_def* %D to i32* + %tmp7 = load i32* %tmp1 + %tmp14 = lshr i32 %tmp7, i8 1 + %tmp1415 = and i32 %tmp14, 1 + call void (i32, ...)* @printf( i32 undef, i32 0, i32 %tmp1415 ) + ret void + } + + declare void @printf(i32, ...) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/README-Thumb.txt
Changes in directory llvm/lib/Target/ARM: README-Thumb.txt updated: 1.4 -> 1.5 --- Log message: Add a note. --- Diffs of the changes: (+61 -0) README-Thumb.txt | 61 +++ 1 files changed, 61 insertions(+) Index: llvm/lib/Target/ARM/README-Thumb.txt diff -u llvm/lib/Target/ARM/README-Thumb.txt:1.4 llvm/lib/Target/ARM/README-Thumb.txt:1.5 --- llvm/lib/Target/ARM/README-Thumb.txt:1.4Wed Jan 31 19:07:48 2007 +++ llvm/lib/Target/ARM/README-Thumb.txtWed Jan 31 20:46:20 2007 @@ -63,3 +63,64 @@ ldr r0, LCPI1_0 => ldr r0, pc, #((LCPI1_0-(LPCRELL0+4))&0xfffc) + + +//===-===// + +We compiles the following using a jump table. + +define i16 @func_entry_2E_ce(i32 %i) { +newFuncRoot: +br label %entry.ce + +bb12.exitStub: ; preds = %entry.ce +ret i16 0 + +bb4.exitStub: ; preds = %entry.ce, %entry.ce, %entry.ce +ret i16 1 + +bb9.exitStub: ; preds = %entry.ce, %entry.ce, %entry.ce +ret i16 2 + +bb.exitStub:; preds = %entry.ce +ret i16 3 + +entry.ce: ; preds = %newFuncRoot +switch i32 %i, label %bb12.exitStub [ + i32 0, label %bb4.exitStub + i32 1, label %bb9.exitStub + i32 2, label %bb4.exitStub + i32 3, label %bb4.exitStub + i32 7, label %bb9.exitStub + i32 8, label %bb.exitStub + i32 9, label %bb9.exitStub +] +} + +gcc compiles to: + + cmp r0, #9 + @ lr needed for prologue + bhi L2 + ldr r3, L11 + mov r2, #1 + mov r1, r2, asl r0 + andsr0, r3, r2, asl r0 + movne r0, #2 + bxnelr + tst r1, #13 + beq L9 +L3: + mov r0, r2 + bx lr +L9: + tst r1, #256 + movne r0, #3 + bxnelr +L2: + mov r0, #0 + bx lr +L12: + .align 2 +L11: + .long 642 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrThumb.td
Changes in directory llvm/lib/Target/ARM: ARMInstrThumb.td updated: 1.12 -> 1.13 --- Log message: .set pc relative displacement bug: label should be moved down one instruction to just before the add r1, pc: Before: .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4)) LPCRELL0: mov r1, #PCRELV0 add r1, pc Now: .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4)) mov r1, #PCRELV0 LPCRELL0: add r1, pc --- Diffs of the changes: (+6 -6) ARMInstrThumb.td | 12 ++-- 1 files changed, 6 insertions(+), 6 deletions(-) Index: llvm/lib/Target/ARM/ARMInstrThumb.td diff -u llvm/lib/Target/ARM/ARMInstrThumb.td:1.12 llvm/lib/Target/ARM/ARMInstrThumb.td:1.13 --- llvm/lib/Target/ARM/ARMInstrThumb.td:1.12 Wed Jan 31 19:49:46 2007 +++ llvm/lib/Target/ARM/ARMInstrThumb.tdWed Jan 31 21:04:49 2007 @@ -480,17 +480,17 @@ // assembler. def tLEApcrel : TIx2<(ops GPR:$dst, i32imm:$label), !strconcat(!strconcat(".set PCRELV${:uid}, ($label-(", - "${:private}PCRELL${:uid}+4))\n"), - !strconcat("${:private}PCRELL${:uid}:\n\t", - "mov $dst, #PCRELV${:uid}\n\tadd $dst, pc")), + "${:private}PCRELL${:uid}+6))\n"), + !strconcat("\tmov $dst, #PCRELV${:uid}\n", + "${:private}PCRELL${:uid}:\n\tadd $dst, pc")), []>; def tLEApcrelJT : TIx2<(ops GPR:$dst, i32imm:$label, i32imm:$id), !strconcat(!strconcat(".set PCRELV${:uid}, (${label}_${id:no_hash}-(", "${:private}PCRELL${:uid}+4))\n"), - !strconcat("${:private}PCRELL${:uid}:\n\t", - "mov $dst, #PCRELV${:uid}\n\tadd $dst, pc")), - []>; + !strconcat("\tmov $dst, #PCRELV${:uid}\n", +"${:private}PCRELL${:uid}:\n\tadd $dst, pc")), +[]>; //===--===// // Non-Instruction Patterns ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/Target/ARM/README-Thumb.txt
> +// > ===--- > --===// > + > +We compiles the following using a jump table. This is the target-independent "shift trick", which applies any time you have a small number of unique destinations, and a spread smaller than your GPR size. -Chris > +define i16 @func_entry_2E_ce(i32 %i) { > +newFuncRoot: > +br label %entry.ce > + > +bb12.exitStub: ; preds = %entry.ce > +ret i16 0 > + > +bb4.exitStub: ; preds = %entry.ce, %entry.ce, %entry.ce > +ret i16 1 > + > +bb9.exitStub: ; preds = %entry.ce, %entry.ce, %entry.ce > +ret i16 2 > + > +bb.exitStub:; preds = %entry.ce > +ret i16 3 > + > +entry.ce: ; preds = %newFuncRoot > +switch i32 %i, label %bb12.exitStub [ > + i32 0, label %bb4.exitStub > + i32 1, label %bb9.exitStub > + i32 2, label %bb4.exitStub > + i32 3, label %bb4.exitStub > + i32 7, label %bb9.exitStub > + i32 8, label %bb.exitStub > + i32 9, label %bb9.exitStub > +] > +} > + > +gcc compiles to: > + > + cmp r0, #9 > + @ lr needed for prologue > + bhi L2 > + ldr r3, L11 > + mov r2, #1 > + mov r1, r2, asl r0 > + andsr0, r3, r2, asl r0 > + movne r0, #2 > + bxnelr > + tst r1, #13 > + beq L9 > +L3: > + mov r0, r2 > + bx lr > +L9: > + tst r1, #256 > + movne r0, #3 > + bxnelr > +L2: > + mov r0, #0 > + bx lr > +L12: > + .align 2 > +L11: > + .long 642 > > > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp ScheduleDAGRRList.cpp ScheduleDAGSimple.cpp SelectionDAG.cpp SelectionDAGISel.cpp TargetLowering.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp updated: 1.463 -> 1.464 ScheduleDAGRRList.cpp updated: 1.25 -> 1.26 ScheduleDAGSimple.cpp updated: 1.23 -> 1.24 SelectionDAG.cpp updated: 1.379 -> 1.380 SelectionDAGISel.cpp updated: 1.353 -> 1.354 TargetLowering.cpp updated: 1.87 -> 1.88 --- Log message: Fit in 80 columns --- Diffs of the changes: (+19 -15) LegalizeDAG.cpp |8 ScheduleDAGRRList.cpp | 12 +++- ScheduleDAGSimple.cpp |4 ++-- SelectionDAG.cpp |6 -- SelectionDAGISel.cpp |2 +- TargetLowering.cpp|2 +- 6 files changed, 19 insertions(+), 15 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.463 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.464 --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.463 Wed Jan 31 03:29:11 2007 +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Jan 31 22:55:59 2007 @@ -1516,7 +1516,7 @@ Tmp2 = LegalizeOp(Load.getValue(1)); break; } -assert(ExtType != ISD::EXTLOAD && "EXTLOAD should always be supported!"); +assert(ExtType != ISD::EXTLOAD &&"EXTLOAD should always be supported!"); // Turn the unsupported load into an EXTLOAD followed by an explicit // zero/sign extend inreg. Result = DAG.getExtLoad(ISD::EXTLOAD, Node->getValueType(0), @@ -1649,7 +1649,7 @@ // type should be returned by reference! SDOperand Lo, Hi; SplitVectorOp(Tmp2, Lo, Hi); -Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, Hi, Tmp3); +Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, Hi,Tmp3); Result = LegalizeOp(Result); } } @@ -4689,7 +4689,7 @@ ISD::LoadExtType ExtType = LD->getExtensionType(); if (ExtType == ISD::NON_EXTLOAD) { - Lo = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(), LD->getSrcValueOffset()); + Lo = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(),LD->getSrcValueOffset()); if (VT == MVT::f32 || VT == MVT::f64) { // f32->i32 or f64->i64 one to one expansion. // Remember that we legalized the chain. @@ -4705,7 +4705,7 @@ Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr, getIntPtrConstant(IncrementSize)); // FIXME: This creates a bogus srcvalue! - Hi = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(), LD->getSrcValueOffset()); + Hi = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(),LD->getSrcValueOffset()); // Build a factor node to remember that this load is independent of the // other one. Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.25 llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.26 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp:1.25Mon Jan 8 17:55:53 2007 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Wed Jan 31 22:55:59 2007 @@ -696,7 +696,8 @@ /// CalcNodeSethiUllmanNumber - Priority is the Sethi Ullman number. /// Smaller number is the higher priority. template -unsigned BURegReductionPriorityQueue::CalcNodeSethiUllmanNumber(const SUnit *SU) { +unsigned BURegReductionPriorityQueue:: +CalcNodeSethiUllmanNumber(const SUnit *SU) { unsigned &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum]; if (SethiUllmanNumber != 0) return SethiUllmanNumber; @@ -805,7 +806,8 @@ /// CalcNodeSethiUllmanNumber - Priority is the Sethi Ullman number. /// Smaller number is the higher priority. template -unsigned TDRegReductionPriorityQueue::CalcNodeSethiUllmanNumber(const SUnit *SU) { +unsigned TDRegReductionPriorityQueue:: +CalcNodeSethiUllmanNumber(const SUnit *SU) { unsigned &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum]; if (SethiUllmanNumber != 0) return SethiUllmanNumber; @@ -816,8 +818,8 @@ else if (SU->NumSuccsLeft == 0) // If SU does not have a use, i.e. it doesn't produce a value that would // be consumed (e.g. store), then it terminates a chain of computation. -// Give it a small SethiUllman number so it will be scheduled right before its -// predecessors that it doesn't lengthen their live ranges. +// Give it a small SethiUllman number so it will be scheduled right before +// its predecessors that it doesn't lengthen their live ranges. SethiUllmanNumber = 0; else if (SU->NumPredsLeft == 0 && (Opc != ISD::CopyFromReg || isCopyFromLiveIn(SU))) @@ -868,6 +870,6 @@ SelectionDAG *DAG, MachineBasicBlock *BB) { return new ScheduleDAGRRList(*DAG, BB, DAG->getTarget(), false, - new TDRegReductionPriorityQueue()); + new TDRegReductionPriorityQueue()); } Index: llvm/lib/Code
[llvm-commits] CVS: llvm/lib/System/DynamicLibrary.cpp
Changes in directory llvm/lib/System: DynamicLibrary.cpp updated: 1.23 -> 1.24 --- Log message: silence warning --- Diffs of the changes: (+1 -0) DynamicLibrary.cpp |1 + 1 files changed, 1 insertion(+) Index: llvm/lib/System/DynamicLibrary.cpp diff -u llvm/lib/System/DynamicLibrary.cpp:1.23 llvm/lib/System/DynamicLibrary.cpp:1.24 --- llvm/lib/System/DynamicLibrary.cpp:1.23 Fri Jan 19 16:04:24 2007 +++ llvm/lib/System/DynamicLibrary.cpp Wed Jan 31 22:57:00 2007 @@ -49,6 +49,7 @@ static bool did_initialize_ltdl = false; if (!did_initialize_ltdl) { int Err = lt_dlinit(); +Err = Err; // Silence warning. assert(0 == Err && "Can't init the ltdl library"); did_initialize_ltdl = true; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/Instructions.cpp
Changes in directory llvm/lib/VMCore: Instructions.cpp updated: 1.69 -> 1.70 --- Log message: silence some warnings when assertions are disabled. --- Diffs of the changes: (+8 -2) Instructions.cpp | 10 -- 1 files changed, 8 insertions(+), 2 deletions(-) Index: llvm/lib/VMCore/Instructions.cpp diff -u llvm/lib/VMCore/Instructions.cpp:1.69 llvm/lib/VMCore/Instructions.cpp:1.70 --- llvm/lib/VMCore/Instructions.cpp:1.69 Wed Jan 31 16:30:26 2007 +++ llvm/lib/VMCore/Instructions.cppWed Jan 31 22:59:37 2007 @@ -203,6 +203,7 @@ const FunctionType *FTy = cast(cast(Func->getType())->getElementType()); + FTy = FTy; // silence warning. assert((Params.size() == FTy->getNumParams() || (FTy->isVarArg() && Params.size() > FTy->getNumParams())) && @@ -224,6 +225,7 @@ const FunctionType *FTy = cast(cast(Func->getType())->getElementType()); + FTy = FTy; // silence warning. assert((FTy->getNumParams() == 2 || (FTy->isVarArg() && FTy->getNumParams() < 2)) && @@ -244,6 +246,7 @@ const FunctionType *FTy = cast(cast(Func->getType())->getElementType()); + FTy = FTy; // silence warning. assert((FTy->getNumParams() == 1 || (FTy->isVarArg() && FTy->getNumParams() == 0)) && @@ -258,10 +261,11 @@ Use *OL = OperandList = new Use[1]; OL[0].init(Func, this); - const FunctionType *MTy = + const FunctionType *FTy = cast(cast(Func->getType())->getElementType()); + FTy = FTy; // silence warning. - assert(MTy->getNumParams() == 0 && "Calling a function with bad signature"); + assert(FTy->getNumParams() == 0 && "Calling a function with bad signature"); } CallInst::CallInst(Value *Func, const std::vector &Params, @@ -356,6 +360,7 @@ OL[2].init(IfException, this); const FunctionType *FTy = cast(cast(Fn->getType())->getElementType()); + FTy = FTy; // silence warning. assert((Params.size() == FTy->getNumParams()) || (FTy->isVarArg() && Params.size() > FTy->getNumParams()) && @@ -1040,6 +1045,7 @@ void BinaryOperator::init(BinaryOps iType) { Value *LHS = getOperand(0), *RHS = getOperand(1); + LHS = LHS; RHS = RHS; // Silence warnings. assert(LHS->getType() == RHS->getType() && "Binary operator operand types must match!"); #ifndef NDEBUG ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/ADT/IndexedMap.h
Changes in directory llvm/include/llvm/ADT: IndexedMap.h updated: 1.9 -> 1.10 --- Log message: rename DenseMap -> IndexedMap. --- Diffs of the changes: (+7 -7) IndexedMap.h | 14 +++--- 1 files changed, 7 insertions(+), 7 deletions(-) Index: llvm/include/llvm/ADT/IndexedMap.h diff -u llvm/include/llvm/ADT/IndexedMap.h:1.9 llvm/include/llvm/ADT/IndexedMap.h:1.10 --- llvm/include/llvm/ADT/IndexedMap.h:1.9 Thu Sep 30 16:39:47 2004 +++ llvm/include/llvm/ADT/IndexedMap.h Wed Jan 31 23:28:10 2007 @@ -1,4 +1,4 @@ -//===- llvm/ADT/DenseMap.h - A dense map implmentation --*- C++ -*-===// +//===- llvm/ADT/IndexedMap.h - An index map implementation --*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -7,7 +7,7 @@ // //===--===// // -// This file implements a dense map. A dense map template takes two +// This file implements an indexed map. The index map template takes two // types. The first is the mapped type and the second is a functor // that maps its argument to a size_t. On instantiation a "null" value // can be provided to be used as a "does not exist" indicator in the @@ -17,8 +17,8 @@ // //===--===// -#ifndef LLVM_ADT_DENSEMAP_H -#define LLVM_ADT_DENSEMAP_H +#ifndef LLVM_ADT_INDEXEDMAP_H +#define LLVM_ADT_INDEXEDMAP_H #include #include @@ -33,7 +33,7 @@ }; template - class DenseMap { + class IndexMap { typedef typename ToIndexT::argument_type IndexT; typedef std::vector StorageT; StorageT storage_; @@ -41,9 +41,9 @@ ToIndexT toIndex_; public: -DenseMap() : nullVal_(T()) { } +IndexMap() : nullVal_(T()) { } -explicit DenseMap(const T& val) : nullVal_(val) { } +explicit IndexMap(const T& val) : nullVal_(val) { } typename StorageT::reference operator[](IndexT n) { assert(toIndex_(n) < storage_.size() && "index out of bounds!"); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/ADT/IndexedMap.h DenseMap.h
Changes in directory llvm/include/llvm/ADT: IndexedMap.h updated: 1.10 -> 1.11 DenseMap.h (r1.9) removed --- Log message: rename DenseMap to IndexedMap. --- Diffs of the changes: (+3 -3) IndexedMap.h |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/include/llvm/ADT/IndexedMap.h diff -u llvm/include/llvm/ADT/IndexedMap.h:1.10 llvm/include/llvm/ADT/IndexedMap.h:1.11 --- llvm/include/llvm/ADT/IndexedMap.h:1.10 Wed Jan 31 23:28:10 2007 +++ llvm/include/llvm/ADT/IndexedMap.h Wed Jan 31 23:30:56 2007 @@ -33,7 +33,7 @@ }; template - class IndexMap { + class IndexedMap { typedef typename ToIndexT::argument_type IndexT; typedef std::vector StorageT; StorageT storage_; @@ -41,9 +41,9 @@ ToIndexT toIndex_; public: -IndexMap() : nullVal_(T()) { } +IndexedMap() : nullVal_(T()) { } -explicit IndexMap(const T& val) : nullVal_(val) { } +explicit IndexedMap(const T& val) : nullVal_(val) { } typename StorageT::reference operator[](IndexT n) { assert(toIndex_(n) < storage_.size() && "index out of bounds!"); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/PHIElimination.cpp RegAllocLocal.cpp VirtRegMap.h
Changes in directory llvm/lib/CodeGen: PHIElimination.cpp updated: 1.53 -> 1.54 RegAllocLocal.cpp updated: 1.99 -> 1.100 VirtRegMap.h updated: 1.25 -> 1.26 --- Log message: rename DenseMap to IndexedMap. --- Diffs of the changes: (+5 -6) PHIElimination.cpp |1 - RegAllocLocal.cpp |4 ++-- VirtRegMap.h |6 +++--- 3 files changed, 5 insertions(+), 6 deletions(-) Index: llvm/lib/CodeGen/PHIElimination.cpp diff -u llvm/lib/CodeGen/PHIElimination.cpp:1.53 llvm/lib/CodeGen/PHIElimination.cpp:1.54 --- llvm/lib/CodeGen/PHIElimination.cpp:1.53Tue Dec 19 16:41:21 2006 +++ llvm/lib/CodeGen/PHIElimination.cpp Wed Jan 31 23:31:50 2007 @@ -21,7 +21,6 @@ #include "llvm/CodeGen/SSARegMap.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/Statistic.h" #include "llvm/Support/Compiler.h" Index: llvm/lib/CodeGen/RegAllocLocal.cpp diff -u llvm/lib/CodeGen/RegAllocLocal.cpp:1.99 llvm/lib/CodeGen/RegAllocLocal.cpp:1.100 --- llvm/lib/CodeGen/RegAllocLocal.cpp:1.99 Tue Dec 19 16:41:21 2006 +++ llvm/lib/CodeGen/RegAllocLocal.cpp Wed Jan 31 23:31:50 2007 @@ -26,7 +26,7 @@ #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/Compiler.h" -#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/IndexedMap.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" #include @@ -55,7 +55,7 @@ // Virt2PhysRegMap - This map contains entries for each virtual register // that is currently available in a physical register. -DenseMap Virt2PhysRegMap; +IndexedMap Virt2PhysRegMap; unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) { return Virt2PhysRegMap[VirtReg]; Index: llvm/lib/CodeGen/VirtRegMap.h diff -u llvm/lib/CodeGen/VirtRegMap.h:1.25 llvm/lib/CodeGen/VirtRegMap.h:1.26 --- llvm/lib/CodeGen/VirtRegMap.h:1.25 Sat Dec 16 23:15:13 2006 +++ llvm/lib/CodeGen/VirtRegMap.h Wed Jan 31 23:31:50 2007 @@ -18,7 +18,7 @@ #define LLVM_CODEGEN_VIRTREGMAP_H #include "llvm/Target/MRegisterInfo.h" -#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/IndexedMap.h" #include "llvm/Support/Streams.h" #include @@ -41,12 +41,12 @@ /// it; even spilled virtual registers (the register mapped to a /// spilled register is the temporary used to load it from the /// stack). -DenseMap Virt2PhysMap; +IndexedMap Virt2PhysMap; /// Virt2StackSlotMap - This is virtual register to stack slot /// mapping. Each spilled virtual register has an entry in it /// which corresponds to the stack slot this register is spilled /// at. -DenseMap Virt2StackSlotMap; +IndexedMap Virt2StackSlotMap; /// MI2VirtMap - This is MachineInstr to virtual register /// mapping. In the case of memory spill code being folded into /// instructions, we need to know which virtual register was ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h SSARegMap.h ScheduleDAG.h
Changes in directory llvm/include/llvm/CodeGen: LiveIntervalAnalysis.h updated: 1.66 -> 1.67 SSARegMap.h updated: 1.12 -> 1.13 ScheduleDAG.h updated: 1.34 -> 1.35 --- Log message: rename DenseMap to IndexedMap. --- Diffs of the changes: (+6 -7) LiveIntervalAnalysis.h |4 ++-- SSARegMap.h|4 ++-- ScheduleDAG.h |5 ++--- 3 files changed, 6 insertions(+), 7 deletions(-) Index: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h diff -u llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.66 llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.67 --- llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.66 Sat Dec 16 23:15:12 2006 +++ llvm/include/llvm/CodeGen/LiveIntervalAnalysis.hWed Jan 31 23:32:05 2007 @@ -20,9 +20,9 @@ #ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H #define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H -#include "llvm/ADT/DenseMap.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/LiveInterval.h" +#include "llvm/ADT/IndexedMap.h" namespace llvm { @@ -51,7 +51,7 @@ typedef std::map Reg2IntervalMap; Reg2IntervalMap r2iMap_; -typedef DenseMap Reg2RegMap; +typedef IndexedMap Reg2RegMap; Reg2RegMap r2rMap_; std::vector allocatableRegs_; Index: llvm/include/llvm/CodeGen/SSARegMap.h diff -u llvm/include/llvm/CodeGen/SSARegMap.h:1.12 llvm/include/llvm/CodeGen/SSARegMap.h:1.13 --- llvm/include/llvm/CodeGen/SSARegMap.h:1.12 Wed Jan 5 10:27:34 2005 +++ llvm/include/llvm/CodeGen/SSARegMap.h Wed Jan 31 23:32:05 2007 @@ -18,14 +18,14 @@ #define LLVM_CODEGEN_SSAREGMAP_H #include "llvm/Target/MRegisterInfo.h" -#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/IndexedMap.h" namespace llvm { class TargetRegisterClass; class SSARegMap { - DenseMap RegClassMap; + IndexedMap RegClassMap; unsigned NextRegNum; public: Index: llvm/include/llvm/CodeGen/ScheduleDAG.h diff -u llvm/include/llvm/CodeGen/ScheduleDAG.h:1.34 llvm/include/llvm/CodeGen/ScheduleDAG.h:1.35 --- llvm/include/llvm/CodeGen/ScheduleDAG.h:1.34Fri Jan 26 15:22:28 2007 +++ llvm/include/llvm/CodeGen/ScheduleDAG.h Wed Jan 31 23:32:05 2007 @@ -16,8 +16,7 @@ #define LLVM_CODEGEN_SCHEDULEDAG_H #include "llvm/CodeGen/SelectionDAG.h" - -#include +#include "llvm/ADT/SmallSet.h" namespace llvm { struct InstrStage; @@ -183,7 +182,7 @@ // represent noop instructions. std::map SUnitMap; // SDNode to SUnit mapping (n -> 1). std::vector SUnits;// The scheduling units. -std::set CommuteSet; // Nodes the should be commuted. +SmallSet CommuteSet; // Nodes the should be commuted. ScheduleDAG(SelectionDAG &dag, MachineBasicBlock *bb, const TargetMachine &tm) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h
Changes in directory llvm/include/llvm/Target: MRegisterInfo.h updated: 1.89 -> 1.90 --- Log message: rename DenseMap to IndexedMap. --- Diffs of the changes: (+1 -1) MRegisterInfo.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/Target/MRegisterInfo.h diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.89 llvm/include/llvm/Target/MRegisterInfo.h:1.90 --- llvm/include/llvm/Target/MRegisterInfo.h:1.89 Thu Jan 25 16:12:41 2007 +++ llvm/include/llvm/Target/MRegisterInfo.hWed Jan 31 23:32:05 2007 @@ -465,7 +465,7 @@ virtual void getInitialFrameState(std::vector &Moves) const; }; -// This is useful when building DenseMaps keyed on virtual registers +// This is useful when building IndexedMaps keyed on virtual registers struct VirtReg2IndexFunctor : std::unary_function { unsigned operator()(unsigned Reg) const { return Reg - MRegisterInfo::FirstVirtualRegister; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Support/FoldingSet.cpp
Changes in directory llvm/lib/Support: FoldingSet.cpp updated: 1.14 -> 1.15 --- Log message: improve comments, add an assertion --- Diffs of the changes: (+6 -3) FoldingSet.cpp |9 ++--- 1 files changed, 6 insertions(+), 3 deletions(-) Index: llvm/lib/Support/FoldingSet.cpp diff -u llvm/lib/Support/FoldingSet.cpp:1.14 llvm/lib/Support/FoldingSet.cpp:1.15 --- llvm/lib/Support/FoldingSet.cpp:1.14Wed Jan 31 15:27:38 2007 +++ llvm/lib/Support/FoldingSet.cpp Wed Jan 31 23:33:21 2007 @@ -226,6 +226,7 @@ /// is not already in the map. InsertPos must be obtained from /// FindNodeOrInsertPos. void FoldingSetImpl::InsertNode(Node *N, void *InsertPos) { + assert(N->getNextInBucket() == 0); // Do we need to grow the hashtable? DEBUG(DOUT << "INSERT: " << N << '\n'); if (NumNodes+1 > NumBuckets*2) { @@ -256,16 +257,18 @@ /// removed or false if the node was not in the folding set. bool FoldingSetImpl::RemoveNode(Node *N) { // Because each bucket is a circular list, we don't need to compute N's hash - // to remove it. Chase around the list until we find the node (or bucket) - // which points to N. + // to remove it. DEBUG(DOUT << "REMOVE: " << N << '\n'); void *Ptr = N->getNextInBucket(); if (Ptr == 0) return false; // Not in folding set. --NumNodes; + N->SetNextInBucket(0); + // Remember what N originally pointed to, either a bucket or another node. void *NodeNextPtr = Ptr; - N->SetNextInBucket(0); + + // Chase around the list until we find the node (or bucket) which points to N. while (true) { if (Node *NodeInBucket = GetNextPtr(Ptr, Buckets, NumBuckets)) { // Advance pointer. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/ADT/DenseMap.h
Changes in directory llvm/include/llvm/ADT: DenseMap.h updated: 1.10 -> 1.11 --- Log message: Add a new dense hash table implementation --- Diffs of the changes: (+203 -0) DenseMap.h | 203 + 1 files changed, 203 insertions(+) Index: llvm/include/llvm/ADT/DenseMap.h diff -u /dev/null llvm/include/llvm/ADT/DenseMap.h:1.11 --- /dev/null Thu Feb 1 01:50:09 2007 +++ llvm/include/llvm/ADT/DenseMap.hThu Feb 1 01:49:59 2007 @@ -0,0 +1,203 @@ +//===- llvm/ADT/DenseMap.h - Dense probed hash table *- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by Chris Lattner and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===--===// +// +// This file defines the DenseMap class. +// +//===--===// + +#ifndef LLVM_ADT_DENSEMAP_H +#define LLVM_ADT_DENSEMAP_H + +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm { + +template +struct DenseMapKeyInfo { + //static inline T getEmptyKey(); + //static inline T getTombstoneKey(); + //static unsigned getHashValue(const T &Val); + //static bool isPod() +}; + +template +struct DenseMapKeyInfo { + static inline T* getEmptyKey() { return (T*)-1; } + static inline T* getTombstoneKey() { return (T*)-2; } + static unsigned getHashValue(const T *PtrVal) { +return (unsigned)((uintptr_t)PtrVal >> 4) ^ + (unsigned)((uintptr_t)PtrVal >> 9); + } + static bool isPod() { return true; } +}; + + +template +class DenseMap { + struct BucketT { KeyT Key; ValueT Value; }; + unsigned NumBuckets; + BucketT *Buckets; + + unsigned NumEntries; + DenseMap(const DenseMap &); // not implemented. +public: + explicit DenseMap(unsigned NumInitBuckets = 8) { +init(NumInitBuckets); + } + ~DenseMap() { +const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); +for (BucketT *P = Buckets, *E = Buckets+NumBuckets; P != E; ++P) { + if (P->Key != EmptyKey && P->Key != TombstoneKey) +P->Value.~ValueT(); + P->Key.~KeyT(); +} +delete[] (char*)Buckets; + } + + unsigned size() const { return NumEntries; } + + void clear() { +const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); +for (BucketT *P = Buckets, *E = Buckets+NumBuckets; P != E; ++P) { + if (P->Key != EmptyKey && P->Key != TombstoneKey) { +P->Key = EmptyKey; +P->Value.~ValueT(); +--NumEntries; + } +} +assert(NumEntries == 0 && "Node count imbalance!"); + } + + /// count - Return true if the specified key is in the map. + bool count(const KeyT &Val) const { +BucketT *TheBucket; +return LookupBucketFor(Val, TheBucket); + } + + ValueT &operator[](const KeyT &Val) { +BucketT *TheBucket; +if (LookupBucketFor(Val, TheBucket)) + return TheBucket->Value; + +// If the load of the hash table is more than 3/4, grow it. +if (NumEntries*4 >= NumBuckets*3) { + this->grow(); + LookupBucketFor(Val, TheBucket); +} +++NumEntries; +TheBucket->Key = Val; +new (&TheBucket->Value) ValueT(); +return TheBucket->Value; + } + +private: + unsigned getHashValue(const KeyT &Val) const { +return DenseMapKeyInfo::getHashValue(Val); + } + const KeyT getEmptyKey() const { return DenseMapKeyInfo::getEmptyKey();} + const KeyT getTombstoneKey() const { +return DenseMapKeyInfo::getTombstoneKey(); + } + + /// LookupBucketFor - Lookup the appropriate bucket for Val, returning it in + /// FoundBucket. If the bucket contains the key and a value, this returns + /// true, otherwise it returns a bucket with an empty marker or tombstone and + /// returns false. + bool LookupBucketFor(const KeyT &Val, BucketT *&FoundBucket) const { +unsigned BucketNo = getHashValue(Val); +unsigned ProbeAmt = 1; +BucketT *BucketsPtr = Buckets; + +// FoundTombstone - Keep track of whether we find a tombstone while probing. +BucketT *FoundTombstone = 0; +const KeyT EmptyKey = getEmptyKey(); +const KeyT TombstoneKey = getTombstoneKey(); +assert(Val != EmptyKey && Val != TombstoneKey && + "Empty/Tombstone value shouldn't be inserted into map!"); + +while (1) { + BucketT *ThisBucket = BucketsPtr + (BucketNo & (NumBuckets-1)); + // Found Val's bucket? If so, return it. + if (ThisBucket->Key == Val) { +FoundBucket = ThisBucket; +return true; + } + + // If we found an empty bucket, the key doesn't exist in the set. + // Insert it and return the default value. + if (ThisBucket->Key == EmptyKey) { +// If we've already seen a tombstone while probing, fill it in instead +// of the empty bucket we eventually prob