Changes in directory llvm/docs:
LangRef.html updated: 1.205 -> 1.206
---
Log message:
Preview of the shift instructions becoming Binary Operators.
---
Diffs of the changes: (+86 -87)
LangRef.html | 173 +++++++++++++++++++++++++++++------------------------------
1 files changed, 86 insertions(+), 87 deletions(-)
Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.205 llvm/docs/LangRef.html:1.206
--- llvm/docs/LangRef.html:1.205 Sun Jan 28 09:27:21 2007
+++ llvm/docs/LangRef.html Wed Jan 31 15:39:12 2007
@@ -85,6 +85,9 @@
<li><a href="#i_urem">'<tt>urem</tt>' Instruction</a></li>
<li><a href="#i_srem">'<tt>srem</tt>' Instruction</a></li>
<li><a href="#i_frem">'<tt>frem</tt>' Instruction</a></li>
+ <li><a href="#i_shl">'<tt>shl</tt>' Instruction</a></li>
+ <li><a href="#i_lshr">'<tt>lshr</tt>' Instruction</a></li>
+ <li><a href="#i_ashr">'<tt>ashr</tt>' Instruction</a></li>
</ol>
</li>
<li><a href="#bitwiseops">Bitwise Binary Operations</a>
@@ -92,9 +95,6 @@
<li><a href="#i_and">'<tt>and</tt>' Instruction</a></li>
<li><a href="#i_or">'<tt>or</tt>' Instruction</a></li>
<li><a href="#i_xor">'<tt>xor</tt>' Instruction</a></li>
- <li><a href="#i_shl">'<tt>shl</tt>' Instruction</a></li>
- <li><a href="#i_lshr">'<tt>lshr</tt>' Instruction</a></li>
- <li><a href="#i_ashr">'<tt>ashr</tt>' Instruction</a></li>
</ol>
</li>
<li><a href="#vectorops">Vector Operations</a>
@@ -1952,6 +1952,88 @@
</pre>
</div>
+<!-- _______________________________________________________________________
-->
+<div class="doc_subsubsection"> <a name="i_shl">'<tt>shl</tt>'
+Instruction</a> </div>
+<div class="doc_text">
+<h5>Syntax:</h5>
+<pre> <result> = shl <ty> <var1>, <var2> <i>;
yields {ty}:result</i>
+</pre>
+<h5>Overview:</h5>
+<p>The '<tt>shl</tt>' instruction returns the first operand shifted to
+the left a specified number of bits.</p>
+<h5>Arguments:</h5>
+<p>Both arguments to the '<tt>shl</tt>' instruction must be the same <a
+ href="#t_integer">integer</a> type.</p>
+<h5>Semantics:</h5>
+<p>The value produced is <tt>var1</tt> * 2<sup><tt>var2</tt></sup>.</p>
+<h5>Example:</h5><pre>
+ <result> = shl i32 4, %var <i>; yields {i32}: 4 << %var</i>
+ <result> = shl i32 4, 2 <i>; yields {i32}: 16</i>
+ <result> = shl i32 1, 10 <i>; yields {i32}: 1024</i>
+</pre>
+</div>
+<!-- _______________________________________________________________________
-->
+<div class="doc_subsubsection"> <a name="i_lshr">'<tt>lshr</tt>'
+Instruction</a> </div>
+<div class="doc_text">
+<h5>Syntax:</h5>
+<pre> <result> = lshr <ty> <var1>, <var2> <i>;
yields {ty}:result</i>
+</pre>
+
+<h5>Overview:</h5>
+<p>The '<tt>lshr</tt>' instruction (logical shift right) returns the first
+operand shifted to the right a specified number of bits.</p>
+
+<h5>Arguments:</h5>
+<p>Both arguments to the '<tt>lshr</tt>' instruction must be the same
+<a href="#t_integer">integer</a> type.</p>
+
+<h5>Semantics:</h5>
+<p>This instruction always performs a logical shift right operation. The most
+significant bits of the result will be filled with zero bits after the
+shift.</p>
+
+<h5>Example:</h5>
+<pre>
+ <result> = lshr i32 4, 1 <i>; yields {i32}:result = 2</i>
+ <result> = lshr i32 4, 2 <i>; yields {i32}:result = 1</i>
+ <result> = lshr i8 4, 3 <i>; yields {i8}:result = 0</i>
+ <result> = lshr i8 -2, 1 <i>; yields {i8}:result = 0x7FFFFFFF </i>
+</pre>
+</div>
+
+<!-- =======================================================================
-->
+<div class="doc_subsubsection"> <a name="i_ashr">'<tt>ashr</tt>'
+Instruction</a> </div>
+<div class="doc_text">
+
+<h5>Syntax:</h5>
+<pre> <result> = ashr <ty> <var1>, <var2> <i>;
yields {ty}:result</i>
+</pre>
+
+<h5>Overview:</h5>
+<p>The '<tt>ashr</tt>' instruction (arithmetic shift right) returns the first
+operand shifted to the right a specified number of bits.</p>
+
+<h5>Arguments:</h5>
+<p>Both arguments to the '<tt>ashr</tt>' instruction must be the same
+<a href="#t_integer">integer</a> type.</p>
+
+<h5>Semantics:</h5>
+<p>This instruction always performs an arithmetic shift right operation,
+The most significant bits of the result will be filled with the sign bit
+of <tt>var1</tt>.</p>
+
+<h5>Example:</h5>
+<pre>
+ <result> = ashr i32 4, 1 <i>; yields {i32}:result = 2</i>
+ <result> = ashr i32 4, 2 <i>; yields {i32}:result = 1</i>
+ <result> = ashr i8 4, 3 <i>; yields {i8}:result = 0</i>
+ <result> = ashr i8 -2, 1 <i>; yields {i8}:result = -1</i>
+</pre>
+</div>
+
<!-- =======================================================================
-->
<div class="doc_subsection"> <a name="bitwiseops">Bitwise Binary
Operations</a> </div>
@@ -2127,89 +2209,6 @@
<result> = xor i32 %V, -1 <i>; yields {i32}:result = ~%V</i>
</pre>
</div>
-<!-- _______________________________________________________________________
-->
-<div class="doc_subsubsection"> <a name="i_shl">'<tt>shl</tt>'
-Instruction</a> </div>
-<div class="doc_text">
-<h5>Syntax:</h5>
-<pre> <result> = shl <ty> <var1>, i8 <var2> <i>;
yields {ty}:result</i>
-</pre>
-<h5>Overview:</h5>
-<p>The '<tt>shl</tt>' instruction returns the first operand shifted to
-the left a specified number of bits.</p>
-<h5>Arguments:</h5>
-<p>The first argument to the '<tt>shl</tt>' instruction must be an <a
- href="#t_integer">integer</a> type. The second argument must be an
'<tt>i8</tt>'
-type.</p>
-<h5>Semantics:</h5>
-<p>The value produced is <tt>var1</tt> * 2<sup><tt>var2</tt></sup>.</p>
-<h5>Example:</h5>
-<pre> <result> = shl i32 4, i8 %var <i>; yields {i32}:result = 4
<< %var</i>
- <result> = shl i32 4, i8 2 <i>; yields {i32}:result = 16</i>
- <result> = shl i32 1, i8 10 <i>; yields {i32}:result = 1024</i>
-</pre>
-</div>
-<!-- _______________________________________________________________________
-->
-<div class="doc_subsubsection"> <a name="i_lshr">'<tt>lshr</tt>'
-Instruction</a> </div>
-<div class="doc_text">
-<h5>Syntax:</h5>
-<pre> <result> = lshr <ty> <var1>, i8 <var2> <i>;
yields {ty}:result</i>
-</pre>
-
-<h5>Overview:</h5>
-<p>The '<tt>lshr</tt>' instruction (logical shift right) returns the first
-operand shifted to the right a specified number of bits.</p>
-
-<h5>Arguments:</h5>
-<p>The first argument to the '<tt>lshr</tt>' instruction must be an <a
- href="#t_integer">integer</a> type. The second argument must be an
'<tt>i8</tt>' type.</p>
-
-<h5>Semantics:</h5>
-<p>This instruction always performs a logical shift right operation. The
-<tt>var2</tt> most significant bits will be filled with zero bits after the
-shift.</p>
-
-<h5>Example:</h5>
-<pre>
- <result> = lshr i32 4, i8 1 <i>; yields {i32}:result = 2</i>
- <result> = lshr i32 4, i8 2 <i>; yields {i32}:result = 1</i>
- <result> = lshr i8 4, i8 3 <i>; yields {i8 }:result = 0</i>
- <result> = lshr i8 -2, i8 1 <i>; yields {i8 }:result = 0x7FFFFFFF </i>
-</pre>
-</div>
-
-<!-- =======================================================================
-->
-<div class="doc_subsubsection"> <a name="i_ashr">'<tt>ashr</tt>'
-Instruction</a> </div>
-<div class="doc_text">
-
-<h5>Syntax:</h5>
-<pre> <result> = ashr <ty> <var1>, i8 <var2> <i>;
yields {ty}:result</i>
-</pre>
-
-<h5>Overview:</h5>
-<p>The '<tt>ashr</tt>' instruction (arithmetic shift right) returns the first
-operand shifted to the right a specified number of bits.</p>
-
-<h5>Arguments:</h5>
-<p>The first argument to the '<tt>ashr</tt>' instruction must be an
-<a href="#t_integer">integer</a> type. The second argument must be an
-'<tt>i8</tt>' type.</p>
-
-<h5>Semantics:</h5>
-<p>This instruction always performs an arithmetic shift right operation,
-regardless of whether the arguments are signed or not. The <tt>var2</tt> most
-significant bits will be filled with the sign bit of <tt>var1</tt>.</p>
-
-<h5>Example:</h5>
-<pre>
- <result> = ashr i32 4, i8 1 <i>; yields {i32}:result = 2</i>
- <result> = ashr i32 4, i8 2 <i>; yields {i32}:result = 1</i>
- <result> = ashr i8 4, i8 3 <i>; yields {i8}:result = 0</i>
- <result> = ashr i8 -2, i8 1 <i>; yields {i8 }:result = -1</i>
-</pre>
-</div>
<!-- =======================================================================
-->
<div class="doc_subsection">
@@ -4508,7 +4507,7 @@
<a href="mailto:[EMAIL PROTECTED]">Chris Lattner</a><br>
<a href="http://llvm.org";>The LLVM Compiler Infrastructure</a><br>
- Last modified: $Date: 2007/01/28 15:27:21 $
+ Last modified: $Date: 2007/01/31 21:39:12 $
</address>
</body>
</html>
_______________________________________________
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
