[llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h SSARegMap.h ScheduleDAG.h

[Chris Lattner]

Changes in directory llvm/include/llvm/CodeGen:

LiveIntervalAnalysis.h updated: 1.66 -> 1.67
SSARegMap.h updated: 1.12 -> 1.13
ScheduleDAG.h updated: 1.34 -> 1.35
---
Log message:

rename DenseMap to IndexedMap.



---
Diffs of the changes:  (+6 -7)

 LiveIntervalAnalysis.h |    4 ++--
 SSARegMap.h            |    4 ++--
 ScheduleDAG.h          |    5 ++---
 3 files changed, 6 insertions(+), 7 deletions(-)


Index: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h
diff -u llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.66 
llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.67
--- llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.66       Sat Dec 16 
23:15:12 2006
+++ llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h    Wed Jan 31 23:32:05 2007
@@ -20,9 +20,9 @@
 #ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
 #define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
 
-#include "llvm/ADT/DenseMap.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/LiveInterval.h"
+#include "llvm/ADT/IndexedMap.h"
 
 namespace llvm {
 
@@ -51,7 +51,7 @@
     typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
     Reg2IntervalMap r2iMap_;
 
-    typedef DenseMap<unsigned> Reg2RegMap;
+    typedef IndexedMap<unsigned> Reg2RegMap;
     Reg2RegMap r2rMap_;
 
     std::vector<bool> allocatableRegs_;


Index: llvm/include/llvm/CodeGen/SSARegMap.h
diff -u llvm/include/llvm/CodeGen/SSARegMap.h:1.12 
llvm/include/llvm/CodeGen/SSARegMap.h:1.13
--- llvm/include/llvm/CodeGen/SSARegMap.h:1.12  Wed Jan  5 10:27:34 2005
+++ llvm/include/llvm/CodeGen/SSARegMap.h       Wed Jan 31 23:32:05 2007
@@ -18,14 +18,14 @@
 #define LLVM_CODEGEN_SSAREGMAP_H
 
 #include "llvm/Target/MRegisterInfo.h"
-#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/IndexedMap.h"
 
 namespace llvm {
 
 class TargetRegisterClass;
 
 class SSARegMap {
-  DenseMap<const TargetRegisterClass*, VirtReg2IndexFunctor> RegClassMap;
+  IndexedMap<const TargetRegisterClass*, VirtReg2IndexFunctor> RegClassMap;
   unsigned NextRegNum;
 
  public:


Index: llvm/include/llvm/CodeGen/ScheduleDAG.h
diff -u llvm/include/llvm/CodeGen/ScheduleDAG.h:1.34 
llvm/include/llvm/CodeGen/ScheduleDAG.h:1.35
--- llvm/include/llvm/CodeGen/ScheduleDAG.h:1.34        Fri Jan 26 15:22:28 2007
+++ llvm/include/llvm/CodeGen/ScheduleDAG.h     Wed Jan 31 23:32:05 2007
@@ -16,8 +16,7 @@
 #define LLVM_CODEGEN_SCHEDULEDAG_H
 
 #include "llvm/CodeGen/SelectionDAG.h"
-
-#include <set>
+#include "llvm/ADT/SmallSet.h"
 
 namespace llvm {
   struct InstrStage;
@@ -183,7 +182,7 @@
                                           // represent noop instructions.
     std::map<SDNode*, SUnit*> SUnitMap;   // SDNode to SUnit mapping (n -> 1).
     std::vector<SUnit> SUnits;            // The scheduling units.
-    std::set<SDNode*> CommuteSet;         // Nodes the should be commuted.
+    SmallSet<SDNode*, 16> CommuteSet;     // Nodes the should be commuted.
 
     ScheduleDAG(SelectionDAG &dag, MachineBasicBlock *bb,
                 const TargetMachine &tm)



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