[gcc(refs/users/meissner/heads/work222)] Move clone attribute support to use CPU options.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:4150b46f86fabbfb4be3f1e66d819ca0e5b144ff

commit 4150b46f86fabbfb4be3f1e66d819ca0e5b144ff
Author: Michael Meissner 
Date:   Sun Sep 21 03:24:00 2025 -0400

Move clone attribute support to use CPU options.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000.cc (struct clone_map): Use CPU options 
instead of
ISA masks for setting up clone attributes.
(rs6000_clone_map): Likewise.
(rs6000_clone_priority): Likewise.

Diff:
---
 gcc/config/rs6000/rs6000.cc | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index a958d03b9236..93ed508e02da 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -250,17 +250,17 @@ enum {
 
 /* Map compiler ISA bits into HWCAP names.  */
 struct clone_map {
-  HOST_WIDE_INT isa_mask;  /* rs6000_isa mask */
+  HOST_WIDE_INT cpu_option;/* CPU options mask */
   const char *name;/* name to use in __builtin_cpu_supports.  */
 };
 
 static const struct clone_map rs6000_clone_map[CLONE_MAX] = {
   { 0, "" },   /* Default options.  */
-  { OPTION_MASK_CMPB,  "arch_2_05" },  /* ISA 2.05 (power6).  */
-  { OPTION_MASK_POPCNTD,   "arch_2_06" },  /* ISA 2.06 (power7).  */
-  { OPTION_MASK_P8_VECTOR, "arch_2_07" },  /* ISA 2.07 (power8).  */
-  { OPTION_MASK_P9_VECTOR, "arch_3_00" },  /* ISA 3.0 (power9).  */
-  { OPTION_MASK_POWER10,   "arch_3_1" },   /* ISA 3.1 (power10).  */
+  { CPU_OPTION_POWER6_MASK,"arch_2_05" },  /* ISA 2.05 (power6).  */
+  { CPU_OPTION_POWER7_MASK,"arch_2_06" },  /* ISA 2.06 (power7).  */
+  { CPU_OPTION_POWER8_MASK,"arch_2_07" },  /* ISA 2.07 (power8).  */
+  { CPU_OPTION_POWER9_MASK,"arch_3_00" },  /* ISA 3.0 (power9).  */
+  { CPU_OPTION_POWER10_MASK,   "arch_3_1" },   /* ISA 3.1 (power10).  */
 };
 
 
@@ -25337,7 +25337,7 @@ static int
 rs6000_clone_priority (tree fndecl)
 {
   tree fn_opts = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
-  HOST_WIDE_INT isa_masks;
+  HOST_WIDE_INT cpu_option;
   int ret = CLONE_DEFAULT;
   tree attrs = lookup_attribute ("target", DECL_ATTRIBUTES (fndecl));
   const char *attrs_str = NULL;
@@ -25353,12 +25353,12 @@ rs6000_clone_priority (tree fndecl)
fn_opts = target_option_default_node;
 
   if (!fn_opts || !TREE_TARGET_OPTION (fn_opts))
-   isa_masks = rs6000_isa_flags;
+   cpu_option = rs6000_cpu_option_flags;
   else
-   isa_masks = TREE_TARGET_OPTION (fn_opts)->x_rs6000_isa_flags;
+   cpu_option = TREE_TARGET_OPTION (fn_opts)->x_rs6000_cpu_option_flags;
 
   for (ret = CLONE_MAX - 1; ret != 0; ret--)
-   if ((rs6000_clone_map[ret].isa_mask & isa_masks) != 0)
+   if ((rs6000_clone_map[ret].cpu_option & cpu_option) != 0)
  break;
 }

[gcc(refs/users/meissner/heads/work222)] Add -mcpu=future support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:1654aae88d5d2cd8e8c26e8aafb6d9601b45c402

commit 1654aae88d5d2cd8e8c26e8aafb6d9601b45c402
Author: Michael Meissner 
Date:   Sun Sep 21 03:49:38 2025 -0400

Add -mcpu=future support.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/aix71.h (ASM_CPU_SPEC): If -mcpu=future, pass 
-mfuture
to the assembler.
* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/rs6000.c.cc (rs6000_target_modify_macros): If
-mcpu=future define _ARCH_FUTURE.
* config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): New macro.
(CPU_OPTION_FUTURE_MASK): Add support for -mcpu=future.
(CPU_OPTION_FUTURE_ALL_MASKS): Likewise.
(future cpu): Likewise.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/rs6000.cc (power10_cost): Update comment.
(rs6000_machine_from_flags): Add support for -mcpu=future.
(rs6000_cpu_opt_masks): Likewise.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): If -mcpu=future, pass 
-mfuture
to the assembler.
(TARGET_FUTURE): New macro.

gcc/testsuite/

* gcc.target/powerpc/future-1.c: New test.
* gcc.target/powerpc/future-2.c: Likewise.

Diff:
---
 gcc/config/rs6000/aix71.h   |  1 +
 gcc/config/rs6000/aix72.h   |  1 +
 gcc/config/rs6000/aix73.h   |  1 +
 gcc/config/rs6000/rs6000-c.cc   |  2 ++
 gcc/config/rs6000/rs6000-cpus.def   | 14 ++
 gcc/config/rs6000/rs6000-tables.opt | 11 +++
 gcc/config/rs6000/rs6000.cc |  5 -
 gcc/config/rs6000/rs6000.h  |  6 ++
 gcc/testsuite/gcc.target/powerpc/future-1.c | 13 +
 gcc/testsuite/gcc.target/powerpc/future-2.c | 24 
 10 files changed, 73 insertions(+), 5 deletions(-)

diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 5423252f7688..7c437be201ec 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index fdddc4327963..bab23491debc 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index 37c2c081c34a..bcf236665604 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index d5e1e3c046a6..70e6d4b1e6db 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -440,6 +440,8 @@ rs6000_target_modify_macros (bool define_p,
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
   if ((cpu_option & CPU_OPTION_POWER11_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
+  if ((cpu_option & CPU_OPTION_FUTURE_MASK) != 0)
+rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE");
   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
 rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
   if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 42bb0f7ffee9..f88c155ceeeb 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -125,6 +125,10 @@
 #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \
  | OPTION_MASK_POWER11)
 
+/* At the moment, do not define any addition -m arguments for -mcpu=future
+   support.  */
+#define FUTURE_MASKS_SERVERPOWER11_MASKS_SERVER
+
 /* Flags that need to be turned off if -mno-vsx.  */
 #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX\
 | OPTION_MASK_FLOAT128_KEYWORD \
@@ -201,6 +205,7 @@
 #define CPU_OPTION_POWER9_MASK HOST_WIDE_INT_UC (0x0008)
 #define CPU_OPTION_POWER10_MASKHOST_WIDE_INT_UC (0x0010)
 #

[gcc(refs/users/meissner/heads/work222)] Remove internal -mpower11 support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:e2a58002c623fb7b8a0ff959b931bd601b9e3ab7

commit e2a58002c623fb7b8a0ff959b931bd601b9e3ab7
Author: Michael Meissner 
Date:   Sun Sep 21 04:03:34 2025 -0400

Remove internal -mpower11 support.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000-cpus.def (POWER11_MASKS_SERVER): Drop 
-mpower11
ISA option.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.cc (rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.h (TARGET_POWER11): New macro.
* config/rs6000/rs6000.opt (-mpower11): Drop power11 from being an 
ISA
option.

Diff:
---
 gcc/config/rs6000/rs6000-cpus.def | 4 +---
 gcc/config/rs6000/rs6000.cc   | 1 -
 gcc/config/rs6000/rs6000.h| 2 ++
 gcc/config/rs6000/rs6000.opt  | 5 +
 4 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index f88c155ceeeb..8d008265db19 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -122,8 +122,7 @@
 | OPTION_MASK_POWER10  \
 | OTHER_POWER10_MASKS)
 
-#define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \
- | OPTION_MASK_POWER11)
+#define POWER11_MASKS_SERVER   ISA_3_1_MASKS_SERVER
 
 /* At the moment, do not define any addition -m arguments for -mcpu=future
support.  */
@@ -166,7 +165,6 @@
 | OPTION_MASK_FLOAT128_KEYWORD \
 | OPTION_MASK_FPRND\
 | OPTION_MASK_POWER10  \
-| OPTION_MASK_POWER11  \
 | OPTION_MASK_P10_FUSION   \
 | OPTION_MASK_HTM  \
 | OPTION_MASK_ISEL \
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 76a0f7d3978c..5daca441c71a 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -24482,7 +24482,6 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128-hardware",   OPTION_MASK_FLOAT128_HW,false, true  },
   { "fprnd",   OPTION_MASK_FPRND,  false, true  },
   { "power10", OPTION_MASK_POWER10,false, true  },
-  { "power11", OPTION_MASK_POWER11,false, false },
   { "hard-dfp",OPTION_MASK_DFP,false, 
true  },
   { "htm", OPTION_MASK_HTM,false, true  },
   { "isel",OPTION_MASK_ISEL,   false, true  },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index bcee3e025822..78c674b1e05d 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -558,6 +558,8 @@ extern int rs6000_vector_align[];
 
 /* ISA bits that are set via -mcpu=, but that do not have an associated
switch with the option.  */
+#define TARGET_POWER11 \
+  ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
 #define TARGET_FUTURE  \
   ((rs6000_cpu_option_flags & CPU_OPTION_FUTURE_MASK) != 0)
 
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 7c9602e68211..fb323beff9b4 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -598,11 +598,8 @@ Target Undocumented Var(rs6000_speculate_indirect_jumps) 
Init(1) Save
 mpower10
 Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
 
-;; Users should not use -mpower11, but we need to use a bit to identify when
-;; the user changes the default cpu via  #pragma GCC target("cpu=power11")
-;; and then resets it later.
 mpower11
-Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved
+Target Undocumented WarnRemoved
 
 mprefixed
 Target Mask(PREFIXED) Var(rs6000_isa_flags)

[gcc(refs/users/meissner/heads/work222)] Move defining _ARCH_PWRx to use CPU options.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:05209590f437ad460f8fe17ea18e414fa7a2451d

commit 05209590f437ad460f8fe17ea18e414fa7a2451d
Author: Michael Meissner 
Date:   Sun Sep 21 03:36:23 2025 -0400

Move defining _ARCH_PWRx to use CPU options.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use CPU
options to define _ARCH_PWR11, _ARCH_PWR11, _ARCH_PWR10, _ARCH_PWR9,
_ARCH_PWR8, _ARCH_PWR7, and _ARCH_PWR6.

Diff:
---
 gcc/config/rs6000/rs6000-c.cc | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 823531d5e5a7..d5e1e3c046a6 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -428,17 +428,17 @@ rs6000_target_modify_macros (bool define_p,
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5");
   if ((flags & OPTION_MASK_FPRND) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5X");
-  if ((flags & OPTION_MASK_CMPB) != 0)
+  if ((cpu_option & CPU_OPTION_POWER6_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6");
-  if ((flags & OPTION_MASK_POPCNTD) != 0)
+  if ((cpu_option & CPU_OPTION_POWER7_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
-  if ((flags & OPTION_MASK_POWER8) != 0)
+  if ((cpu_option & CPU_OPTION_POWER8_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8");
-  if ((flags & OPTION_MASK_MODULO) != 0)
+  if ((cpu_option & CPU_OPTION_POWER9_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
-  if ((flags & OPTION_MASK_POWER10) != 0)
+  if ((cpu_option & CPU_OPTION_POWER10_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
-  if ((flags & OPTION_MASK_POWER11) != 0)
+  if ((cpu_option & CPU_OPTION_POWER11_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
 rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");

[gcc(refs/users/meissner/heads/work222)] Revert changes

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:aac28524d40fe9a19a49432ddc5e5fd763cd1cf2

commit aac28524d40fe9a19a49432ddc5e5fd763cd1cf2
Author: Michael Meissner 
Date:   Sun Sep 21 03:48:29 2025 -0400

Revert changes

Diff:
---
 gcc/config/rs6000/aix71.h   |  1 -
 gcc/config/rs6000/aix72.h   |  1 -
 gcc/config/rs6000/aix73.h   |  1 -
 gcc/config/rs6000/rs6000-c.cc   |  2 --
 gcc/config/rs6000/rs6000-cpus.def   | 14 --
 gcc/config/rs6000/rs6000-tables.opt | 11 ---
 gcc/config/rs6000/rs6000.cc |  5 +
 gcc/config/rs6000/rs6000.h  |  6 --
 gcc/testsuite/gcc.target/powerpc/future-1.c | 13 -
 gcc/testsuite/gcc.target/powerpc/future-2.c | 24 
 10 files changed, 5 insertions(+), 73 deletions(-)

diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 7c437be201ec..5423252f7688 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,7 +79,6 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
-  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index bab23491debc..fdddc4327963 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,7 +79,6 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
-  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index bcf236665604..37c2c081c34a 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,7 +79,6 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
-  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 70e6d4b1e6db..d5e1e3c046a6 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -440,8 +440,6 @@ rs6000_target_modify_macros (bool define_p,
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
   if ((cpu_option & CPU_OPTION_POWER11_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
-  if ((cpu_option & CPU_OPTION_FUTURE_MASK) != 0)
-rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE");
   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
 rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
   if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index e72139188707..42bb0f7ffee9 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -125,10 +125,6 @@
 #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \
  | OPTION_MASK_POWER11)
 
-/* At the moment, do not define any addition -m arguments for -mcpu=future
-   support.  */
-#define FUTURE_MASKS_SERVER  POWER11_MASKS_SERVER
-
 /* Flags that need to be turned off if -mno-vsx.  */
 #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX\
 | OPTION_MASK_FLOAT128_KEYWORD \
@@ -205,7 +201,6 @@
 #define CPU_OPTION_POWER9_MASK HOST_WIDE_INT_UC (0x0008)
 #define CPU_OPTION_POWER10_MASKHOST_WIDE_INT_UC (0x0010)
 #define CPU_OPTION_POWER11_MASKHOST_WIDE_INT_UC (0x0020)
-#define CPU_OPTION_FUTURE_MASK HOST_WIDE_INT_UC (0x0040)
 
 /* Processor ISA mask bits that are set for each processor.  */
 #define CPU_OPTION_POWER7_ALL_MASKSCPU_OPTION_POWER7_MASK
@@ -222,9 +217,6 @@
 #define CPU_OPTION_POWER11_ALL_MASKS   (CPU_OPTION_POWER11_MASK\
 | CPU_OPTION_POWER10_ALL_MASKS)
 
-#define CPU_OPTION_FUTURE_ALL_MASKS(CPU_OPTION_FUTURE_MASK \
-| CPU_OPTION_POWER11_ALL_MASKS)
-
 #endif /* #ifndef CPU_OPTION_POWER7_MASK.  */
 #endif /* #ifndef ISA_2_1_MASKS.  */
 
@@ -337,12 +329,6 @@ RS6000_CPU_OPTION ("power10", PROCESSOR_POWER10,
 RS6000_CPU_OPTION ("power11", PROCESSOR_POWER11,
   MASK_POWERPC64 | POWER11_MASKS_SERVER,
   CPU_OPTION_POWER11_ALL_MASKS)
-/* At the present time, do not define a new processor for -mcpu=future.  At
-   some point, it may be provided, but for now, treat the cpu as being tuned
-   the same as a power11.  */
-RS6000_CPU_OPTION ("future", PROCESSOR_POWER11,
-  MASK_POWERPC64 | FUTURE_MASKS_SERVER,
-

[gcc(refs/users/meissner/heads/work222)] Add cpu option flag bits

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:feaaa86243092aae348cf10f561d3f6dda48e7e0

commit feaaa86243092aae348cf10f561d3f6dda48e7e0
Author: Michael Meissner 
Date:   Sun Sep 21 03:14:47 2025 -0400

Add cpu option flag bits

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/aix71.h (RS6000_CPU_OPTION): Define and undefine 
macro.
* config/rs6000/aix72.h (RS6000_CPU_OPTION): Likewise.
* config/rs6000/aix73.h (RS6000_CPU_OPTION): Likewise.
* config/rs6000/default64.h (RS6000_CPU_OPTION): Likewise.
* config/rs6000/driver-rs6000.cc (RS6000_CPU_OPTION): Likewise.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add CPU
options parameter.
(rs6000_cpu_cpp_builtins): Likewise.
* config/rs6000/rs6000-cpus.def (toplevel): Add comment describing 
ISA
mask bits and CPU option mask bits.
(CPU_OPTION_POWER6_MASK): New macro.
(CPU_OPTION_POWER7_MASK): Likewise.
(CPU_OPTION_POWER8_MASK): Likewise.
(CPU_OPTION_POWER9_MASK): Likewise.
(CPU_OPTION_POWER10_MASK): Likewise.
(CPU_OPTION_POWER11_MASK): Likewise.
(CPU_OPTION_POWER6_ALL_MASKS): Likewise.
(CPU_OPTION_POWER7_ALL_MASKS): Likewise.
(CPU_OPTION_POWER8_ALL_MASKS): Likewise.
(CPU_OPTION_POWER9_ALL_MASKS): Likewise.
(CPU_OPTION_POWER10_ALL_MASKS): Likewise.
(CPU_OPTION_POWER11_ALL_MASKS): Likewise.
(power6 cpu): Switch to use RS6000_CPU_OPTION in order to set the 
CPU
option mask bits.
(power6x cpu): Likewise.
(power7 cpu): Likewise.
(power8): Likewise.
(power9): Likewise.
(power10): Likewise.
(power11): Likewise.
* config/rs6000/rs6000-protos.h (rs6000_target_modify_macros): Add 
CPU
option argument.
(rs6000_target_modify_macros_ptr): Likewise.
* config/rs6000/rs6000.cc (rs6000_target_modify_macros_ptr): 
Likewise.
(rs6000_print_isa_options): Likewise.
(struct rs6000_ptt): Likewise.
(RS6000_CPU): Likewise.
(RS6000_CPU_OPTION): Likewise.
(DEBUG_FMT_WX): Likewise.
(rs6000_debug_reg_global): Likewise.
(rs6000_option_override_internal): Likewise.
(struct rs6000_cpu_opt_mask): Likewise.
(rs6000_cpu_opt_masks): Likewise.
(rs6000_pragma_target_parse): Likewise.
(rs6000_function_specific_save): Likewise.
(rs6000_function_specific_restore): Likewise.
(rs6000_function_specific_print): Likewise.
(rs6000_print_options_internal): Likewise.
* config/rs6000/rs6000.opt (rs6000_cpu_option_flags): New target
variable.
(x_rs6000_cpu_option_flags): Likewise.

Diff:
---
 gcc/config/rs6000/aix71.h  |   2 +
 gcc/config/rs6000/aix72.h  |   2 +
 gcc/config/rs6000/aix73.h  |   2 +
 gcc/config/rs6000/default64.h  |   2 +
 gcc/config/rs6000/driver-rs6000.cc |   2 +
 gcc/config/rs6000/rs6000-c.cc  |  12 ++--
 gcc/config/rs6000/rs6000-cpus.def  | 100 +---
 gcc/config/rs6000/rs6000-protos.h  |   5 +-
 gcc/config/rs6000/rs6000.cc| 129 -
 gcc/config/rs6000/rs6000.opt   |   9 +++
 10 files changed, 220 insertions(+), 45 deletions(-)

diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 2b21dd7cd1e0..5423252f7688 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -133,8 +133,10 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
+#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
+#undef RS6000_CPU_OPTION
 
 #undef  TARGET_DEFAULT
 #ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index 53c0bde5ad4a..fdddc4327963 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -134,8 +134,10 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
+#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
+#undef RS6000_CPU_OPTION
 
 #undef  TARGET_DEFAULT
 #ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index c7639368a264..37c2c081c34a 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -135,8 +135,10 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
+#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6

[gcc(refs/users/meissner/heads/work222)] Revert changes

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:0566cd556277b1700cf88e8b9471b731583c8321

commit 0566cd556277b1700cf88e8b9471b731583c8321
Author: Michael Meissner 
Date:   Sun Sep 21 02:56:24 2025 -0400

Revert changes

Diff:
---
 gcc/ChangeLog.meissner  | 107 +-
 gcc/config/rs6000/aix71.h   |   3 -
 gcc/config/rs6000/aix72.h   |   3 -
 gcc/config/rs6000/aix73.h   |   3 -
 gcc/config/rs6000/default64.h   |   2 -
 gcc/config/rs6000/driver-rs6000.cc  |   2 -
 gcc/config/rs6000/rs6000-c.cc   |  16 +---
 gcc/config/rs6000/rs6000-cpus.def   | 117 +++-
 gcc/config/rs6000/rs6000-protos.h   |   5 +-
 gcc/config/rs6000/rs6000-tables.opt |  11 +--
 gcc/config/rs6000/rs6000.cc | 137 +++-
 gcc/config/rs6000/rs6000.h  |   8 --
 gcc/config/rs6000/rs6000.opt|  14 +--
 gcc/testsuite/gcc.target/powerpc/future-1.c |  13 ---
 gcc/testsuite/gcc.target/powerpc/future-2.c |  24 -
 15 files changed, 63 insertions(+), 402 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 10c5fde68a0f..ff8d31ce9ed8 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,107 +1,6 @@
- Branch work222, patch #3 
-
-Remove internal -mpower11 support.
-
-2025-09-21  Michael Meissner  
-
-gcc/
-
-   * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Move power11
-   support to use CPU options.
-   * config/rs6000/rs6000-cpus.def (POWER11_MASKS_SERVER): Likewise.
-   (POWERPC_MASKS): Likewise.
-   * config/rs6000/rs6000.cc (rs6000_machine_from_flags): Likewise.
-   (rs6000_opt_masks): Likewise.
-   * config/rs6000/rs6000.h (TARGET_POWER11): New macro.
-   * config/rs6000/rs6000.opt (-mpower11): Drop power11 from being an ISA
-   option.
-
- Branch work222, patch #2 
-
-Add -mcpu=future support.
-
-2025-09-21  Michael Meissner  
-
-gcc/
-
-   * config/rs6000/aix71.h (ASM_CPU_SPEC): If -mcpu=future, pass -mfuture
-   to the assembler.
-   * config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
-   * config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
-   * config/rs6000/rs6000.c.cc (rs6000_target_modify_macros): If
-   -mcpu=future define _ARCH_FUTURE.
-   * config/rs6000/rs6000-cpus.def (CPU_OPTION_FUTURE_MASK): Add support
-   for -mcpu=future.
-   (CPU_OPTION_FUTURE_ALL_MASKS): Likewise.
-   (future cpu): Likewise.
-   * config/rs6000/rs6000-tables.opt: Regenerate.
-   * config/rs6000/rs6000.cc (power10_cost): Update comment.
-   (rs6000_machine_from_flags): Add support for -mcpu=future.
-   (rs6000_cpu_opt_masks): Likewise.
-   * config/rs6000/rs6000.h (ASM_CPU_SPEC): If -mcpu=future, pass -mfuture
-   to the assembler.
-   (TARGET_FUTURE): New macro.
-
-gcc/testsuite/
-
-   * gcc.target/powerpc/future-1.c: New test.
-   * gcc.target/powerpc/future-2.c: Likewise.
-
- Branch work222, patch #1 
-
-Add cpu option flag bits
-
-2025-09-21  Michael Meissner  
-
-gcc/
-
-   * config/rs6000/aix71.h (RS6000_CPU_OPTION): Define and undefine macro.
-   * config/rs6000/aix72.h (RS6000_CPU_OPTION): Likewise.
-   * config/rs6000/aix73.h (RS6000_CPU_OPTION): Likewise.
-   * config/rs6000/default64.h (RS6000_CPU_OPTION): Likewise.
-   * config/rs6000/driver-rs6000.cc (RS6000_CPU_OPTION): Likewise.
-   * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add CPU
-   options parameter.
-   (rs6000_cpu_cpp_builtins): Likewise.
-   * config/rs6000/rs6000-cpus.def (toplevel): Add comment describing ISA
-   mask bits and CPU option mask bits.
-   (CPU_OPTION_POWER7_MASK): New macro.
-   (CPU_OPTION_POWER8_MASK): Likewise.
-   (CPU_OPTION_POWER9_MASK): Likewise.
-   (CPU_OPTION_POWER10_MASK): Likewise.
-   (CPU_OPTION_POWER11_MASK): Likewise.
-   (CPU_OPTION_POWER7_ALL_MASKS): Likewise.
-   (CPU_OPTION_POWER8_ALL_MASKS): Likewise.
-   (CPU_OPTION_POWER9_ALL_MASKS): Likewise.
-   (CPU_OPTION_POWER10_ALL_MASKS): Likewise.
-   (CPU_OPTION_POWER11_ALL_MASKS): Likewise.
-   (power7 cpu): Switch to use RS6000_CPU_OPTION in order to set the CPU
-   option mask bits.
-   (power8): Likewise.
-   (power9): Likewise.
-   (power10): Likewise.
-   (power11): Likewise.
-   * config/rs6000/rs6000-protos.h (rs6000_target_modify_macros): Add CPU
-   option argument.
-   (rs6000_target_modify_macros_ptr): Likewise.
-   * config/rs6000/rs6000.cc (rs6000_target_modify_macros_ptr): Likewise.
-   (rs6000_print_isa_options): Likewise.
-   (struct rs6000_ptt): Likewise.
-   (RS6000_CPU): Likewise.
-   (RS6000_CPU_OPTION): Likewise.
-   (DEBUG_FMT_WX): Likewise.
-   (

[gcc(refs/users/meissner/heads/work222)] Add -mcpu=future support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:e1de46086793517dcfa0d0c407eb5e1405b6da1b

commit e1de46086793517dcfa0d0c407eb5e1405b6da1b
Author: Michael Meissner 
Date:   Sun Sep 21 03:45:15 2025 -0400

Add -mcpu=future support.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/aix71.h (ASM_CPU_SPEC): If -mcpu=future, pass 
-mfuture
to the assembler.
* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/rs6000.c.cc (rs6000_target_modify_macros): If
-mcpu=future define _ARCH_FUTURE.
* config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): New macro.
(CPU_OPTION_FUTURE_MASK): Add support for -mcpu=future.
(CPU_OPTION_FUTURE_ALL_MASKS): Likewise.
(future cpu): Likewise.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/rs6000.cc (power10_cost): Update comment.
(rs6000_machine_from_flags): Add support for -mcpu=future.
(rs6000_cpu_opt_masks): Likewise.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): If -mcpu=future, pass 
-mfuture
to the assembler.
(TARGET_FUTURE): New macro.

gcc/testsuite/

* gcc.target/powerpc/future-1.c: New test.
* gcc.target/powerpc/future-2.c: Likewise.

Diff:
---
 gcc/config/rs6000/aix71.h   |  1 +
 gcc/config/rs6000/aix72.h   |  1 +
 gcc/config/rs6000/aix73.h   |  1 +
 gcc/config/rs6000/rs6000-c.cc   |  2 ++
 gcc/config/rs6000/rs6000-cpus.def   | 14 ++
 gcc/config/rs6000/rs6000-tables.opt | 11 +++
 gcc/config/rs6000/rs6000.cc |  5 -
 gcc/config/rs6000/rs6000.h  |  6 ++
 gcc/testsuite/gcc.target/powerpc/future-1.c | 13 +
 gcc/testsuite/gcc.target/powerpc/future-2.c | 24 
 10 files changed, 73 insertions(+), 5 deletions(-)

diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 5423252f7688..7c437be201ec 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index fdddc4327963..bab23491debc 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index 37c2c081c34a..bcf236665604 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index d5e1e3c046a6..70e6d4b1e6db 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -440,6 +440,8 @@ rs6000_target_modify_macros (bool define_p,
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
   if ((cpu_option & CPU_OPTION_POWER11_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
+  if ((cpu_option & CPU_OPTION_FUTURE_MASK) != 0)
+rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE");
   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
 rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
   if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 42bb0f7ffee9..e72139188707 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -125,6 +125,10 @@
 #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \
  | OPTION_MASK_POWER11)
 
+/* At the moment, do not define any addition -m arguments for -mcpu=future
+   support.  */
+#define FUTURE_MASKS_SERVER  POWER11_MASKS_SERVER
+
 /* Flags that need to be turned off if -mno-vsx.  */
 #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX\
 | OPTION_MASK_FLOAT128_KEYWORD \
@@ -201,6 +205,7 @@
 #define CPU_OPTION_POWER9_MASK HOST_WIDE_INT_UC (0x0008)
 #define CPU_OPTION_POWER10_MASKHOST_WIDE_INT_UC (0x0010)
 #de

[gcc r16-4010] Regenerate gcc/m2/lang.opt.urls

[Mark Wielaard via Gcc-cvs]

https://gcc.gnu.org/g:5cef5f2bf8458197f694fb6991c96ae287832d60

commit r16-4010-g5cef5f2bf8458197f694fb6991c96ae287832d60
Author: Mark Wielaard 
Date:   Sun Sep 21 18:57:27 2025 +0200

Regenerate gcc/m2/lang.opt.urls

Autogenerate for -fmem-report and -ftime-report.

Fixes: 273b53effbf5 ("PR modula2/121856: New wideset implementation")

gcc/m2/ChangeLog:

* lang.opt.urls: Regenerate.

Diff:
---
 gcc/m2/lang.opt.urls | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/gcc/m2/lang.opt.urls b/gcc/m2/lang.opt.urls
index dc1dbf06371a..1abc1685ea32 100644
--- a/gcc/m2/lang.opt.urls
+++ b/gcc/m2/lang.opt.urls
@@ -1,5 +1,11 @@
 ; Autogenerated by regenerate-opt-urls.py from gcc/m2/lang.opt and generated 
HTML
 
+fmem-report
+UrlSuffix(gcc/Developer-Options.html#index-fmem-report)
+
+ftime-report
+UrlSuffix(gcc/Developer-Options.html#index-ftime-report)
+
 fversion
 LangUrlSuffix_D(gdc/Runtime-Options.html#index-fversion)

[gcc r16-4011] One extra special case for AFDO0

[Jan Hubicka via Gcc-cvs]

https://gcc.gnu.org/g:d74aec06b106e0c42e3210bddeb02a5512f4d382

commit r16-4011-gd74aec06b106e0c42e3210bddeb02a5512f4d382
Author: Jan Hubicka 
Date:   Sun Sep 21 19:51:57 2025 +0200

One extra special case for AFDO0

This patch makes inliner and ipa-cp to consider optimization interesting 
even
in scenarios where aufdo countis 0, but scaleis high enough to make 
optimization
worthwhile.

gcc/ChangeLog:

* cgraph.cc (cgraph_edge::maybe_hot_p): For AFDO profiles force
count to be non-zero.

Diff:
---
 gcc/cgraph.cc | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/gcc/cgraph.cc b/gcc/cgraph.cc
index e5902a0fdcd0..72e6f54536d4 100644
--- a/gcc/cgraph.cc
+++ b/gcc/cgraph.cc
@@ -3157,9 +3157,17 @@ cgraph_edge::maybe_hot_p (sreal scale)
 
   /* If reliable IPA count is available, just use it.  */
   profile_count c = count.ipa ();
-  if (c.reliable_p ())
+  if (c.reliable_p ()
+  || (c.quality () == AFDO && c.nonzero_p ()))
 return maybe_hot_count_p (NULL, c * scale);
 
+  /* In auto-FDO, count 0 may lead to hot code in case the
+ call is simply not called often enough to receive some samples.  */
+  if ((c.quality () == AFDO
+   || count.quality () == GUESSED_GLOBAL0_ADJUSTED)
+  && callee && callee->count.quality () == AFDO)
+return maybe_hot_count_p (NULL, c.force_nonzero () * scale);
+
   /* See if we can determine hotness using caller frequency.  */
   if (caller->frequency == NODE_FREQUENCY_UNLIKELY_EXECUTED
   || (callee

[gcc(refs/users/meissner/heads/work222)] Revert changes

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:5248a796cf279d8890018911c09e76280b2309a4

commit 5248a796cf279d8890018911c09e76280b2309a4
Author: Michael Meissner 
Date:   Sun Sep 21 14:55:08 2025 -0400

Revert changes

Diff:
---
 gcc/config/rs6000/aix71.h   |   3 -
 gcc/config/rs6000/aix72.h   |   3 -
 gcc/config/rs6000/aix73.h   |   3 -
 gcc/config/rs6000/default64.h   |   2 -
 gcc/config/rs6000/driver-rs6000.cc  |   2 -
 gcc/config/rs6000/rs6000-c.cc   |  26 ++---
 gcc/config/rs6000/rs6000-cpus.def   | 120 +++-
 gcc/config/rs6000/rs6000-protos.h   |   5 +-
 gcc/config/rs6000/rs6000-tables.opt |  11 +-
 gcc/config/rs6000/rs6000.cc | 168 
 gcc/config/rs6000/rs6000.h  |  10 --
 gcc/config/rs6000/rs6000.opt|  16 +--
 gcc/testsuite/gcc.target/powerpc/future-1.c |  13 ---
 gcc/testsuite/gcc.target/powerpc/future-2.c |  24 
 14 files changed, 84 insertions(+), 322 deletions(-)

diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 7c437be201ec..2b21dd7cd1e0 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,7 +79,6 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
-  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
@@ -134,10 +133,8 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
-#undef RS6000_CPU_OPTION
 
 #undef  TARGET_DEFAULT
 #ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index bab23491debc..53c0bde5ad4a 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,7 +79,6 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
-  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
@@ -135,10 +134,8 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
-#undef RS6000_CPU_OPTION
 
 #undef  TARGET_DEFAULT
 #ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index bcf236665604..c7639368a264 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,7 +79,6 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
-  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
@@ -136,10 +135,8 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
-#undef RS6000_CPU_OPTION
 
 #undef  TARGET_DEFAULT
 #ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/default64.h b/gcc/config/rs6000/default64.h
index d289c6dfd6d8..7f6001ded852 100644
--- a/gcc/config/rs6000/default64.h
+++ b/gcc/config/rs6000/default64.h
@@ -19,10 +19,8 @@ along with GCC; see the file COPYING3.  If not see
 .  */
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
-#undef RS6000_CPU_OPTION
 
 #if (TARGET_DEFAULT & MASK_LITTLE_ENDIAN)
 #undef TARGET_DEFAULT
diff --git a/gcc/config/rs6000/driver-rs6000.cc 
b/gcc/config/rs6000/driver-rs6000.cc
index cacf25e9dfa4..2ab675e6d042 100644
--- a/gcc/config/rs6000/driver-rs6000.cc
+++ b/gcc/config/rs6000/driver-rs6000.cc
@@ -45,10 +45,8 @@ along with GCC; see the file COPYING3.  If not see
 static const char *rs6000_supported_cpu_names[] =
 {
 #define RS6000_CPU(NAME, CPU, FLAGS) NAME,
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)NAME,
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
-#undef RS6000_CPU_OPTION
 };
 
 /* This table holds a list of cpus where their Linux AT_PLATFORM name differs
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 70e6d4b1e6db..d3b0a5668212 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -338,16 +338,13 @@ rs6000_define_or_undefine_macro (bool define_p, const 
char *name)
#pragma GCC target, we need to adjust the macros dynamically.  */
 
 void
-rs6000_target_modify_macros 

[gcc(refs/users/meissner/heads/work222)] Remove internal -mpower11 support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:87d1c3a1938717308df69618f1810038ca2b1dfd

commit 87d1c3a1938717308df69618f1810038ca2b1dfd
Author: Michael Meissner 
Date:   Sun Sep 21 16:38:15 2025 -0400

Remove internal -mpower11 support.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000-cpus.def (POWER11_MASKS_SERVER): Drop 
-mpower11
ISA option.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.cc (rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.h (TARGET_POWER11): New macro.
* config/rs6000/rs6000.opt (-mpower11): Drop power11 from being an 
ISA
option.

Diff:
---
 gcc/config/rs6000/rs6000-cpus.def | 4 +---
 gcc/config/rs6000/rs6000.cc   | 1 -
 gcc/config/rs6000/rs6000.h| 2 ++
 gcc/config/rs6000/rs6000.opt  | 5 +
 4 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 6a4686a0a154..3102d88525bb 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -122,8 +122,7 @@
 | OPTION_MASK_POWER10  \
 | OTHER_POWER10_MASKS)
 
-#define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \
- | OPTION_MASK_POWER11)
+#define POWER11_MASKS_SERVER   ISA_3_1_MASKS_SERVER
 
 /* At the moment, do not define any addition -m arguments for -mcpu=future
support.  */
@@ -166,7 +165,6 @@
 | OPTION_MASK_FLOAT128_KEYWORD \
 | OPTION_MASK_FPRND\
 | OPTION_MASK_POWER10  \
-| OPTION_MASK_POWER11  \
 | OPTION_MASK_P10_FUSION   \
 | OPTION_MASK_HTM  \
 | OPTION_MASK_ISEL \
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 76a0f7d3978c..5daca441c71a 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -24482,7 +24482,6 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128-hardware",   OPTION_MASK_FLOAT128_HW,false, true  },
   { "fprnd",   OPTION_MASK_FPRND,  false, true  },
   { "power10", OPTION_MASK_POWER10,false, true  },
-  { "power11", OPTION_MASK_POWER11,false, false },
   { "hard-dfp",OPTION_MASK_DFP,false, 
true  },
   { "htm", OPTION_MASK_HTM,false, true  },
   { "isel",OPTION_MASK_ISEL,   false, true  },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index bcee3e025822..78c674b1e05d 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -558,6 +558,8 @@ extern int rs6000_vector_align[];
 
 /* ISA bits that are set via -mcpu=, but that do not have an associated
switch with the option.  */
+#define TARGET_POWER11 \
+  ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
 #define TARGET_FUTURE  \
   ((rs6000_cpu_option_flags & CPU_OPTION_FUTURE_MASK) != 0)
 
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 7c9602e68211..fb323beff9b4 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -598,11 +598,8 @@ Target Undocumented Var(rs6000_speculate_indirect_jumps) 
Init(1) Save
 mpower10
 Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
 
-;; Users should not use -mpower11, but we need to use a bit to identify when
-;; the user changes the default cpu via  #pragma GCC target("cpu=power11")
-;; and then resets it later.
 mpower11
-Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved
+Target Undocumented WarnRemoved
 
 mprefixed
 Target Mask(PREFIXED) Var(rs6000_isa_flags)

[gcc r16-4012] Update calls_comdat_local in cgraph_node::create_version_clone

[Jan Hubicka via Gcc-cvs]

https://gcc.gnu.org/g:058b2ef951fa833145891834471c7e577b72221f

commit r16-4012-g058b2ef951fa833145891834471c7e577b72221f
Author: Jan Hubicka 
Date:   Sun Sep 21 19:54:51 2025 +0200

Update calls_comdat_local in cgraph_node::create_version_clone

This patches fixes ICE when ipa-split is run from ipa-profile.  In normal
computation we recompute the flag elsewhere, but it is supposed to be kept
up-to-date by passes possibly modifying it.

gcc/ChangeLog:

* cgraphclones.cc (cgraph_node::create_version_clone): Recompute
calls_comdat_local

Diff:
---
 gcc/cgraphclones.cc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/cgraphclones.cc b/gcc/cgraphclones.cc
index c160e8b6985b..590d295ad43a 100644
--- a/gcc/cgraphclones.cc
+++ b/gcc/cgraphclones.cc
@@ -990,6 +990,7 @@ cgraph_node::create_version_clone (tree new_decl,
  version.  */
e->redirect_callee (new_version);
  }
+   new_version->calls_comdat_local = new_version->check_calls_comdat_local_p 
();
 
dump_callgraph_transformation (this, new_version, suffix);

[gcc(refs/users/meissner/heads/work222)] Add cpu option flag bits

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:f054fc84eb40e194d67764ee77b31678edbaae83

commit f054fc84eb40e194d67764ee77b31678edbaae83
Author: Michael Meissner 
Date:   Sun Sep 21 15:02:30 2025 -0400

Add cpu option flag bits

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/aix71.h (RS6000_CPU_OPTION): Define and undefine 
macro.
* config/rs6000/aix72.h (RS6000_CPU_OPTION): Likewise.
* config/rs6000/aix73.h (RS6000_CPU_OPTION): Likewise.
* config/rs6000/default64.h (RS6000_CPU_OPTION): Likewise.
* config/rs6000/driver-rs6000.cc (RS6000_CPU_OPTION): Likewise.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add CPU
options parameter.
(rs6000_cpu_cpp_builtins): Likewise.
* config/rs6000/rs6000-cpus.def (toplevel): Add comment describing 
ISA
mask bits and CPU option mask bits.
(CPU_OPTION_POWER6_MASK): New macro.
(CPU_OPTION_POWER7_MASK): Likewise.
(CPU_OPTION_POWER8_MASK): Likewise.
(CPU_OPTION_POWER9_MASK): Likewise.
(CPU_OPTION_POWER10_MASK): Likewise.
(CPU_OPTION_POWER11_MASK): Likewise.
(CPU_OPTION_POWER6_ALL_MASKS): Likewise.
(CPU_OPTION_POWER7_ALL_MASKS): Likewise.
(CPU_OPTION_POWER8_ALL_MASKS): Likewise.
(CPU_OPTION_POWER9_ALL_MASKS): Likewise.
(CPU_OPTION_POWER10_ALL_MASKS): Likewise.
(CPU_OPTION_POWER11_ALL_MASKS): Likewise.
(power6 cpu): Switch to use RS6000_CPU_OPTION in order to set the 
CPU
option mask bits.
(power6x cpu): Likewise.
(power7 cpu): Likewise.
(power8): Likewise.
(power9): Likewise.
(power10): Likewise.
(power11): Likewise.
* config/rs6000/rs6000-protos.h (rs6000_target_modify_macros): Add 
CPU
option argument.
(rs6000_target_modify_macros_ptr): Likewise.
* config/rs6000/rs6000.cc (rs6000_target_modify_macros_ptr): 
Likewise.
(rs6000_print_isa_options): Likewise.
(struct rs6000_ptt): Likewise.
(RS6000_CPU): Likewise.
(RS6000_CPU_OPTION): Likewise.
(DEBUG_FMT_WX): Likewise.
(rs6000_debug_reg_global): Likewise.
(rs6000_option_override_internal): Likewise.
(struct rs6000_cpu_opt_mask): Likewise.
(rs6000_cpu_opt_masks): Likewise.
(rs6000_pragma_target_parse): Likewise.
(rs6000_function_specific_save): Likewise.
(rs6000_function_specific_restore): Likewise.
(rs6000_function_specific_print): Likewise.
(rs6000_print_options_internal): Likewise.
* config/rs6000/rs6000.opt (rs6000_cpu_option_flags): New target
variable.
(x_rs6000_cpu_option_flags): Likewise.

Diff:
---
 gcc/config/rs6000/aix71.h  |   2 +
 gcc/config/rs6000/aix72.h  |   2 +
 gcc/config/rs6000/aix73.h  |   2 +
 gcc/config/rs6000/default64.h  |   2 +
 gcc/config/rs6000/driver-rs6000.cc |   2 +
 gcc/config/rs6000/rs6000-c.cc  |  12 ++--
 gcc/config/rs6000/rs6000-cpus.def  | 126 ++--
 gcc/config/rs6000/rs6000-protos.h  |   5 +-
 gcc/config/rs6000/rs6000.cc| 129 -
 gcc/config/rs6000/rs6000.opt   |   9 +++
 10 files changed, 238 insertions(+), 53 deletions(-)

diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 2b21dd7cd1e0..5423252f7688 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -133,8 +133,10 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
+#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
+#undef RS6000_CPU_OPTION
 
 #undef  TARGET_DEFAULT
 #ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index 53c0bde5ad4a..fdddc4327963 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -134,8 +134,10 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
+#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
+#undef RS6000_CPU_OPTION
 
 #undef  TARGET_DEFAULT
 #ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index c7639368a264..37c2c081c34a 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -135,8 +135,10 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
+#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #u

[gcc(refs/users/meissner/heads/work222)] Update ChangeLog.*

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:c1aaca4f34d2b8c302c96c3ed48754a2d0edd4dc

commit c1aaca4f34d2b8c302c96c3ed48754a2d0edd4dc
Author: Michael Meissner 
Date:   Sun Sep 21 15:14:34 2025 -0400

Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.meissner | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 6a86d366b5a7..aac8ee7ead91 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -38,6 +38,7 @@ Add -mcpu=future support.
 
 gcc/
 
+   * config.gcc (powerpc*-*-*): Add support for --with-cpu=future.
* config/rs6000/aix71.h (ASM_CPU_SPEC): If -mcpu=future, pass -mfuture
to the assembler.
* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.

[gcc(refs/users/meissner/heads/work222)] Move setting the assembler .machine directive to use CPU options.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:7a4372433ed2917ad6d1af2352f7c7c04a34ebf7

commit 7a4372433ed2917ad6d1af2352f7c7c04a34ebf7
Author: Michael Meissner 
Date:   Sun Sep 21 15:05:02 2025 -0400

Move setting the assembler .machine directive to use CPU options.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000.cc (rs6000_machine_from_flags): Set the 
assembler
.machine name from CPU options for power11 through power6.

Diff:
---
 gcc/config/rs6000/rs6000.cc | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 93ed508e02da..6b49537976a2 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5929,17 +5929,17 @@ rs6000_machine_from_flags (void)
   flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL
 | OPTION_MASK_ALTIVEC);
 
-  if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
 return "power11";
-  if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER10_MASK) != 0)
 return "power10";
-  if ((flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER9_MASK) != 0)
 return "power9";
-  if ((flags & (ISA_2_7_MASKS_SERVER & ~ISA_2_6_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER8_MASK) != 0)
 return "power8";
-  if ((flags & (ISA_2_6_MASKS_SERVER & ~ISA_2_5_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER7_MASK) != 0)
 return "power7";
-  if ((flags & (ISA_2_5_MASKS_SERVER & ~ISA_2_4_MASKS)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER6_MASK) != 0)
 return "power6";
   if ((flags & (ISA_2_4_MASKS & ~ISA_2_1_MASKS)) != 0)
 return "power5";

[gcc(refs/users/meissner/heads/work222)] Move defining _ARCH_PWRx to use CPU options.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:22ffa940071f784379553381f4c22bb4efa5ac24

commit 22ffa940071f784379553381f4c22bb4efa5ac24
Author: Michael Meissner 
Date:   Sun Sep 21 15:05:44 2025 -0400

Move defining _ARCH_PWRx to use CPU options.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use CPU
options to define _ARCH_PWR11, _ARCH_PWR11, _ARCH_PWR10, _ARCH_PWR9,
_ARCH_PWR8, _ARCH_PWR7, and _ARCH_PWR6.

Diff:
---
 gcc/config/rs6000/rs6000-c.cc | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 823531d5e5a7..d5e1e3c046a6 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -428,17 +428,17 @@ rs6000_target_modify_macros (bool define_p,
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5");
   if ((flags & OPTION_MASK_FPRND) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5X");
-  if ((flags & OPTION_MASK_CMPB) != 0)
+  if ((cpu_option & CPU_OPTION_POWER6_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6");
-  if ((flags & OPTION_MASK_POPCNTD) != 0)
+  if ((cpu_option & CPU_OPTION_POWER7_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
-  if ((flags & OPTION_MASK_POWER8) != 0)
+  if ((cpu_option & CPU_OPTION_POWER8_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8");
-  if ((flags & OPTION_MASK_MODULO) != 0)
+  if ((cpu_option & CPU_OPTION_POWER9_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
-  if ((flags & OPTION_MASK_POWER10) != 0)
+  if ((cpu_option & CPU_OPTION_POWER10_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
-  if ((flags & OPTION_MASK_POWER11) != 0)
+  if ((cpu_option & CPU_OPTION_POWER11_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
 rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");

[gcc(refs/users/meissner/heads/work222)] Move clone attribute support to use CPU options.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:a68a4e3ff0b42aaccb504123aa6fee6d51957829

commit a68a4e3ff0b42aaccb504123aa6fee6d51957829
Author: Michael Meissner 
Date:   Sun Sep 21 15:03:31 2025 -0400

Move clone attribute support to use CPU options.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000.cc (struct clone_map): Use CPU options 
instead of
ISA masks for setting up clone attributes.
(rs6000_clone_map): Likewise.
(rs6000_clone_priority): Likewise.

Diff:
---
 gcc/config/rs6000/rs6000.cc | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index a958d03b9236..93ed508e02da 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -250,17 +250,17 @@ enum {
 
 /* Map compiler ISA bits into HWCAP names.  */
 struct clone_map {
-  HOST_WIDE_INT isa_mask;  /* rs6000_isa mask */
+  HOST_WIDE_INT cpu_option;/* CPU options mask */
   const char *name;/* name to use in __builtin_cpu_supports.  */
 };
 
 static const struct clone_map rs6000_clone_map[CLONE_MAX] = {
   { 0, "" },   /* Default options.  */
-  { OPTION_MASK_CMPB,  "arch_2_05" },  /* ISA 2.05 (power6).  */
-  { OPTION_MASK_POPCNTD,   "arch_2_06" },  /* ISA 2.06 (power7).  */
-  { OPTION_MASK_P8_VECTOR, "arch_2_07" },  /* ISA 2.07 (power8).  */
-  { OPTION_MASK_P9_VECTOR, "arch_3_00" },  /* ISA 3.0 (power9).  */
-  { OPTION_MASK_POWER10,   "arch_3_1" },   /* ISA 3.1 (power10).  */
+  { CPU_OPTION_POWER6_MASK,"arch_2_05" },  /* ISA 2.05 (power6).  */
+  { CPU_OPTION_POWER7_MASK,"arch_2_06" },  /* ISA 2.06 (power7).  */
+  { CPU_OPTION_POWER8_MASK,"arch_2_07" },  /* ISA 2.07 (power8).  */
+  { CPU_OPTION_POWER9_MASK,"arch_3_00" },  /* ISA 3.0 (power9).  */
+  { CPU_OPTION_POWER10_MASK,   "arch_3_1" },   /* ISA 3.1 (power10).  */
 };
 
 
@@ -25337,7 +25337,7 @@ static int
 rs6000_clone_priority (tree fndecl)
 {
   tree fn_opts = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
-  HOST_WIDE_INT isa_masks;
+  HOST_WIDE_INT cpu_option;
   int ret = CLONE_DEFAULT;
   tree attrs = lookup_attribute ("target", DECL_ATTRIBUTES (fndecl));
   const char *attrs_str = NULL;
@@ -25353,12 +25353,12 @@ rs6000_clone_priority (tree fndecl)
fn_opts = target_option_default_node;
 
   if (!fn_opts || !TREE_TARGET_OPTION (fn_opts))
-   isa_masks = rs6000_isa_flags;
+   cpu_option = rs6000_cpu_option_flags;
   else
-   isa_masks = TREE_TARGET_OPTION (fn_opts)->x_rs6000_isa_flags;
+   cpu_option = TREE_TARGET_OPTION (fn_opts)->x_rs6000_cpu_option_flags;
 
   for (ret = CLONE_MAX - 1; ret != 0; ret--)
-   if ((rs6000_clone_map[ret].isa_mask & isa_masks) != 0)
+   if ((rs6000_clone_map[ret].cpu_option & cpu_option) != 0)
  break;
 }

[gcc(refs/users/meissner/heads/work222)] Remove internal -mpower10 support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:290e5437e224990968cf68a1e32b6ec4dc400409

commit 290e5437e224990968cf68a1e32b6ec4dc400409
Author: Michael Meissner 
Date:   Sun Sep 21 15:13:20 2025 -0400

Remove internal -mpower10 support.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Drop 
-mpower10
ISA option.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.cc (rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.h (TARGET_POWER10): New macro.
* config/rs6000/rs6000.opt (-mpower10): Drop power11 from being an 
ISA
option.

Diff:
---
 gcc/config/rs6000/rs6000-cpus.def | 2 --
 gcc/config/rs6000/rs6000.cc   | 1 -
 gcc/config/rs6000/rs6000.h| 2 ++
 gcc/config/rs6000/rs6000.opt  | 2 +-
 4 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 1b15b9774bdf..0f7d76457cb9 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -119,7 +119,6 @@
 | OPTION_MASK_PREFIXED)
 
 #define ISA_3_1_MASKS_SERVER   (ISA_3_0_MASKS_SERVER   \
-| OPTION_MASK_POWER10  \
 | OTHER_POWER10_MASKS)
 
 #define POWER11_MASKS_SERVER   ISA_3_1_MASKS_SERVER
@@ -164,7 +163,6 @@
 | OPTION_MASK_FLOAT128_HW  \
 | OPTION_MASK_FLOAT128_KEYWORD \
 | OPTION_MASK_FPRND\
-| OPTION_MASK_POWER10  \
 | OPTION_MASK_P10_FUSION   \
 | OPTION_MASK_HTM  \
 | OPTION_MASK_ISEL \
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 5daca441c71a..440b76140bfc 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -24481,7 +24481,6 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128",OPTION_MASK_FLOAT128_KEYWORD,   false, 
true  },
   { "float128-hardware",   OPTION_MASK_FLOAT128_HW,false, true  },
   { "fprnd",   OPTION_MASK_FPRND,  false, true  },
-  { "power10", OPTION_MASK_POWER10,false, true  },
   { "hard-dfp",OPTION_MASK_DFP,false, 
true  },
   { "htm", OPTION_MASK_HTM,false, true  },
   { "isel",OPTION_MASK_ISEL,   false, true  },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 78c674b1e05d..1d63d5f1ca38 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -558,6 +558,8 @@ extern int rs6000_vector_align[];
 
 /* ISA bits that are set via -mcpu=, but that do not have an associated
switch with the option.  */
+#define TARGET_POWER10 \
+  ((rs6000_cpu_option_flags & CPU_OPTION_POWER10_MASK) != 0)
 #define TARGET_POWER11 \
   ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
 #define TARGET_FUTURE  \
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index fb323beff9b4..451afabe2c1f 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -596,7 +596,7 @@ mspeculate-indirect-jumps
 Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save
 
 mpower10
-Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
+Target Undocumented WarnRemoved
 
 mpower11
 Target Undocumented WarnRemoved

[gcc(refs/users/meissner/heads/work222)] Add -mcpu=future support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:7366e1b4cd918dc7d65a1de13b4ea4e614107b3c

commit 7366e1b4cd918dc7d65a1de13b4ea4e614107b3c
Author: Michael Meissner 
Date:   Sun Sep 21 15:11:55 2025 -0400

Add -mcpu=future support.

2025-09-21  Michael Meissner  

gcc/

* config.gcc (powerpc*-*-*): Add support for --with-cpu=future.
* config/rs6000/aix71.h (ASM_CPU_SPEC): If -mcpu=future, pass 
-mfuture
to the assembler.
* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/rs6000.c.cc (rs6000_target_modify_macros): If
-mcpu=future define _ARCH_FUTURE.
* config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): New macro.
(CPU_OPTION_FUTURE_MASK): Add support for -mcpu=future.
(CPU_OPTION_FUTURE_ALL_MASKS): Likewise.
(future cpu): Likewise.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/rs6000.cc (power10_cost): Update comment.
(rs6000_machine_from_flags): Add support for -mcpu=future.
(rs6000_cpu_opt_masks): Likewise.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): If -mcpu=future, pass 
-mfuture
to the assembler.
(TARGET_FUTURE): New macro.

gcc/testsuite/

* gcc.target/powerpc/future-1.c: New test.
* gcc.target/powerpc/future-2.c: Likewise.

Diff:
---
 gcc/config.gcc  |  4 ++--
 gcc/config/rs6000/aix71.h   |  1 +
 gcc/config/rs6000/aix72.h   |  1 +
 gcc/config/rs6000/aix73.h   |  1 +
 gcc/config/rs6000/rs6000-c.cc   |  2 ++
 gcc/config/rs6000/rs6000-cpus.def   | 14 ++
 gcc/config/rs6000/rs6000-tables.opt | 11 +++
 gcc/config/rs6000/rs6000.cc |  5 -
 gcc/config/rs6000/rs6000.h  |  6 ++
 gcc/testsuite/gcc.target/powerpc/future-1.c | 13 +
 gcc/testsuite/gcc.target/powerpc/future-2.c | 24 
 11 files changed, 75 insertions(+), 7 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 7c2f5bed8f6a..5fee641d5aef 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -533,7 +533,7 @@ powerpc*-*-*)
extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h 
si2vmx.h"
extra_headers="${extra_headers} amo.h"
case x$with_cpu in
-   
xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
+   
xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500|xfuture)
cpu_is_64bit=yes
;;
esac
@@ -5711,7 +5711,7 @@ case "${target}" in
tm_defines="${tm_defines} CONFIG_PPC405CR"
eval "with_$which=405"
;;
-   "" | common | native \
+   "" | common | native | future \
| power[3456789] | power1[01] | power5+ | power6x \
| powerpc | powerpc64 | powerpc64le \
| rs64 \
diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 5423252f7688..7c437be201ec 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index fdddc4327963..bab23491debc 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index 37c2c081c34a..bcf236665604 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index d5e1e3c046a6..70e6d4b1e6db 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -440,6 +440,8 @@ rs6000_target_modify_macros (bool define_p,
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR1

[gcc(refs/users/meissner/heads/work222)] Revert changes

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:53a302b36794540f27dea168a23af097d6280ac5

commit 53a302b36794540f27dea168a23af097d6280ac5
Author: Michael Meissner 
Date:   Sun Sep 21 16:24:37 2025 -0400

Revert changes

Diff:
---
 gcc/config.gcc  |   4 +-
 gcc/config/rs6000/aix71.h   |   3 -
 gcc/config/rs6000/aix72.h   |   3 -
 gcc/config/rs6000/aix73.h   |   3 -
 gcc/config/rs6000/default64.h   |   2 -
 gcc/config/rs6000/driver-rs6000.cc  |   2 -
 gcc/config/rs6000/rs6000-c.cc   |  26 ++---
 gcc/config/rs6000/rs6000-cpus.def   | 146 
 gcc/config/rs6000/rs6000-protos.h   |   5 +-
 gcc/config/rs6000/rs6000-tables.opt |  11 +-
 gcc/config/rs6000/rs6000.cc | 168 
 gcc/config/rs6000/rs6000.h  |  10 --
 gcc/config/rs6000/rs6000.opt|  16 +--
 gcc/testsuite/gcc.target/powerpc/future-1.c |  13 ---
 gcc/testsuite/gcc.target/powerpc/future-2.c |  24 
 15 files changed, 94 insertions(+), 342 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 5fee641d5aef..7c2f5bed8f6a 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -533,7 +533,7 @@ powerpc*-*-*)
extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h 
si2vmx.h"
extra_headers="${extra_headers} amo.h"
case x$with_cpu in
-   
xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500|xfuture)
+   
xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
cpu_is_64bit=yes
;;
esac
@@ -5711,7 +5711,7 @@ case "${target}" in
tm_defines="${tm_defines} CONFIG_PPC405CR"
eval "with_$which=405"
;;
-   "" | common | native | future \
+   "" | common | native \
| power[3456789] | power1[01] | power5+ | power6x \
| powerpc | powerpc64 | powerpc64le \
| rs64 \
diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 7c437be201ec..2b21dd7cd1e0 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,7 +79,6 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
-  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
@@ -134,10 +133,8 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
-#undef RS6000_CPU_OPTION
 
 #undef  TARGET_DEFAULT
 #ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index bab23491debc..53c0bde5ad4a 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,7 +79,6 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
-  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
@@ -135,10 +134,8 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
-#undef RS6000_CPU_OPTION
 
 #undef  TARGET_DEFAULT
 #ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index bcf236665604..c7639368a264 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,7 +79,6 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
-  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
@@ -136,10 +135,8 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
-#undef RS6000_CPU_OPTION
 
 #undef  TARGET_DEFAULT
 #ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/default64.h b/gcc/config/rs6000/default64.h
index d289c6dfd6d8..7f6001ded852 100644
--- a/gcc/config/rs6000/default64.h
+++ b/gcc/config/rs6000/default64.h
@@ -19,10 +19,8 @@ along with GCC; see the file COPYING3.  If not see
 .  */
 
 #define RS6000_CPU(NAME

[gcc(refs/users/meissner/heads/work222)] Add cpu option flag bits

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:f59edbc5524dce45cfefc49df8afea93d9e71d31

commit f59edbc5524dce45cfefc49df8afea93d9e71d31
Author: Michael Meissner 
Date:   Sun Sep 21 16:28:56 2025 -0400

Add cpu option flag bits

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/aix71.h (RS6000_CPU_OPTION): Define and undefine 
macro.
* config/rs6000/aix72.h (RS6000_CPU_OPTION): Likewise.
* config/rs6000/aix73.h (RS6000_CPU_OPTION): Likewise.
* config/rs6000/default64.h (RS6000_CPU_OPTION): Likewise.
* config/rs6000/driver-rs6000.cc (RS6000_CPU_OPTION): Likewise.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add CPU
options parameter.
(rs6000_cpu_cpp_builtins): Likewise.
* config/rs6000/rs6000-cpus.def (toplevel): Add comment describing 
ISA
mask bits and CPU option mask bits.
(CPU_OPTION_POWER6_MASK): New macro.
(CPU_OPTION_POWER7_MASK): Likewise.
(CPU_OPTION_POWER8_MASK): Likewise.
(CPU_OPTION_POWER9_MASK): Likewise.
(CPU_OPTION_POWER10_MASK): Likewise.
(CPU_OPTION_POWER11_MASK): Likewise.
(CPU_OPTION_POWER6_ALL_MASKS): Likewise.
(CPU_OPTION_POWER7_ALL_MASKS): Likewise.
(CPU_OPTION_POWER8_ALL_MASKS): Likewise.
(CPU_OPTION_POWER9_ALL_MASKS): Likewise.
(CPU_OPTION_POWER10_ALL_MASKS): Likewise.
(CPU_OPTION_POWER11_ALL_MASKS): Likewise.
(power6 cpu): Switch to use RS6000_CPU_OPTION in order to set the 
CPU
option mask bits.
(power6x cpu): Likewise.
(power7 cpu): Likewise.
(power8): Likewise.
(power9): Likewise.
(power10): Likewise.
(power11): Likewise.
(powerpc64le): Likewise.
* config/rs6000/rs6000-protos.h (rs6000_target_modify_macros): Add 
CPU
option argument.
(rs6000_target_modify_macros_ptr): Likewise.
* config/rs6000/rs6000.cc (rs6000_target_modify_macros_ptr): 
Likewise.
(rs6000_print_isa_options): Likewise.
(struct rs6000_ptt): Likewise.
(RS6000_CPU): Likewise.
(RS6000_CPU_OPTION): Likewise.
(DEBUG_FMT_WX): Likewise.
(rs6000_debug_reg_global): Likewise.
(rs6000_option_override_internal): Likewise.
(struct rs6000_cpu_opt_mask): Likewise.
(rs6000_cpu_opt_masks): Likewise.
(rs6000_pragma_target_parse): Likewise.
(rs6000_function_specific_save): Likewise.
(rs6000_function_specific_restore): Likewise.
(rs6000_function_specific_print): Likewise.
(rs6000_print_options_internal): Likewise.
* config/rs6000/rs6000.opt (rs6000_cpu_option_flags): New target
variable.
(x_rs6000_cpu_option_flags): Likewise.

Diff:
---
 gcc/config/rs6000/aix71.h  |   2 +
 gcc/config/rs6000/aix72.h  |   2 +
 gcc/config/rs6000/aix73.h  |   2 +
 gcc/config/rs6000/default64.h  |   2 +
 gcc/config/rs6000/driver-rs6000.cc |   2 +
 gcc/config/rs6000/rs6000-c.cc  |  12 ++--
 gcc/config/rs6000/rs6000-cpus.def  | 131 +++--
 gcc/config/rs6000/rs6000-protos.h  |   5 +-
 gcc/config/rs6000/rs6000.cc| 129 
 gcc/config/rs6000/rs6000.opt   |   9 +++
 10 files changed, 241 insertions(+), 55 deletions(-)

diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 2b21dd7cd1e0..5423252f7688 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -133,8 +133,10 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
+#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
+#undef RS6000_CPU_OPTION
 
 #undef  TARGET_DEFAULT
 #ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index 53c0bde5ad4a..fdddc4327963 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -134,8 +134,10 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
+#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
 #include "rs6000-cpus.def"
 #undef RS6000_CPU
+#undef RS6000_CPU_OPTION
 
 #undef  TARGET_DEFAULT
 #ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index c7639368a264..37c2c081c34a 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -135,8 +135,10 @@ do {   
\
%{pthread: -D_THREAD_SAFE}"
 
 #define RS6000_CPU(NAME, CPU, FLAGS)
+#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OP

[gcc(refs/users/meissner/heads/work222)] Add -mcpu=future support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:26d48a8a39616c76593b65aeb3b6cbaf6ead678b

commit 26d48a8a39616c76593b65aeb3b6cbaf6ead678b
Author: Michael Meissner 
Date:   Sun Sep 21 16:37:55 2025 -0400

Add -mcpu=future support.

2025-09-21  Michael Meissner  

gcc/

* config.gcc (powerpc*-*-*): Add support for --with-cpu=future.
* config/rs6000/aix71.h (ASM_CPU_SPEC): If -mcpu=future, pass 
-mfuture
to the assembler.
* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/rs6000.c.cc (rs6000_target_modify_macros): If
-mcpu=future define _ARCH_FUTURE.
* config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): New macro.
(CPU_OPTION_FUTURE_MASK): Add support for -mcpu=future.
(CPU_OPTION_FUTURE_ALL_MASKS): Likewise.
(future cpu): Likewise.
* config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): New macro.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/rs6000.cc (power10_cost): Update comment.
(rs6000_machine_from_flags): Add support for -mcpu=future.
(rs6000_cpu_opt_masks): Likewise.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): If -mcpu=future, pass 
-mfuture
to the assembler.
(TARGET_FUTURE): New macro.

gcc/testsuite/

* gcc.target/powerpc/future-1.c: New test.
* gcc.target/powerpc/future-2.c: Likewise.

Diff:
---
 gcc/config.gcc  |  4 ++--
 gcc/config/rs6000/aix71.h   |  1 +
 gcc/config/rs6000/aix72.h   |  1 +
 gcc/config/rs6000/aix73.h   |  1 +
 gcc/config/rs6000/rs6000-c.cc   |  2 ++
 gcc/config/rs6000/rs6000-cpus.def   | 11 +++
 gcc/config/rs6000/rs6000-opts.h |  3 +++
 gcc/config/rs6000/rs6000-tables.opt | 11 +++
 gcc/config/rs6000/rs6000.cc |  5 -
 gcc/config/rs6000/rs6000.h  |  6 ++
 gcc/testsuite/gcc.target/powerpc/future-1.c | 13 +
 gcc/testsuite/gcc.target/powerpc/future-2.c | 24 
 12 files changed, 75 insertions(+), 7 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 7c2f5bed8f6a..5fee641d5aef 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -533,7 +533,7 @@ powerpc*-*-*)
extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h 
si2vmx.h"
extra_headers="${extra_headers} amo.h"
case x$with_cpu in
-   
xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
+   
xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500|xfuture)
cpu_is_64bit=yes
;;
esac
@@ -5711,7 +5711,7 @@ case "${target}" in
tm_defines="${tm_defines} CONFIG_PPC405CR"
eval "with_$which=405"
;;
-   "" | common | native \
+   "" | common | native | future \
| power[3456789] | power1[01] | power5+ | power6x \
| powerpc | powerpc64 | powerpc64le \
| rs64 \
diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 5423252f7688..7c437be201ec 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index fdddc4327963..bab23491debc 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index 37c2c081c34a..bcf236665604 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
   mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index d5e1e3c046a6..70e6d4b1e6db 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc

[gcc(refs/users/meissner/heads/work222)] Move clone attribute support to use CPU options.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:b85af88a372c97f42258a334c9c5a889b57b8aa5

commit b85af88a372c97f42258a334c9c5a889b57b8aa5
Author: Michael Meissner 
Date:   Sun Sep 21 16:29:23 2025 -0400

Move clone attribute support to use CPU options.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000.cc (struct clone_map): Use CPU options 
instead of
ISA masks for setting up clone attributes.
(rs6000_clone_map): Likewise.
(rs6000_clone_priority): Likewise.

Diff:
---
 gcc/config/rs6000/rs6000.cc | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index a958d03b9236..93ed508e02da 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -250,17 +250,17 @@ enum {
 
 /* Map compiler ISA bits into HWCAP names.  */
 struct clone_map {
-  HOST_WIDE_INT isa_mask;  /* rs6000_isa mask */
+  HOST_WIDE_INT cpu_option;/* CPU options mask */
   const char *name;/* name to use in __builtin_cpu_supports.  */
 };
 
 static const struct clone_map rs6000_clone_map[CLONE_MAX] = {
   { 0, "" },   /* Default options.  */
-  { OPTION_MASK_CMPB,  "arch_2_05" },  /* ISA 2.05 (power6).  */
-  { OPTION_MASK_POPCNTD,   "arch_2_06" },  /* ISA 2.06 (power7).  */
-  { OPTION_MASK_P8_VECTOR, "arch_2_07" },  /* ISA 2.07 (power8).  */
-  { OPTION_MASK_P9_VECTOR, "arch_3_00" },  /* ISA 3.0 (power9).  */
-  { OPTION_MASK_POWER10,   "arch_3_1" },   /* ISA 3.1 (power10).  */
+  { CPU_OPTION_POWER6_MASK,"arch_2_05" },  /* ISA 2.05 (power6).  */
+  { CPU_OPTION_POWER7_MASK,"arch_2_06" },  /* ISA 2.06 (power7).  */
+  { CPU_OPTION_POWER8_MASK,"arch_2_07" },  /* ISA 2.07 (power8).  */
+  { CPU_OPTION_POWER9_MASK,"arch_3_00" },  /* ISA 3.0 (power9).  */
+  { CPU_OPTION_POWER10_MASK,   "arch_3_1" },   /* ISA 3.1 (power10).  */
 };
 
 
@@ -25337,7 +25337,7 @@ static int
 rs6000_clone_priority (tree fndecl)
 {
   tree fn_opts = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
-  HOST_WIDE_INT isa_masks;
+  HOST_WIDE_INT cpu_option;
   int ret = CLONE_DEFAULT;
   tree attrs = lookup_attribute ("target", DECL_ATTRIBUTES (fndecl));
   const char *attrs_str = NULL;
@@ -25353,12 +25353,12 @@ rs6000_clone_priority (tree fndecl)
fn_opts = target_option_default_node;
 
   if (!fn_opts || !TREE_TARGET_OPTION (fn_opts))
-   isa_masks = rs6000_isa_flags;
+   cpu_option = rs6000_cpu_option_flags;
   else
-   isa_masks = TREE_TARGET_OPTION (fn_opts)->x_rs6000_isa_flags;
+   cpu_option = TREE_TARGET_OPTION (fn_opts)->x_rs6000_cpu_option_flags;
 
   for (ret = CLONE_MAX - 1; ret != 0; ret--)
-   if ((rs6000_clone_map[ret].isa_mask & isa_masks) != 0)
+   if ((rs6000_clone_map[ret].cpu_option & cpu_option) != 0)
  break;
 }

[gcc(refs/users/meissner/heads/work222)] Remove internal -mpower10 support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:6d64a123d1039ae94045ba8800c3474ae7cbf164

commit 6d64a123d1039ae94045ba8800c3474ae7cbf164
Author: Michael Meissner 
Date:   Sun Sep 21 16:38:55 2025 -0400

Remove internal -mpower10 support.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Drop 
-mpower10
ISA option.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.cc (rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.h (TARGET_POWER10): New macro.
* config/rs6000/rs6000.opt (-mpower10): Drop power11 from being an 
ISA
option.

Diff:
---
 gcc/config/rs6000/rs6000-cpus.def | 2 --
 gcc/config/rs6000/rs6000.cc   | 1 -
 gcc/config/rs6000/rs6000.h| 2 ++
 gcc/config/rs6000/rs6000.opt  | 2 +-
 4 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 3102d88525bb..bec532f42b80 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -119,7 +119,6 @@
 | OPTION_MASK_PREFIXED)
 
 #define ISA_3_1_MASKS_SERVER   (ISA_3_0_MASKS_SERVER   \
-| OPTION_MASK_POWER10  \
 | OTHER_POWER10_MASKS)
 
 #define POWER11_MASKS_SERVER   ISA_3_1_MASKS_SERVER
@@ -164,7 +163,6 @@
 | OPTION_MASK_FLOAT128_HW  \
 | OPTION_MASK_FLOAT128_KEYWORD \
 | OPTION_MASK_FPRND\
-| OPTION_MASK_POWER10  \
 | OPTION_MASK_P10_FUSION   \
 | OPTION_MASK_HTM  \
 | OPTION_MASK_ISEL \
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 5daca441c71a..440b76140bfc 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -24481,7 +24481,6 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128",OPTION_MASK_FLOAT128_KEYWORD,   false, 
true  },
   { "float128-hardware",   OPTION_MASK_FLOAT128_HW,false, true  },
   { "fprnd",   OPTION_MASK_FPRND,  false, true  },
-  { "power10", OPTION_MASK_POWER10,false, true  },
   { "hard-dfp",OPTION_MASK_DFP,false, 
true  },
   { "htm", OPTION_MASK_HTM,false, true  },
   { "isel",OPTION_MASK_ISEL,   false, true  },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 78c674b1e05d..1d63d5f1ca38 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -558,6 +558,8 @@ extern int rs6000_vector_align[];
 
 /* ISA bits that are set via -mcpu=, but that do not have an associated
switch with the option.  */
+#define TARGET_POWER10 \
+  ((rs6000_cpu_option_flags & CPU_OPTION_POWER10_MASK) != 0)
 #define TARGET_POWER11 \
   ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
 #define TARGET_FUTURE  \
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index fb323beff9b4..451afabe2c1f 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -596,7 +596,7 @@ mspeculate-indirect-jumps
 Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save
 
 mpower10
-Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
+Target Undocumented WarnRemoved
 
 mpower11
 Target Undocumented WarnRemoved

[gcc(refs/users/meissner/heads/work222)] Move defining _ARCH_PWRx to use CPU options.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:9616b76075da2214739c2e20e3764306eb5e7ff0

commit 9616b76075da2214739c2e20e3764306eb5e7ff0
Author: Michael Meissner 
Date:   Sun Sep 21 16:30:38 2025 -0400

Move defining _ARCH_PWRx to use CPU options.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use CPU
options to define _ARCH_PWR11, _ARCH_PWR11, _ARCH_PWR10, _ARCH_PWR9,
_ARCH_PWR8, _ARCH_PWR7, and _ARCH_PWR6.

Diff:
---
 gcc/config/rs6000/rs6000-c.cc | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 823531d5e5a7..d5e1e3c046a6 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -428,17 +428,17 @@ rs6000_target_modify_macros (bool define_p,
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5");
   if ((flags & OPTION_MASK_FPRND) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5X");
-  if ((flags & OPTION_MASK_CMPB) != 0)
+  if ((cpu_option & CPU_OPTION_POWER6_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6");
-  if ((flags & OPTION_MASK_POPCNTD) != 0)
+  if ((cpu_option & CPU_OPTION_POWER7_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
-  if ((flags & OPTION_MASK_POWER8) != 0)
+  if ((cpu_option & CPU_OPTION_POWER8_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8");
-  if ((flags & OPTION_MASK_MODULO) != 0)
+  if ((cpu_option & CPU_OPTION_POWER9_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
-  if ((flags & OPTION_MASK_POWER10) != 0)
+  if ((cpu_option & CPU_OPTION_POWER10_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
-  if ((flags & OPTION_MASK_POWER11) != 0)
+  if ((cpu_option & CPU_OPTION_POWER11_MASK) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
 rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");

[gcc(refs/users/meissner/heads/work222)] Move setting the assembler .machine directive to use CPU options.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:982aa1b62e9c8b7a24322b7edc4f88c0826a167a

commit 982aa1b62e9c8b7a24322b7edc4f88c0826a167a
Author: Michael Meissner 
Date:   Sun Sep 21 16:30:16 2025 -0400

Move setting the assembler .machine directive to use CPU options.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000.cc (rs6000_machine_from_flags): Set the 
assembler
.machine name from CPU options for power11 through power6.

Diff:
---
 gcc/config/rs6000/rs6000.cc | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 93ed508e02da..6b49537976a2 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5929,17 +5929,17 @@ rs6000_machine_from_flags (void)
   flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL
 | OPTION_MASK_ALTIVEC);
 
-  if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
 return "power11";
-  if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER10_MASK) != 0)
 return "power10";
-  if ((flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER9_MASK) != 0)
 return "power9";
-  if ((flags & (ISA_2_7_MASKS_SERVER & ~ISA_2_6_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER8_MASK) != 0)
 return "power8";
-  if ((flags & (ISA_2_6_MASKS_SERVER & ~ISA_2_5_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER7_MASK) != 0)
 return "power7";
-  if ((flags & (ISA_2_5_MASKS_SERVER & ~ISA_2_4_MASKS)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER6_MASK) != 0)
 return "power6";
   if ((flags & (ISA_2_4_MASKS & ~ISA_2_1_MASKS)) != 0)
 return "power5";

[gcc(refs/users/meissner/heads/work222)] Update ChangeLog.*

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:2a15e78b8488829ecbf22836621b65e23254d244

commit 2a15e78b8488829ecbf22836621b65e23254d244
Author: Michael Meissner 
Date:   Sun Sep 21 16:41:32 2025 -0400

Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.meissner | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index aac8ee7ead91..26fb48ff2d2f 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -49,6 +49,7 @@ gcc/
(CPU_OPTION_FUTURE_MASK): Add support for -mcpu=future.
(CPU_OPTION_FUTURE_ALL_MASKS): Likewise.
(future cpu): Likewise.
+   * config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): New macro.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/rs6000.cc (power10_cost): Update comment.
(rs6000_machine_from_flags): Add support for -mcpu=future.
@@ -136,6 +137,7 @@ gcc/
(power9): Likewise.
(power10): Likewise.
(power11): Likewise.
+   (powerpc64le): Likewise.
* config/rs6000/rs6000-protos.h (rs6000_target_modify_macros): Add CPU
option argument.
(rs6000_target_modify_macros_ptr): Likewise.

[gcc(refs/users/meissner/heads/work222)] Remove internal -mpower11 support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:9b6e7ebc71acda8fbe2dbe469ae33065a91fcb1d

commit 9b6e7ebc71acda8fbe2dbe469ae33065a91fcb1d
Author: Michael Meissner 
Date:   Sun Sep 21 15:12:48 2025 -0400

Remove internal -mpower11 support.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000-cpus.def (POWER11_MASKS_SERVER): Drop 
-mpower11
ISA option.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.cc (rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.h (TARGET_POWER11): New macro.
* config/rs6000/rs6000.opt (-mpower11): Drop power11 from being an 
ISA
option.

Diff:
---
 gcc/config/rs6000/rs6000-cpus.def | 4 +---
 gcc/config/rs6000/rs6000.cc   | 1 -
 gcc/config/rs6000/rs6000.h| 2 ++
 gcc/config/rs6000/rs6000.opt  | 5 +
 4 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 951ae399532b..1b15b9774bdf 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -122,8 +122,7 @@
 | OPTION_MASK_POWER10  \
 | OTHER_POWER10_MASKS)
 
-#define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \
- | OPTION_MASK_POWER11)
+#define POWER11_MASKS_SERVER   ISA_3_1_MASKS_SERVER
 
 /* At the moment, do not define any addition -m arguments for -mcpu=future
support.  */
@@ -166,7 +165,6 @@
 | OPTION_MASK_FLOAT128_KEYWORD \
 | OPTION_MASK_FPRND\
 | OPTION_MASK_POWER10  \
-| OPTION_MASK_POWER11  \
 | OPTION_MASK_P10_FUSION   \
 | OPTION_MASK_HTM  \
 | OPTION_MASK_ISEL \
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 76a0f7d3978c..5daca441c71a 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -24482,7 +24482,6 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128-hardware",   OPTION_MASK_FLOAT128_HW,false, true  },
   { "fprnd",   OPTION_MASK_FPRND,  false, true  },
   { "power10", OPTION_MASK_POWER10,false, true  },
-  { "power11", OPTION_MASK_POWER11,false, false },
   { "hard-dfp",OPTION_MASK_DFP,false, 
true  },
   { "htm", OPTION_MASK_HTM,false, true  },
   { "isel",OPTION_MASK_ISEL,   false, true  },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index bcee3e025822..78c674b1e05d 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -558,6 +558,8 @@ extern int rs6000_vector_align[];
 
 /* ISA bits that are set via -mcpu=, but that do not have an associated
switch with the option.  */
+#define TARGET_POWER11 \
+  ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
 #define TARGET_FUTURE  \
   ((rs6000_cpu_option_flags & CPU_OPTION_FUTURE_MASK) != 0)
 
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 7c9602e68211..fb323beff9b4 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -598,11 +598,8 @@ Target Undocumented Var(rs6000_speculate_indirect_jumps) 
Init(1) Save
 mpower10
 Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
 
-;; Users should not use -mpower11, but we need to use a bit to identify when
-;; the user changes the default cpu via  #pragma GCC target("cpu=power11")
-;; and then resets it later.
 mpower11
-Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved
+Target Undocumented WarnRemoved
 
 mprefixed
 Target Mask(PREFIXED) Var(rs6000_isa_flags)

[gcc r16-4014] fab: Remove forced label check from optimize_unreachable

[Andrew Pinski via Gcc-cvs]

https://gcc.gnu.org/g:c6781f5558bdb4f241a3597c528ed7020a5cfce7

commit r16-4014-gc6781f5558bdb4f241a3597c528ed7020a5cfce7
Author: Andrew Pinski 
Date:   Fri Sep 19 12:23:57 2025 -0700

fab: Remove forced label check from optimize_unreachable

Since optimize_unreachable does not directly remove the bb, we can still 
remove
the condition that goes to a block containing a forced label. This is a 
small cleanup
from the original patch which added optimize_unreachable.

The review of the original patch missed that the bb was not being removed 
by the pass
but later on by cleanupcfg; 
https://gcc.gnu.org/pipermail/gcc-patches/2012-July/343239.html.
Which is why this is allowed to be done.

I added another testcase to check that the `if` is removed too.

Bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

* tree-ssa-ccp.cc (optimize_unreachable): Don't check for forced 
labels.

gcc/testsuite/ChangeLog:

* gcc.dg/builtin-unreachable-7.c: New test.

Signed-off-by: Andrew Pinski 

Diff:
---
 gcc/testsuite/gcc.dg/builtin-unreachable-7.c | 24 +++
 gcc/tree-ssa-ccp.cc  | 29 ++--
 2 files changed, 30 insertions(+), 23 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/builtin-unreachable-7.c 
b/gcc/testsuite/gcc.dg/builtin-unreachable-7.c
new file mode 100644
index ..a6c078fef285
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/builtin-unreachable-7.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-fab1 -fno-tree-dominator-opts -fno-tree-vrp" 
} */
+/* { dg-require-effective-target label_values } */
+
+void foo (int b, int c)
+{
+  __label__ lab;
+  __label__ lab2;
+  static void *x[2] = {&&lab, &&lab2};
+  if (b == c)
+{
+lab:
+  __builtin_unreachable ();
+}
+lab2:
+  goto *x[c!=0];
+}
+
+/* Fab should still able to remove the conditional but leave the bb there. */
+
+/* { dg-final { scan-tree-dump-times "lab:" 1 "fab1" } } */
+/* { dg-final { scan-tree-dump-times "__builtin_unreachable" 1 "fab1" } } */
+/* { dg-final { scan-tree-dump-not "if " "fab1" } } */
+
diff --git a/gcc/tree-ssa-ccp.cc b/gcc/tree-ssa-ccp.cc
index f16b37f193e2..546cafbf7c69 100644
--- a/gcc/tree-ssa-ccp.cc
+++ b/gcc/tree-ssa-ccp.cc
@@ -3260,29 +3260,12 @@ optimize_unreachable (gimple_stmt_iterator i)
 
   if (flag_sanitize & SANITIZE_UNREACHABLE)
 return false;
-
-  for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi))
-{
-  stmt = gsi_stmt (gsi);
-
-  if (is_gimple_debug (stmt))
-   continue;
-
-  if (glabel *label_stmt = dyn_cast  (stmt))
-   {
- /* Verify we do not need to preserve the label.  */
- if (FORCED_LABEL (gimple_label_label (label_stmt)))
-   return false;
-
- continue;
-   }
-
-  /* Only handle the case that __builtin_unreachable is the first statement
-in the block.  We rely on DCE to remove stmts without side-effects
-before __builtin_unreachable.  */
-  if (gsi_stmt (gsi) != gsi_stmt (i))
-return false;
-}
+  gsi = gsi_start_nondebug_after_labels_bb (bb);
+  /* Only handle the case that __builtin_unreachable is the first
+ statement in the block.  We rely on DCE to remove stmts
+ without side-effects before __builtin_unreachable.  */
+  if (*gsi != *i)
+return false;
 
   ret = false;
   FOR_EACH_EDGE (e, ei, bb->preds)

[gcc r16-4013] Fortran: fix frontend memory leaks for ALLOCATE with SOURCE [PR109010]

[Harald Anlauf via Gcc-cvs]

https://gcc.gnu.org/g:518ec01b363ba782fe9a9b09a05a2716cedf8b01

commit r16-4013-g518ec01b363ba782fe9a9b09a05a2716cedf8b01
Author: Harald Anlauf 
Date:   Sun Sep 21 21:54:44 2025 +0200

Fortran: fix frontend memory leaks for ALLOCATE with SOURCE [PR109010]

When running under valgrind the Fortran frontend showed several leaks
involving __gmp_default_allocate for simple code such as

  program p
real, pointer :: x(:)
allocate (x, source = reshape ([1.], [1]))
  end

as not all used components of the structure gfc_code were freed when a
statement was freed.  Just do so.

PR fortran/109010

gcc/fortran/ChangeLog:

* st.cc (gfc_free_statement): Also free components expr3 and expr4.

Diff:
---
 gcc/fortran/st.cc | 4 
 1 file changed, 4 insertions(+)

diff --git a/gcc/fortran/st.cc b/gcc/fortran/st.cc
index f7f67b18b671..2281bf6e03b5 100644
--- a/gcc/fortran/st.cc
+++ b/gcc/fortran/st.cc
@@ -86,6 +86,10 @@ gfc_free_statement (gfc_code *p)
 gfc_free_expr (p->expr1);
   if (p->expr2)
 gfc_free_expr (p->expr2);
+  if (p->expr3)
+gfc_free_expr (p->expr3);
+  if (p->expr4)
+gfc_free_expr (p->expr4);
 
   switch (p->op)
 {

[gcc(refs/users/meissner/heads/work222)] Remove internal -mpower9-misc support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:d99645a5f61c7030a85826e5fe2044abd8ac3ca9

commit d99645a5f61c7030a85826e5fe2044abd8ac3ca9
Author: Michael Meissner 
Date:   Sun Sep 21 18:27:14 2025 -0400

Remove internal -mpower9-misc support.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/dfp.h (dfptstsfi__): Change 
TARGET_P9_MISC
to TARGET_POWER9.
(dfp_sgnfcnc_): Likewise.
(darn_64_): Likewise.
(darn_raw_): Likewise.
(@darn): Likewise.
(cmprb): Likewise.
(cmprb_internal): Likewise.
(setb_signed): Likewise.
(setb_unsigned): Likewise.
(cmprb2): Likewise.
(cmprb2_internal): Likewise.
(cmpeqb): Likewise.
(cmpeqb_internal): Likewise.
* config/rs6000/rs6000.opt (-mpower9-misc): Change to WarnRemoved.

Diff:
---
 gcc/config/rs6000/dfp.md   |  4 ++--
 gcc/config/rs6000/rs6000-cpus.def  |  2 --
 gcc/config/rs6000/rs6000-string.cc | 26 +-
 gcc/config/rs6000/rs6000.cc|  3 +--
 gcc/config/rs6000/rs6000.h |  2 ++
 gcc/config/rs6000/rs6000.md| 36 ++--
 gcc/config/rs6000/rs6000.opt   |  3 +--
 7 files changed, 37 insertions(+), 39 deletions(-)

diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md
index 59fa66ae15c8..825e7c54e73e 100644
--- a/gcc/config/rs6000/dfp.md
+++ b/gcc/config/rs6000/dfp.md
@@ -347,7 +347,7 @@
(DFP_TEST:SI (match_dup 3)
 (const_int 0)))
   ]
-  "TARGET_P9_MISC"
+  "TARGET_POWER9"
 {
   if ( == UNORDERED && !HONOR_NANS (mode))
 {
@@ -365,7 +365,7 @@
   (match_operand:DDTD 2 "gpc_reg_operand" "d")]
  UNSPEC_DTSTSFI)
 (match_operand:SI 3 "zero_constant" "j")))]
-  "TARGET_P9_MISC"
+  "TARGET_POWER9"
 {
   /* If immediate operand is greater than 63, it will behave as if
  the value had been 63.  The code generator does not support
diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index bec532f42b80..bc2823762837 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -106,7 +106,6 @@
  | OPTION_MASK_ISEL\
  | OPTION_MASK_MODULO  \
  | OPTION_MASK_P9_MINMAX   \
- | OPTION_MASK_P9_MISC \
  | OPTION_MASK_P9_VECTOR)  \
 & ~OTHER_FUSION_MASKS)
 
@@ -175,7 +174,6 @@
 | OPTION_MASK_P8_FUSION\
 | OPTION_MASK_P8_VECTOR\
 | OPTION_MASK_P9_MINMAX\
-| OPTION_MASK_P9_MISC  \
 | OPTION_MASK_P9_VECTOR\
 | OPTION_MASK_PCREL\
 | OPTION_MASK_PCREL_OPT\
diff --git a/gcc/config/rs6000/rs6000-string.cc 
b/gcc/config/rs6000/rs6000-string.cc
index 3d2911ca08a0..561297b0ba46 100644
--- a/gcc/config/rs6000/rs6000-string.cc
+++ b/gcc/config/rs6000/rs6000-string.cc
@@ -539,7 +539,7 @@ do_load_mask_compare (const machine_mode load_mode, rtx 
diff, rtx cmp_rem, rtx d
   emit_insn (gen_lshrsi3 (d2, d2, shift_amount));
 }
 
-  if (TARGET_P9_MISC)
+  if (TARGET_POWER9)
 {
   /* Generate a compare, and convert with a setb later.  */
   rtx cmp = gen_rtx_COMPARE (CCUNSmode, d1, d2);
@@ -605,7 +605,7 @@ do_overlap_load_compare (machine_mode load_mode, bool 
isConst,
   do_load_for_compare_from_addr (load_mode, d1, addr1, orig_src1);
   do_load_for_compare_from_addr (load_mode, d2, addr2, orig_src2);
 
-  if (TARGET_P9_MISC)
+  if (TARGET_POWER9)
 {
   /* Generate a compare, and convert with a setb later.  */
   rtx cmp = gen_rtx_COMPARE (CCUNSmode, d1, d2);
@@ -1185,7 +1185,7 @@ expand_compare_loop (rtx operands[])
   rtx dcond = NULL_RTX; /* Used for when we jump to diff_label.  */
   /* For p9 we need to have just one of these as multiple places define
  it and it gets used by the setb at the end.  */
-  if (TARGET_P9_MISC)
+  if (TARGET_POWER9)
 dcond = gen_reg_rtx (CCUNSmode);
 
   if (!bytes_is_const || bytes >= loop_bytes)
@@ -1227,7 +1227,7 @@ expand_compare_loop (rtx operands[])
 src2_ix2, orig_src2);
   do_add3 (iv2, iv2, GEN_INT (loop_bytes));
 
-  if (TARGET_P9_MISC)
+  if (TARGET_POWER9)
{
  /* Generate a compare, and convert with a setb later.  */
  rtx cmp = gen_rtx_COMPARE (CCUNSmode, d1_1, d2_1);
@@ -1245,7 +1245,7 @@ expand_compare_loop (rtx operands[])
   do_ifelse (GET_MOD

[gcc(refs/users/meissner/heads/work222)] Update ChangeLog.*

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:8fb311670702e8c74bb3a9347a8519cbebb445d4

commit 8fb311670702e8c74bb3a9347a8519cbebb445d4
Author: Michael Meissner 
Date:   Sun Sep 21 18:42:23 2025 -0400

Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.meissner | 59 ++
 1 file changed, 59 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 26fb48ff2d2f..1cc58ef7235d 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,62 @@
+ Branch work222, patch #18 
+
+Remove -mpower8-internal support.
+
+2025-09-21  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
+   -mpower8-internal support in favor of using power8 CPU option.
+   (POWERPC_MASKS): Likewise.
+   * config/rs6000/rs6000.cc (rs6000_option_override_internal): Likewise.
+   * config/rs6000/rs6000.h (TARGET_POWER8): New macro.
+   * config/rs6000/rs6000.opt (-mpower8-internal): Remove setting ISA bit.
+
+ Branch work222, patch #17 
+
+Remove internal -mpower9-misc support.
+
+2025-09-21  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/dfp.h (dfptstsfi__): Change TARGET_P9_MISC
+   to TARGET_POWER9.
+   (dfp_sgnfcnc_): Likewise.
+   (darn_64_): Likewise.
+   (darn_raw_): Likewise.
+   (@darn): Likewise.
+   (cmprb): Likewise.
+   (cmprb_internal): Likewise.
+   (setb_signed): Likewise.
+   (setb_unsigned): Likewise.
+   (cmprb2): Likewise.
+   (cmprb2_internal): Likewise.
+   (cmpeqb): Likewise.
+   (cmpeqb_internal): Likewise.
+   * config/rs6000/rs6000.opt (-mpower9-misc): Change to WarnRemoved.
+
  Branch work222, patch #16 
 
 Remove internal -mpower10 support.

[gcc(refs/users/meissner/heads/work222)] Remove -mpower8-internal support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:cfe93a168b52dca06c19f3ff06d65f96e9115bc7

commit cfe93a168b52dca06c19f3ff06d65f96e9115bc7
Author: Michael Meissner 
Date:   Sun Sep 21 18:39:49 2025 -0400

Remove -mpower8-internal support.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
-mpower8-internal support in favor of using power8 CPU option.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.cc (rs6000_option_override_internal): 
Likewise.
* config/rs6000/rs6000.h (TARGET_POWER8): New macro.
* config/rs6000/rs6000.opt (-mpower8-internal): Remove setting ISA 
bit.

Diff:
---
 gcc/config/rs6000/rs6000-cpus.def | 2 --
 gcc/config/rs6000/rs6000.cc   | 4 +---
 gcc/config/rs6000/rs6000.h| 2 ++
 gcc/config/rs6000/rs6000.opt  | 3 +--
 4 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index bc2823762837..233f01e9c615 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -89,7 +89,6 @@
fusion here, instead set it in rs6000.cc if we are tuning for a power8
system.  */
 #define ISA_2_7_MASKS_SERVER   (ISA_2_6_MASKS_SERVER   \
-| OPTION_MASK_POWER8   \
 | OPTION_MASK_P8_VECTOR\
 | OPTION_MASK_CRYPTO   \
 | OPTION_MASK_EFFICIENT_UNALIGNED_VSX  \
@@ -170,7 +169,6 @@
 | OPTION_MASK_MODULO   \
 | OPTION_MASK_MULHW\
 | OPTION_MASK_NO_UPDATE\
-| OPTION_MASK_POWER8   \
 | OPTION_MASK_P8_FUSION\
 | OPTION_MASK_P8_VECTOR\
 | OPTION_MASK_P9_MINMAX\
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index fe17ccf668ca..c599d864b3a7 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -3829,9 +3829,7 @@ rs6000_option_override_internal (bool global_init_p)
 }
 
   /* If little-endian, default to -mstrict-align on older processors.  */
-  if (!BYTES_BIG_ENDIAN
-  && !(processor_target_table[tune_index].target_enable
-  & OPTION_MASK_POWER8))
+  if (!BYTES_BIG_ENDIAN && !TARGET_POWER8)
 rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN;
 
   /* Add some warnings for VSX.  */
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 42213d998133..1bd2ce53cc7b 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -558,6 +558,8 @@ extern int rs6000_vector_align[];
 
 /* ISA bits that are set via -mcpu=, but that do not have an associated
switch with the option.  */
+#define TARGET_POWER8  \
+  ((rs6000_cpu_option_flags & CPU_OPTION_POWER8_MASK) != 0)
 #define TARGET_POWER9  \
   ((rs6000_cpu_option_flags & CPU_OPTION_POWER9_MASK) != 0)
 #define TARGET_POWER10 \
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 55590c5fe9dd..31852e02aa0f 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -483,9 +483,8 @@ Save the TOC in the prologue for indirect calls rather than 
inline.
 mvsx-timode
 Target RejectNegative Undocumented Ignore
 
-;; This option exists only to create its MASK.  It is not intended for users.
 mpower8-internal
-Target Undocumented Mask(POWER8) Var(rs6000_isa_flags) Warn(Do not use 
%<-mpower8-internal%>; use %<-mcpu=power8%> instead)
+Target Undocumented WarnRemoved
 
 mpower8-fusion
 Target Mask(P8_FUSION) Var(rs6000_isa_flags)

[gcc/meissner/heads/work222-sha] (44 commits) Merge commit 'refs/users/meissner/heads/work222-sha' of git

[Michael Meissner via Gcc-cvs]

The branch 'meissner/heads/work222-sha' was updated to point to:

 f90bcab5cc0c... Merge commit 'refs/users/meissner/heads/work222-sha' of git

It previously pointed to:

 949ea51e754a... Add ChangeLog.sha and update REVISION.

Diff:

Summary of changes (added commits):
---

  f90bcab... Merge commit 'refs/users/meissner/heads/work222-sha' of git
  c329715... Add ChangeLog.sha and update REVISION.
  71e186a... Update ChangeLog.* (*)
  5449154... Use power7 CPU option for power7 support instead of -mpopcn (*)
  8fb3116... Update ChangeLog.* (*)
  cfe93a1... Remove -mpower8-internal support. (*)
  d99645a... Remove internal -mpower9-misc support. (*)
  2a15e78... Update ChangeLog.* (*)
  6d64a12... Remove internal -mpower10 support. (*)
  87d1c3a... Remove internal -mpower11 support. (*)
  26d48a8... Add -mcpu=future support. (*)
  9616b76... Move defining _ARCH_PWRx to use CPU options. (*)
  982aa1b... Move setting the assembler .machine directive to use CPU op (*)
  b85af88... Move clone attribute support to use CPU options. (*)
  f59edbc... Add cpu option flag bits (*)
  53a302b... Revert changes (*)
  c1aaca4... Update ChangeLog.* (*)
  290e543... Remove internal -mpower10 support. (*)
  9b6e7eb... Remove internal -mpower11 support. (*)
  7366e1b... Add -mcpu=future support. (*)
  22ffa94... Move defining _ARCH_PWRx to use CPU options. (*)
  7a43724... Move setting the assembler .machine directive to use CPU op (*)
  a68a4e3... Move clone attribute support to use CPU options. (*)
  f054fc8... Add cpu option flag bits (*)
  5248a79... Revert changes (*)
  07cbfbe... Update ChangeLog.* (*)
  b3b0c5f... Remove internal -mpower10 support. (*)
  e2a5800... Remove internal -mpower11 support. (*)
  1654aae... Add -mcpu=future support. (*)
  aac2852... Revert changes (*)
  e1de460... Add -mcpu=future support. (*)
  0520959... Move defining _ARCH_PWRx to use CPU options. (*)
  beacfdd... Move setting the assembler .machine directive to use CPU op (*)
  4150b46... Move clone attribute support to use CPU options. (*)
  feaaa86... Add cpu option flag bits (*)
  0566cd5... Revert changes (*)
  c43ecbc... Update ChangeLog.* (*)
  f70de71... Remove internal -mpower11 support. (*)
  a95469d... Update ChangeLog.* (*)
  960e882... Add -mcpu=future support. (*)
  50b297d... Add cpu option flag bits (*)
  971476c... Revert changes (*)
  239581e... Add -mcpu=future support. (*)
  3107708... Add cpu option flag bits (*)

(*) This commit already exists in another branch.
Because the reference `refs/users/meissner/heads/work222-sha' matches
your hooks.email-new-commits-only configuration,
no separate email is sent for this commit.

[gcc(refs/users/meissner/heads/work222-test)] Merge commit 'refs/users/meissner/heads/work222-test' of git+ssh://gcc.gnu.org/git/gcc into me/work2

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:e4bf435544d4d054aae5bb19c506b3634104cff6

commit e4bf435544d4d054aae5bb19c506b3634104cff6
Merge: d2549a9b1257 af095e5d9dc3
Author: Michael Meissner 
Date:   Sun Sep 21 22:19:33 2025 -0400

Merge commit 'refs/users/meissner/heads/work222-test' of 
git+ssh://gcc.gnu.org/git/gcc into me/work222-test

Diff:

[gcc(refs/users/meissner/heads/work222-sha)] Add ChangeLog.sha and update REVISION.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:c329715c10313afa363a02f20b81e295e5c03bf9

commit c329715c10313afa363a02f20b81e295e5c03bf9
Author: Michael Meissner 
Date:   Fri Sep 19 13:15:23 2025 -0400

Add ChangeLog.sha and update REVISION.

2025-09-19  Michael Meissner  

gcc/

* ChangeLog.sha: New file for branch.
* REVISION: Update.

Diff:
---
 gcc/ChangeLog.sha | 14 ++
 gcc/REVISION  |  2 +-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.sha b/gcc/ChangeLog.sha
new file mode 100644
index ..bae8a264769e
--- /dev/null
+++ b/gcc/ChangeLog.sha
@@ -0,0 +1,14 @@
+ Branch work222-sha, baseline 
+
+2025-09-19   Michael Meissner  
+
+Add ChangeLog.sha and update REVISION.
+
+2025-09-19  Michael Meissner  
+
+gcc/
+
+   * ChangeLog.sha: New file for branch.
+   * REVISION: Update.
+
+   Clone branch
diff --git a/gcc/REVISION b/gcc/REVISION
index 6cb180fd55bf..2baec5f749f8 100644
--- a/gcc/REVISION
+++ b/gcc/REVISION
@@ -1 +1 @@
-work222 branch
+work222-sha branch

[gcc(refs/users/meissner/heads/work222)] Use power7 CPU option for power7 support instead of -mpopcntd

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:5449154b6dcc056b0178dd6f709099b6207eeda7

commit 5449154b6dcc056b0178dd6f709099b6207eeda7
Author: Michael Meissner 
Date:   Sun Sep 21 21:55:02 2025 -0400

Use power7 CPU option for power7 support instead of -mpopcntd

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/dfp.h (cmp_internal1): Use power7 CPU option
support instead of -mpopcntd, except for population count 
instructions.
* config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported):
Likewise.
* config/rs6000/rs6000-string.cc (expand_block_compare_gpr): 
Likewise.
* config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
Likewise.
(rs6000_option_override_internal): Likewise.
* config/rs6000/rs6000.h (TARGET_LDBRX): Likewise.
(TARGET_FCFID): Likewise.
(TARGET_LFIWZX): Likewise.
(TARGET_FCFIDS): Likewise.
(TARGET_FCFIDU): Likewise.
(TARGET_FCFIDUS): Likewise.
(TARGET_FCTIDUZ): Likewise.
(TARGET_FCTIWUZ): Likewise.
(TARGET_EXTRA_BUILTINS): Likewise.
(TARGET_POWER7): New macro.
* config/rs6000/rs6000.md (isa attribute): Use power7 CPU option 
support
instead of -mpopcntd, except for population count instructions.
(lrints): Likewise.
(lrintsi_di): Likewise.
(cmpmemsi): Likewise.
(bpermd_): Likewise.
(addg6s): Likewise.
(cdtbcd): Likewise.
(cbcdtd): Likewise.
(div_): Likewise.

Diff:
---
 gcc/config/rs6000/dfp.md|  2 +-
 gcc/config/rs6000/rs6000-builtin.cc |  4 ++--
 gcc/config/rs6000/rs6000-string.cc  |  4 ++--
 gcc/config/rs6000/rs6000.cc |  6 +++---
 gcc/config/rs6000/rs6000.h  | 20 +++-
 gcc/config/rs6000/rs6000.md | 18 +-
 6 files changed, 28 insertions(+), 26 deletions(-)

diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md
index 825e7c54e73e..4c6306c3c607 100644
--- a/gcc/config/rs6000/dfp.md
+++ b/gcc/config/rs6000/dfp.md
@@ -214,7 +214,7 @@
 (define_insn "floatdidd2"
   [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
(float:DD (match_operand:DI 1 "gpc_reg_operand" "d")))]
-  "TARGET_DFP && TARGET_POPCNTD"
+  "TARGET_DFP && TARGET_POWER7"
   "dcffix %0,%1"
   [(set_attr "type" "dfp")])
 
diff --git a/gcc/config/rs6000/rs6000-builtin.cc 
b/gcc/config/rs6000/rs6000-builtin.cc
index bc1580f051b0..dfbb7d02157b 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -161,9 +161,9 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins 
fncode)
 case ENB_P6_64:
   return TARGET_CMPB && TARGET_POWERPC64;
 case ENB_P7:
-  return TARGET_POPCNTD;
+  return TARGET_POWER7;
 case ENB_P7_64:
-  return TARGET_POPCNTD && TARGET_POWERPC64;
+  return TARGET_POWER7 && TARGET_POWERPC64;
 case ENB_P8:
   return TARGET_POWER8;
 case ENB_P8V:
diff --git a/gcc/config/rs6000/rs6000-string.cc 
b/gcc/config/rs6000/rs6000-string.cc
index 561297b0ba46..4ba7ef6bdb42 100644
--- a/gcc/config/rs6000/rs6000-string.cc
+++ b/gcc/config/rs6000/rs6000-string.cc
@@ -1948,8 +1948,8 @@ expand_block_compare_gpr(unsigned HOST_WIDE_INT bytes, 
unsigned int base_align,
 bool
 expand_block_compare (rtx operands[])
 {
-  /* TARGET_POPCNTD is already guarded at expand cmpmemsi.  */
-  gcc_assert (TARGET_POPCNTD);
+  /* TARGET_POWER7 is already guarded at expand cmpmemsi.  */
+  gcc_assert (TARGET_POWER7);
 
   /* For P8, this case is complicated to handle because the subtract
  with carry instructions do not generate the 64-bit carry and so
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index c599d864b3a7..241d18548209 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -1927,7 +1927,7 @@ rs6000_hard_regno_mode_ok_uncached (int regno, 
machine_mode mode)
  if(GET_MODE_SIZE (mode) == UNITS_PER_FP_WORD)
return 1;
 
- if (TARGET_POPCNTD && mode == SImode)
+ if (TARGET_POWER7 && mode == SImode)
return 1;
 
  if (TARGET_P9_VECTOR && (mode == QImode || mode == HImode))
@@ -3925,7 +3925,7 @@ rs6000_option_override_internal (bool global_init_p)
 rs6000_isa_flags |= (ISA_2_7_MASKS_SERVER & ~ignore_masks);
   else if (TARGET_VSX)
 rs6000_isa_flags |= (ISA_2_6_MASKS_SERVER & ~ignore_masks);
-  else if (TARGET_POPCNTD)
+  else if (TARGET_POWER7)
 rs6000_isa_flags |= (ISA_2_6_MASKS_EMBEDDED & ~ignore_masks);
   else if (TARGET_DFP)
 rs6000_isa_flags |= (ISA_2_5_MASKS_SERVER & ~ignore_masks);
@@ -4138,7 +4138,7 @@ rs6000_option_override_internal (bool global_init_p)
   else if (TARGET_LONG_DOUBLE_128)
 {
   if (global_options.x_rs6000_ieeequad
- && (!TARGET_POPCNTD || !TARGET_VSX))
+ && (!TARGET_POW

[gcc(refs/users/meissner/heads/work222)] Use power7 CPU option for power7 support instead of -mpopcntd

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:92896081780c51edba87dae59d67253f2e042ae7

commit 92896081780c51edba87dae59d67253f2e042ae7
Author: Michael Meissner 
Date:   Sun Sep 21 22:47:47 2025 -0400

Use power7 CPU option for power7 support instead of -mpopcntd

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/dfp.h (cmp_internal1): Use power7 CPU option
support instead of -mpopcntd, except for population count 
instructions.
* config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported):
Likewise.
* config/rs6000/rs6000-string.cc (expand_block_compare_gpr): 
Likewise.
* config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
Likewise.
(rs6000_option_override_internal): Likewise.
* config/rs6000/rs6000.h (TARGET_LDBRX): Likewise.
(TARGET_FCFID): Likewise.
(TARGET_LFIWZX): Likewise.
(TARGET_FCFIDS): Likewise.
(TARGET_FCFIDU): Likewise.
(TARGET_FCFIDUS): Likewise.
(TARGET_FCTIDUZ): Likewise.
(TARGET_FCTIWUZ): Likewise.
(TARGET_EXTRA_BUILTINS): Likewise.
(TARGET_POWER7): New macro.
* config/rs6000/rs6000.md (isa attribute): Use power7 CPU option 
support
instead of -mpopcntd, except for population count instructions.
(lrints): Likewise.
(lrintsi_di): Likewise.
(cmpmemsi): Likewise.
(bpermd_): Likewise.
(addg6s): Likewise.
(cdtbcd): Likewise.
(cbcdtd): Likewise.
(div_): Likewise.

Diff:
---
 gcc/config/rs6000/dfp.md|  2 +-
 gcc/config/rs6000/rs6000-builtin.cc |  4 ++--
 gcc/config/rs6000/rs6000-string.cc  |  4 ++--
 gcc/config/rs6000/rs6000.cc |  6 +++---
 gcc/config/rs6000/rs6000.h  | 20 +++-
 gcc/config/rs6000/rs6000.md | 18 +-
 6 files changed, 28 insertions(+), 26 deletions(-)

diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md
index 825e7c54e73e..4c6306c3c607 100644
--- a/gcc/config/rs6000/dfp.md
+++ b/gcc/config/rs6000/dfp.md
@@ -214,7 +214,7 @@
 (define_insn "floatdidd2"
   [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
(float:DD (match_operand:DI 1 "gpc_reg_operand" "d")))]
-  "TARGET_DFP && TARGET_POPCNTD"
+  "TARGET_DFP && TARGET_POWER7"
   "dcffix %0,%1"
   [(set_attr "type" "dfp")])
 
diff --git a/gcc/config/rs6000/rs6000-builtin.cc 
b/gcc/config/rs6000/rs6000-builtin.cc
index bc1580f051b0..dfbb7d02157b 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -161,9 +161,9 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins 
fncode)
 case ENB_P6_64:
   return TARGET_CMPB && TARGET_POWERPC64;
 case ENB_P7:
-  return TARGET_POPCNTD;
+  return TARGET_POWER7;
 case ENB_P7_64:
-  return TARGET_POPCNTD && TARGET_POWERPC64;
+  return TARGET_POWER7 && TARGET_POWERPC64;
 case ENB_P8:
   return TARGET_POWER8;
 case ENB_P8V:
diff --git a/gcc/config/rs6000/rs6000-string.cc 
b/gcc/config/rs6000/rs6000-string.cc
index 561297b0ba46..4ba7ef6bdb42 100644
--- a/gcc/config/rs6000/rs6000-string.cc
+++ b/gcc/config/rs6000/rs6000-string.cc
@@ -1948,8 +1948,8 @@ expand_block_compare_gpr(unsigned HOST_WIDE_INT bytes, 
unsigned int base_align,
 bool
 expand_block_compare (rtx operands[])
 {
-  /* TARGET_POPCNTD is already guarded at expand cmpmemsi.  */
-  gcc_assert (TARGET_POPCNTD);
+  /* TARGET_POWER7 is already guarded at expand cmpmemsi.  */
+  gcc_assert (TARGET_POWER7);
 
   /* For P8, this case is complicated to handle because the subtract
  with carry instructions do not generate the 64-bit carry and so
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index c599d864b3a7..484cd2b61e95 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -1927,7 +1927,7 @@ rs6000_hard_regno_mode_ok_uncached (int regno, 
machine_mode mode)
  if(GET_MODE_SIZE (mode) == UNITS_PER_FP_WORD)
return 1;
 
- if (TARGET_POPCNTD && mode == SImode)
+ if (TARGET_POWER7 && mode == SImode)
return 1;
 
  if (TARGET_P9_VECTOR && (mode == QImode || mode == HImode))
@@ -3925,7 +3925,7 @@ rs6000_option_override_internal (bool global_init_p)
 rs6000_isa_flags |= (ISA_2_7_MASKS_SERVER & ~ignore_masks);
   else if (TARGET_VSX)
 rs6000_isa_flags |= (ISA_2_6_MASKS_SERVER & ~ignore_masks);
-  else if (TARGET_POPCNTD)
+  else if (TARGET_POWER7)
 rs6000_isa_flags |= (ISA_2_6_MASKS_EMBEDDED & ~ignore_masks);
   else if (TARGET_DFP)
 rs6000_isa_flags |= (ISA_2_5_MASKS_SERVER & ~ignore_masks);
@@ -4138,7 +4138,7 @@ rs6000_option_override_internal (bool global_init_p)
   else if (TARGET_LONG_DOUBLE_128)
 {
   if (global_options.x_rs6000_ieeequad
- && (!TARGET_POPCNTD || !TARGET_VSX))
+ && (!TARGET_POW

[gcc(refs/users/meissner/heads/work222-bugs)] Merge commit 'refs/users/meissner/heads/work222-bugs' of git+ssh://gcc.gnu.org/git/gcc into me/work2

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:c2fb70da9355a20ca09780af72c2cd08e01b8d1f

commit c2fb70da9355a20ca09780af72c2cd08e01b8d1f
Merge: bf916747065a cc55e4d17d33
Author: Michael Meissner 
Date:   Sun Sep 21 22:14:12 2025 -0400

Merge commit 'refs/users/meissner/heads/work222-bugs' of 
git+ssh://gcc.gnu.org/git/gcc into me/work222-bugs

Diff:

[gcc(refs/users/meissner/heads/work222-bugs)] Add ChangeLog.bugs and update REVISION.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:bf916747065a7514c75c74d64fd5184776e93386

commit bf916747065a7514c75c74d64fd5184776e93386
Author: Michael Meissner 
Date:   Fri Sep 19 13:13:02 2025 -0400

Add ChangeLog.bugs and update REVISION.

2025-09-19  Michael Meissner  

gcc/

* ChangeLog.bugs: New file for branch.
* REVISION: Update.

Diff:
---
 gcc/ChangeLog.bugs | 14 ++
 gcc/REVISION   |  2 +-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.bugs b/gcc/ChangeLog.bugs
new file mode 100644
index ..6041f1156457
--- /dev/null
+++ b/gcc/ChangeLog.bugs
@@ -0,0 +1,14 @@
+ Branch work222-bugs, baseline 
+
+2025-09-19   Michael Meissner  
+
+Add ChangeLog.bugs and update REVISION.
+
+2025-09-19  Michael Meissner  
+
+gcc/
+
+   * ChangeLog.bugs: New file for branch.
+   * REVISION: Update.
+
+   Clone branch
diff --git a/gcc/REVISION b/gcc/REVISION
index 6cb180fd55bf..6d9b69b7ef4a 100644
--- a/gcc/REVISION
+++ b/gcc/REVISION
@@ -1 +1 @@
-work222 branch
+work222-bugs branch

[gcc(refs/users/meissner/heads/work222-test)] Add ChangeLog.test and update REVISION.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:d2549a9b12570b3dada0486aa041bffe39a0fd25

commit d2549a9b12570b3dada0486aa041bffe39a0fd25
Author: Michael Meissner 
Date:   Fri Sep 19 13:17:32 2025 -0400

Add ChangeLog.test and update REVISION.

2025-09-19  Michael Meissner  

gcc/

* ChangeLog.test: New file for branch.
* REVISION: Update.

Diff:
---
 gcc/ChangeLog.test | 14 ++
 gcc/REVISION   |  2 +-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.test b/gcc/ChangeLog.test
new file mode 100644
index ..423db3a167fb
--- /dev/null
+++ b/gcc/ChangeLog.test
@@ -0,0 +1,14 @@
+ Branch work222-test, baseline 
+
+2025-09-19   Michael Meissner  
+
+Add ChangeLog.test and update REVISION.
+
+2025-09-19  Michael Meissner  
+
+gcc/
+
+   * ChangeLog.test: New file for branch.
+   * REVISION: Update.
+
+   Clone branch
diff --git a/gcc/REVISION b/gcc/REVISION
index 6cb180fd55bf..bfe8490ee827 100644
--- a/gcc/REVISION
+++ b/gcc/REVISION
@@ -1 +1 @@
-work222 branch
+work222-test branch

[gcc(refs/users/meissner/heads/work222)] Update ChangeLog.*

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:71e186ade986d1ef3bfbe1566aad79b89e4b3870

commit 71e186ade986d1ef3bfbe1566aad79b89e4b3870
Author: Michael Meissner 
Date:   Sun Sep 21 22:04:54 2025 -0400

Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.meissner | 37 +
 1 file changed, 37 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 1cc58ef7235d..431f7c75ed76 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,40 @@
+ Branch work222, patch #19 
+
+Use power7 CPU option for power7 support instead of -mpopcntd
+
+2025-09-21  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/dfp.h (cmp_internal1): Use power7 CPU option
+   support instead of -mpopcntd, except for population count instructions.
+   * config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported):
+   Likewise.
+   * config/rs6000/rs6000-string.cc (expand_block_compare_gpr): Likewise.
+   * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
+   Likewise.
+   (rs6000_option_override_internal): Likewise.
+   * config/rs6000/rs6000.h (TARGET_LDBRX): Likewise.
+   (TARGET_FCFID): Likewise.
+   (TARGET_LFIWZX): Likewise.
+   (TARGET_FCFIDS): Likewise.
+   (TARGET_FCFIDU): Likewise.
+   (TARGET_FCFIDUS): Likewise.
+   (TARGET_FCTIDUZ): Likewise.
+   (TARGET_FCTIWUZ): Likewise.
+   (TARGET_EXTRA_BUILTINS): Likewise.
+   (TARGET_POWER7): New macro.
+   * config/rs6000/rs6000.md (isa attribute): Use power7 CPU option support
+   instead of -mpopcntd, except for population count instructions.
+   (lrints): Likewise.
+   (lrintsi_di): Likewise.
+   (cmpmemsi): Likewise.
+   (bpermd_): Likewise.
+   (addg6s): Likewise.
+   (cdtbcd): Likewise.
+   (cbcdtd): Likewise.
+   (div_): Likewise.
+
  Branch work222, patch #18 
 
 Remove -mpower8-internal support.

[gcc(refs/users/meissner/heads/work222-float)] Add ChangeLog.float and update REVISION.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:b37bf16b04747b6f49c534903e2915e6f1bc5844

commit b37bf16b04747b6f49c534903e2915e6f1bc5844
Author: Michael Meissner 
Date:   Fri Sep 19 13:16:34 2025 -0400

Add ChangeLog.float and update REVISION.

2025-09-19  Michael Meissner  

gcc/

* ChangeLog.float: New file for branch.
* REVISION: Update.

Diff:
---
 gcc/ChangeLog.float | 14 ++
 gcc/REVISION|  2 +-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.float b/gcc/ChangeLog.float
new file mode 100644
index ..71ac43512450
--- /dev/null
+++ b/gcc/ChangeLog.float
@@ -0,0 +1,14 @@
+ Branch work222-float, baseline 
+
+2025-09-19   Michael Meissner  
+
+Add ChangeLog.float and update REVISION.
+
+2025-09-19  Michael Meissner  
+
+gcc/
+
+   * ChangeLog.float: New file for branch.
+   * REVISION: Update.
+
+   Clone branch
diff --git a/gcc/REVISION b/gcc/REVISION
index 6cb180fd55bf..322a9f998d06 100644
--- a/gcc/REVISION
+++ b/gcc/REVISION
@@ -1 +1 @@
-work222 branch
+work222-float branch

[gcc/meissner/heads/work222-bugs] (44 commits) Merge commit 'refs/users/meissner/heads/work222-bugs' of gi

[Michael Meissner via Gcc-cvs]

The branch 'meissner/heads/work222-bugs' was updated to point to:

 c2fb70da9355... Merge commit 'refs/users/meissner/heads/work222-bugs' of gi

It previously pointed to:

 cc55e4d17d33... Add ChangeLog.bugs and update REVISION.

Diff:

Summary of changes (added commits):
---

  c2fb70d... Merge commit 'refs/users/meissner/heads/work222-bugs' of gi
  bf91674... Add ChangeLog.bugs and update REVISION.
  71e186a... Update ChangeLog.* (*)
  5449154... Use power7 CPU option for power7 support instead of -mpopcn (*)
  8fb3116... Update ChangeLog.* (*)
  cfe93a1... Remove -mpower8-internal support. (*)
  d99645a... Remove internal -mpower9-misc support. (*)
  2a15e78... Update ChangeLog.* (*)
  6d64a12... Remove internal -mpower10 support. (*)
  87d1c3a... Remove internal -mpower11 support. (*)
  26d48a8... Add -mcpu=future support. (*)
  9616b76... Move defining _ARCH_PWRx to use CPU options. (*)
  982aa1b... Move setting the assembler .machine directive to use CPU op (*)
  b85af88... Move clone attribute support to use CPU options. (*)
  f59edbc... Add cpu option flag bits (*)
  53a302b... Revert changes (*)
  c1aaca4... Update ChangeLog.* (*)
  290e543... Remove internal -mpower10 support. (*)
  9b6e7eb... Remove internal -mpower11 support. (*)
  7366e1b... Add -mcpu=future support. (*)
  22ffa94... Move defining _ARCH_PWRx to use CPU options. (*)
  7a43724... Move setting the assembler .machine directive to use CPU op (*)
  a68a4e3... Move clone attribute support to use CPU options. (*)
  f054fc8... Add cpu option flag bits (*)
  5248a79... Revert changes (*)
  07cbfbe... Update ChangeLog.* (*)
  b3b0c5f... Remove internal -mpower10 support. (*)
  e2a5800... Remove internal -mpower11 support. (*)
  1654aae... Add -mcpu=future support. (*)
  aac2852... Revert changes (*)
  e1de460... Add -mcpu=future support. (*)
  0520959... Move defining _ARCH_PWRx to use CPU options. (*)
  beacfdd... Move setting the assembler .machine directive to use CPU op (*)
  4150b46... Move clone attribute support to use CPU options. (*)
  feaaa86... Add cpu option flag bits (*)
  0566cd5... Revert changes (*)
  c43ecbc... Update ChangeLog.* (*)
  f70de71... Remove internal -mpower11 support. (*)
  a95469d... Update ChangeLog.* (*)
  960e882... Add -mcpu=future support. (*)
  50b297d... Add cpu option flag bits (*)
  971476c... Revert changes (*)
  239581e... Add -mcpu=future support. (*)
  3107708... Add cpu option flag bits (*)

(*) This commit already exists in another branch.
Because the reference `refs/users/meissner/heads/work222-bugs' matches
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[gcc/meissner/heads/work222-float] (44 commits) Merge commit 'refs/users/meissner/heads/work222-float' of g

[Michael Meissner via Gcc-cvs]

The branch 'meissner/heads/work222-float' was updated to point to:

 738b1e3f60f5... Merge commit 'refs/users/meissner/heads/work222-float' of g

It previously pointed to:

 6ef9706c7631... Add ChangeLog.float and update REVISION.

Diff:

Summary of changes (added commits):
---

  738b1e3... Merge commit 'refs/users/meissner/heads/work222-float' of g
  b37bf16... Add ChangeLog.float and update REVISION.
  71e186a... Update ChangeLog.* (*)
  5449154... Use power7 CPU option for power7 support instead of -mpopcn (*)
  8fb3116... Update ChangeLog.* (*)
  cfe93a1... Remove -mpower8-internal support. (*)
  d99645a... Remove internal -mpower9-misc support. (*)
  2a15e78... Update ChangeLog.* (*)
  6d64a12... Remove internal -mpower10 support. (*)
  87d1c3a... Remove internal -mpower11 support. (*)
  26d48a8... Add -mcpu=future support. (*)
  9616b76... Move defining _ARCH_PWRx to use CPU options. (*)
  982aa1b... Move setting the assembler .machine directive to use CPU op (*)
  b85af88... Move clone attribute support to use CPU options. (*)
  f59edbc... Add cpu option flag bits (*)
  53a302b... Revert changes (*)
  c1aaca4... Update ChangeLog.* (*)
  290e543... Remove internal -mpower10 support. (*)
  9b6e7eb... Remove internal -mpower11 support. (*)
  7366e1b... Add -mcpu=future support. (*)
  22ffa94... Move defining _ARCH_PWRx to use CPU options. (*)
  7a43724... Move setting the assembler .machine directive to use CPU op (*)
  a68a4e3... Move clone attribute support to use CPU options. (*)
  f054fc8... Add cpu option flag bits (*)
  5248a79... Revert changes (*)
  07cbfbe... Update ChangeLog.* (*)
  b3b0c5f... Remove internal -mpower10 support. (*)
  e2a5800... Remove internal -mpower11 support. (*)
  1654aae... Add -mcpu=future support. (*)
  aac2852... Revert changes (*)
  e1de460... Add -mcpu=future support. (*)
  0520959... Move defining _ARCH_PWRx to use CPU options. (*)
  beacfdd... Move setting the assembler .machine directive to use CPU op (*)
  4150b46... Move clone attribute support to use CPU options. (*)
  feaaa86... Add cpu option flag bits (*)
  0566cd5... Revert changes (*)
  c43ecbc... Update ChangeLog.* (*)
  f70de71... Remove internal -mpower11 support. (*)
  a95469d... Update ChangeLog.* (*)
  960e882... Add -mcpu=future support. (*)
  50b297d... Add cpu option flag bits (*)
  971476c... Revert changes (*)
  239581e... Add -mcpu=future support. (*)
  3107708... Add cpu option flag bits (*)

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Because the reference `refs/users/meissner/heads/work222-float' matches
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[gcc/meissner/heads/work222-dmf] (44 commits) Merge commit 'refs/users/meissner/heads/work222-dmf' of git

[Michael Meissner via Gcc-cvs]

The branch 'meissner/heads/work222-dmf' was updated to point to:

 5afaab2ff11d... Merge commit 'refs/users/meissner/heads/work222-dmf' of git

It previously pointed to:

 c63ea23efd42... Add ChangeLog.dmf and update REVISION.

Diff:

Summary of changes (added commits):
---

  5afaab2... Merge commit 'refs/users/meissner/heads/work222-dmf' of git
  00189d6... Add ChangeLog.dmf and update REVISION.
  71e186a... Update ChangeLog.* (*)
  5449154... Use power7 CPU option for power7 support instead of -mpopcn (*)
  8fb3116... Update ChangeLog.* (*)
  cfe93a1... Remove -mpower8-internal support. (*)
  d99645a... Remove internal -mpower9-misc support. (*)
  2a15e78... Update ChangeLog.* (*)
  6d64a12... Remove internal -mpower10 support. (*)
  87d1c3a... Remove internal -mpower11 support. (*)
  26d48a8... Add -mcpu=future support. (*)
  9616b76... Move defining _ARCH_PWRx to use CPU options. (*)
  982aa1b... Move setting the assembler .machine directive to use CPU op (*)
  b85af88... Move clone attribute support to use CPU options. (*)
  f59edbc... Add cpu option flag bits (*)
  53a302b... Revert changes (*)
  c1aaca4... Update ChangeLog.* (*)
  290e543... Remove internal -mpower10 support. (*)
  9b6e7eb... Remove internal -mpower11 support. (*)
  7366e1b... Add -mcpu=future support. (*)
  22ffa94... Move defining _ARCH_PWRx to use CPU options. (*)
  7a43724... Move setting the assembler .machine directive to use CPU op (*)
  a68a4e3... Move clone attribute support to use CPU options. (*)
  f054fc8... Add cpu option flag bits (*)
  5248a79... Revert changes (*)
  07cbfbe... Update ChangeLog.* (*)
  b3b0c5f... Remove internal -mpower10 support. (*)
  e2a5800... Remove internal -mpower11 support. (*)
  1654aae... Add -mcpu=future support. (*)
  aac2852... Revert changes (*)
  e1de460... Add -mcpu=future support. (*)
  0520959... Move defining _ARCH_PWRx to use CPU options. (*)
  beacfdd... Move setting the assembler .machine directive to use CPU op (*)
  4150b46... Move clone attribute support to use CPU options. (*)
  feaaa86... Add cpu option flag bits (*)
  0566cd5... Revert changes (*)
  c43ecbc... Update ChangeLog.* (*)
  f70de71... Remove internal -mpower11 support. (*)
  a95469d... Update ChangeLog.* (*)
  960e882... Add -mcpu=future support. (*)
  50b297d... Add cpu option flag bits (*)
  971476c... Revert changes (*)
  239581e... Add -mcpu=future support. (*)
  3107708... Add cpu option flag bits (*)

(*) This commit already exists in another branch.
Because the reference `refs/users/meissner/heads/work222-dmf' matches
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[gcc(refs/users/meissner/heads/work222-dmf)] Merge commit 'refs/users/meissner/heads/work222-dmf' of git+ssh://gcc.gnu.org/git/gcc into me/work22

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:5afaab2ff11d30f05a55b46c8c4d30791f6dceba

commit 5afaab2ff11d30f05a55b46c8c4d30791f6dceba
Merge: 00189d6a5113 c63ea23efd42
Author: Michael Meissner 
Date:   Sun Sep 21 22:15:32 2025 -0400

Merge commit 'refs/users/meissner/heads/work222-dmf' of 
git+ssh://gcc.gnu.org/git/gcc into me/work222-dmf

Diff:

[gcc(refs/users/meissner/heads/work222)] Revert changes

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:1e6db83e8f43481f392203e9e2636e6d27e76624

commit 1e6db83e8f43481f392203e9e2636e6d27e76624
Author: Michael Meissner 
Date:   Sun Sep 21 22:42:52 2025 -0400

Revert changes

Diff:
---
 gcc/config/rs6000/dfp.md|  2 +-
 gcc/config/rs6000/rs6000-builtin.cc |  4 ++--
 gcc/config/rs6000/rs6000-string.cc  |  4 ++--
 gcc/config/rs6000/rs6000.cc |  6 +++---
 gcc/config/rs6000/rs6000.h  | 20 +---
 gcc/config/rs6000/rs6000.md | 18 +-
 6 files changed, 26 insertions(+), 28 deletions(-)

diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md
index 4c6306c3c607..825e7c54e73e 100644
--- a/gcc/config/rs6000/dfp.md
+++ b/gcc/config/rs6000/dfp.md
@@ -214,7 +214,7 @@
 (define_insn "floatdidd2"
   [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
(float:DD (match_operand:DI 1 "gpc_reg_operand" "d")))]
-  "TARGET_DFP && TARGET_POWER7"
+  "TARGET_DFP && TARGET_POPCNTD"
   "dcffix %0,%1"
   [(set_attr "type" "dfp")])
 
diff --git a/gcc/config/rs6000/rs6000-builtin.cc 
b/gcc/config/rs6000/rs6000-builtin.cc
index dfbb7d02157b..bc1580f051b0 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -161,9 +161,9 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins 
fncode)
 case ENB_P6_64:
   return TARGET_CMPB && TARGET_POWERPC64;
 case ENB_P7:
-  return TARGET_POWER7;
+  return TARGET_POPCNTD;
 case ENB_P7_64:
-  return TARGET_POWER7 && TARGET_POWERPC64;
+  return TARGET_POPCNTD && TARGET_POWERPC64;
 case ENB_P8:
   return TARGET_POWER8;
 case ENB_P8V:
diff --git a/gcc/config/rs6000/rs6000-string.cc 
b/gcc/config/rs6000/rs6000-string.cc
index 4ba7ef6bdb42..561297b0ba46 100644
--- a/gcc/config/rs6000/rs6000-string.cc
+++ b/gcc/config/rs6000/rs6000-string.cc
@@ -1948,8 +1948,8 @@ expand_block_compare_gpr(unsigned HOST_WIDE_INT bytes, 
unsigned int base_align,
 bool
 expand_block_compare (rtx operands[])
 {
-  /* TARGET_POWER7 is already guarded at expand cmpmemsi.  */
-  gcc_assert (TARGET_POWER7);
+  /* TARGET_POPCNTD is already guarded at expand cmpmemsi.  */
+  gcc_assert (TARGET_POPCNTD);
 
   /* For P8, this case is complicated to handle because the subtract
  with carry instructions do not generate the 64-bit carry and so
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 241d18548209..c599d864b3a7 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -1927,7 +1927,7 @@ rs6000_hard_regno_mode_ok_uncached (int regno, 
machine_mode mode)
  if(GET_MODE_SIZE (mode) == UNITS_PER_FP_WORD)
return 1;
 
- if (TARGET_POWER7 && mode == SImode)
+ if (TARGET_POPCNTD && mode == SImode)
return 1;
 
  if (TARGET_P9_VECTOR && (mode == QImode || mode == HImode))
@@ -3925,7 +3925,7 @@ rs6000_option_override_internal (bool global_init_p)
 rs6000_isa_flags |= (ISA_2_7_MASKS_SERVER & ~ignore_masks);
   else if (TARGET_VSX)
 rs6000_isa_flags |= (ISA_2_6_MASKS_SERVER & ~ignore_masks);
-  else if (TARGET_POWER7)
+  else if (TARGET_POPCNTD)
 rs6000_isa_flags |= (ISA_2_6_MASKS_EMBEDDED & ~ignore_masks);
   else if (TARGET_DFP)
 rs6000_isa_flags |= (ISA_2_5_MASKS_SERVER & ~ignore_masks);
@@ -4138,7 +4138,7 @@ rs6000_option_override_internal (bool global_init_p)
   else if (TARGET_LONG_DOUBLE_128)
 {
   if (global_options.x_rs6000_ieeequad
- && (!TARGET_POWER7 || !TARGET_VSX))
+ && (!TARGET_POPCNTD || !TARGET_VSX))
error ("%qs requires full ISA 2.06 support", "-mabi=ieeelongdouble");
 
   if (rs6000_ieeequad != TARGET_IEEEQUAD_DEFAULT)
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 643aa2449318..1bd2ce53cc7b 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -443,7 +443,7 @@ extern int rs6000_vector_align[];
 #define TARGET_LONG_DOUBLE_128 (rs6000_long_double_type_size > 64)
 #define TARGET_IEEEQUAD rs6000_ieeequad
 #define TARGET_ALTIVEC_ABI rs6000_altivec_abi
-#define TARGET_LDBRX (TARGET_POWER7 || rs6000_cpu == PROCESSOR_CELL)
+#define TARGET_LDBRX (TARGET_POPCNTD || rs6000_cpu == PROCESSOR_CELL)
 
 /* ISA 2.01 allowed FCFID to be done in 32-bit, previously it was 64-bit only.
Enable 32-bit fcfid's on any of the switches for newer ISA machines.  */
@@ -451,17 +451,17 @@ extern int rs6000_vector_align[];
 || TARGET_PPC_GPOPT/* 970/power4 */\
 || TARGET_POPCNTB  /* ISA 2.02 */  \
 || TARGET_CMPB /* ISA 2.05 */  \
-|| TARGET_POWER7)  /* ISA 2.06 */
+|| TARGET_POPCNTD) /* ISA 2.06 */
 
 #define TARGET_FCTIDZ  TARGET_FCFID
 #define TARGET_STFIWX  TARGET_PPC_GFXOPT
 #define TARGET_LFIWAX  TARGET_CMPB
-#define TARGET_LFIWZX  TARGET_POWER7
-#define TARGET_FCFIDS  TARGET_POWER7
-#define TAR

[gcc(refs/users/meissner/heads/work222-sha)] Merge commit 'refs/users/meissner/heads/work222-sha' of git+ssh://gcc.gnu.org/git/gcc into me/work22

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:f90bcab5cc0cf8b3c4cbfc9e5bdcc640c7d816af

commit f90bcab5cc0cf8b3c4cbfc9e5bdcc640c7d816af
Merge: c329715c1031 949ea51e754a
Author: Michael Meissner 
Date:   Sun Sep 21 22:18:11 2025 -0400

Merge commit 'refs/users/meissner/heads/work222-sha' of 
git+ssh://gcc.gnu.org/git/gcc into me/work222-sha

Diff:

[gcc/meissner/heads/work222-bugs] (4 commits) Merge commit 'refs/users/meissner/heads/work222-bugs' of gi

[Michael Meissner via Gcc-cvs]

The branch 'meissner/heads/work222-bugs' was updated to point to:

 3e8be6063845... Merge commit 'refs/users/meissner/heads/work222-bugs' of gi

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 c2fb70da9355... Merge commit 'refs/users/meissner/heads/work222-bugs' of gi

Diff:

Summary of changes (added commits):
---

  3e8be60... Merge commit 'refs/users/meissner/heads/work222-bugs' of gi
  a82fd1c... Add ChangeLog.bugs and update REVISION.
  9289608... Use power7 CPU option for power7 support instead of -mpopcn (*)
  1e6db83... Revert changes (*)

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https://gcc.gnu.org/g:3e8be6063845ae9b7eb8dfd98adbbbc53a7ff876

commit 3e8be6063845ae9b7eb8dfd98adbbbc53a7ff876
Merge: a82fd1cfc363 c2fb70da9355
Author: Michael Meissner 
Date:   Sun Sep 21 22:49:47 2025 -0400

Merge commit 'refs/users/meissner/heads/work222-bugs' of 
git+ssh://gcc.gnu.org/git/gcc into me/work222-bugs

Diff:

[gcc(refs/users/meissner/heads/work222-bugs)] Add ChangeLog.bugs and update REVISION.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:a82fd1cfc3639ebf3edfb366542c581b69a66bbe

commit a82fd1cfc3639ebf3edfb366542c581b69a66bbe
Author: Michael Meissner 
Date:   Fri Sep 19 13:13:02 2025 -0400

Add ChangeLog.bugs and update REVISION.

2025-09-19  Michael Meissner  

gcc/

* ChangeLog.bugs: New file for branch.
* REVISION: Update.

Diff:
---
 gcc/ChangeLog.bugs | 14 ++
 gcc/REVISION   |  2 +-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.bugs b/gcc/ChangeLog.bugs
new file mode 100644
index ..6041f1156457
--- /dev/null
+++ b/gcc/ChangeLog.bugs
@@ -0,0 +1,14 @@
+ Branch work222-bugs, baseline 
+
+2025-09-19   Michael Meissner  
+
+Add ChangeLog.bugs and update REVISION.
+
+2025-09-19  Michael Meissner  
+
+gcc/
+
+   * ChangeLog.bugs: New file for branch.
+   * REVISION: Update.
+
+   Clone branch
diff --git a/gcc/REVISION b/gcc/REVISION
index 6cb180fd55bf..6d9b69b7ef4a 100644
--- a/gcc/REVISION
+++ b/gcc/REVISION
@@ -1 +1 @@
-work222 branch
+work222-bugs branch

[gcc/meissner/heads/work222-dmf] (4 commits) Merge commit 'refs/users/meissner/heads/work222-dmf' of git

[Michael Meissner via Gcc-cvs]

The branch 'meissner/heads/work222-dmf' was updated to point to:

 454a791f326f... Merge commit 'refs/users/meissner/heads/work222-dmf' of git

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 5afaab2ff11d... Merge commit 'refs/users/meissner/heads/work222-dmf' of git

Diff:

Summary of changes (added commits):
---

  454a791... Merge commit 'refs/users/meissner/heads/work222-dmf' of git
  8e8cf18... Add ChangeLog.dmf and update REVISION.
  9289608... Use power7 CPU option for power7 support instead of -mpopcn (*)
  1e6db83... Revert changes (*)

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[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:00189d6a511311a63cc3120be11b36672e332ff8

commit 00189d6a511311a63cc3120be11b36672e332ff8
Author: Michael Meissner 
Date:   Fri Sep 19 13:14:13 2025 -0400

Add ChangeLog.dmf and update REVISION.

2025-09-19  Michael Meissner  

gcc/

* ChangeLog.dmf: New file for branch.
* REVISION: Update.

Diff:
---
 gcc/ChangeLog.dmf | 14 ++
 gcc/REVISION  |  2 +-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.dmf b/gcc/ChangeLog.dmf
new file mode 100644
index ..b4db7c7713d3
--- /dev/null
+++ b/gcc/ChangeLog.dmf
@@ -0,0 +1,14 @@
+ Branch work222-dmf, baseline 
+
+2025-09-19   Michael Meissner  
+
+Add ChangeLog.dmf and update REVISION.
+
+2025-09-19  Michael Meissner  
+
+gcc/
+
+   * ChangeLog.dmf: New file for branch.
+   * REVISION: Update.
+
+   Clone branch
diff --git a/gcc/REVISION b/gcc/REVISION
index 6cb180fd55bf..913d03220302 100644
--- a/gcc/REVISION
+++ b/gcc/REVISION
@@ -1 +1 @@
-work222 branch
+work222-dmf branch

[gcc(refs/users/meissner/heads/work222-float)] Add ChangeLog.float and update REVISION.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:aae96d1118baa4dbb8b4943459ea4ea867417730

commit aae96d1118baa4dbb8b4943459ea4ea867417730
Author: Michael Meissner 
Date:   Fri Sep 19 13:16:34 2025 -0400

Add ChangeLog.float and update REVISION.

2025-09-19  Michael Meissner  

gcc/

* ChangeLog.float: New file for branch.
* REVISION: Update.

Diff:
---
 gcc/ChangeLog.float | 14 ++
 gcc/REVISION|  2 +-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.float b/gcc/ChangeLog.float
new file mode 100644
index ..71ac43512450
--- /dev/null
+++ b/gcc/ChangeLog.float
@@ -0,0 +1,14 @@
+ Branch work222-float, baseline 
+
+2025-09-19   Michael Meissner  
+
+Add ChangeLog.float and update REVISION.
+
+2025-09-19  Michael Meissner  
+
+gcc/
+
+   * ChangeLog.float: New file for branch.
+   * REVISION: Update.
+
+   Clone branch
diff --git a/gcc/REVISION b/gcc/REVISION
index 6cb180fd55bf..322a9f998d06 100644
--- a/gcc/REVISION
+++ b/gcc/REVISION
@@ -1 +1 @@
-work222 branch
+work222-float branch

[gcc(refs/users/meissner/heads/work222-dmf)] Add ChangeLog.dmf and update REVISION.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:8e8cf1806bd39da5dcdceefc5e125f3db8311bbd

commit 8e8cf1806bd39da5dcdceefc5e125f3db8311bbd
Author: Michael Meissner 
Date:   Fri Sep 19 13:14:13 2025 -0400

Add ChangeLog.dmf and update REVISION.

2025-09-19  Michael Meissner  

gcc/

* ChangeLog.dmf: New file for branch.
* REVISION: Update.

Diff:
---
 gcc/ChangeLog.dmf | 14 ++
 gcc/REVISION  |  2 +-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.dmf b/gcc/ChangeLog.dmf
new file mode 100644
index ..b4db7c7713d3
--- /dev/null
+++ b/gcc/ChangeLog.dmf
@@ -0,0 +1,14 @@
+ Branch work222-dmf, baseline 
+
+2025-09-19   Michael Meissner  
+
+Add ChangeLog.dmf and update REVISION.
+
+2025-09-19  Michael Meissner  
+
+gcc/
+
+   * ChangeLog.dmf: New file for branch.
+   * REVISION: Update.
+
+   Clone branch
diff --git a/gcc/REVISION b/gcc/REVISION
index 6cb180fd55bf..913d03220302 100644
--- a/gcc/REVISION
+++ b/gcc/REVISION
@@ -1 +1 @@
-work222 branch
+work222-dmf branch

[gcc/meissner/heads/work222-float] (4 commits) Merge commit 'refs/users/meissner/heads/work222-float' of g

[Michael Meissner via Gcc-cvs]

The branch 'meissner/heads/work222-float' was updated to point to:

 0f851f934921... Merge commit 'refs/users/meissner/heads/work222-float' of g

It previously pointed to:

 738b1e3f60f5... Merge commit 'refs/users/meissner/heads/work222-float' of g

Diff:

Summary of changes (added commits):
---

  0f851f9... Merge commit 'refs/users/meissner/heads/work222-float' of g
  aae96d1... Add ChangeLog.float and update REVISION.
  9289608... Use power7 CPU option for power7 support instead of -mpopcn (*)
  1e6db83... Revert changes (*)

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[gcc(refs/users/meissner/heads/work222-dmf)] Merge commit 'refs/users/meissner/heads/work222-dmf' of git+ssh://gcc.gnu.org/git/gcc into me/work22

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:454a791f326f762a9766e0c27c5dd26dbc7794d5

commit 454a791f326f762a9766e0c27c5dd26dbc7794d5
Merge: 8e8cf1806bd3 5afaab2ff11d
Author: Michael Meissner 
Date:   Sun Sep 21 22:50:58 2025 -0400

Merge commit 'refs/users/meissner/heads/work222-dmf' of 
git+ssh://gcc.gnu.org/git/gcc into me/work222-dmf

Diff:

[gcc/meissner/heads/work222-test] (44 commits) Merge commit 'refs/users/meissner/heads/work222-test' of gi

[Michael Meissner via Gcc-cvs]

The branch 'meissner/heads/work222-test' was updated to point to:

 e4bf435544d4... Merge commit 'refs/users/meissner/heads/work222-test' of gi

It previously pointed to:

 af095e5d9dc3... Add ChangeLog.test and update REVISION.

Diff:

Summary of changes (added commits):
---

  e4bf435... Merge commit 'refs/users/meissner/heads/work222-test' of gi
  d2549a9... Add ChangeLog.test and update REVISION.
  71e186a... Update ChangeLog.* (*)
  5449154... Use power7 CPU option for power7 support instead of -mpopcn (*)
  8fb3116... Update ChangeLog.* (*)
  cfe93a1... Remove -mpower8-internal support. (*)
  d99645a... Remove internal -mpower9-misc support. (*)
  2a15e78... Update ChangeLog.* (*)
  6d64a12... Remove internal -mpower10 support. (*)
  87d1c3a... Remove internal -mpower11 support. (*)
  26d48a8... Add -mcpu=future support. (*)
  9616b76... Move defining _ARCH_PWRx to use CPU options. (*)
  982aa1b... Move setting the assembler .machine directive to use CPU op (*)
  b85af88... Move clone attribute support to use CPU options. (*)
  f59edbc... Add cpu option flag bits (*)
  53a302b... Revert changes (*)
  c1aaca4... Update ChangeLog.* (*)
  290e543... Remove internal -mpower10 support. (*)
  9b6e7eb... Remove internal -mpower11 support. (*)
  7366e1b... Add -mcpu=future support. (*)
  22ffa94... Move defining _ARCH_PWRx to use CPU options. (*)
  7a43724... Move setting the assembler .machine directive to use CPU op (*)
  a68a4e3... Move clone attribute support to use CPU options. (*)
  f054fc8... Add cpu option flag bits (*)
  5248a79... Revert changes (*)
  07cbfbe... Update ChangeLog.* (*)
  b3b0c5f... Remove internal -mpower10 support. (*)
  e2a5800... Remove internal -mpower11 support. (*)
  1654aae... Add -mcpu=future support. (*)
  aac2852... Revert changes (*)
  e1de460... Add -mcpu=future support. (*)
  0520959... Move defining _ARCH_PWRx to use CPU options. (*)
  beacfdd... Move setting the assembler .machine directive to use CPU op (*)
  4150b46... Move clone attribute support to use CPU options. (*)
  feaaa86... Add cpu option flag bits (*)
  0566cd5... Revert changes (*)
  c43ecbc... Update ChangeLog.* (*)
  f70de71... Remove internal -mpower11 support. (*)
  a95469d... Update ChangeLog.* (*)
  960e882... Add -mcpu=future support. (*)
  50b297d... Add cpu option flag bits (*)
  971476c... Revert changes (*)
  239581e... Add -mcpu=future support. (*)
  3107708... Add cpu option flag bits (*)

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[gcc(refs/users/meissner/heads/work222-sha)] Add ChangeLog.sha and update REVISION.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:b3ac9b0d3cd03189996b471fb755dfd2ad494ab3

commit b3ac9b0d3cd03189996b471fb755dfd2ad494ab3
Author: Michael Meissner 
Date:   Fri Sep 19 13:15:23 2025 -0400

Add ChangeLog.sha and update REVISION.

2025-09-19  Michael Meissner  

gcc/

* ChangeLog.sha: New file for branch.
* REVISION: Update.

Diff:
---
 gcc/ChangeLog.sha | 14 ++
 gcc/REVISION  |  2 +-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.sha b/gcc/ChangeLog.sha
new file mode 100644
index ..bae8a264769e
--- /dev/null
+++ b/gcc/ChangeLog.sha
@@ -0,0 +1,14 @@
+ Branch work222-sha, baseline 
+
+2025-09-19   Michael Meissner  
+
+Add ChangeLog.sha and update REVISION.
+
+2025-09-19  Michael Meissner  
+
+gcc/
+
+   * ChangeLog.sha: New file for branch.
+   * REVISION: Update.
+
+   Clone branch
diff --git a/gcc/REVISION b/gcc/REVISION
index 6cb180fd55bf..2baec5f749f8 100644
--- a/gcc/REVISION
+++ b/gcc/REVISION
@@ -1 +1 @@
-work222 branch
+work222-sha branch

[gcc/meissner/heads/work222-sha] (4 commits) Merge commit 'refs/users/meissner/heads/work222-sha' of git

[Michael Meissner via Gcc-cvs]

The branch 'meissner/heads/work222-sha' was updated to point to:

 3ac23c2131e5... Merge commit 'refs/users/meissner/heads/work222-sha' of git

It previously pointed to:

 f90bcab5cc0c... Merge commit 'refs/users/meissner/heads/work222-sha' of git

Diff:

Summary of changes (added commits):
---

  3ac23c2... Merge commit 'refs/users/meissner/heads/work222-sha' of git
  b3ac9b0... Add ChangeLog.sha and update REVISION.
  9289608... Use power7 CPU option for power7 support instead of -mpopcn (*)
  1e6db83... Revert changes (*)

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[gcc(refs/users/meissner/heads/work222)] Move setting the assembler .machine directive to use CPU options.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:beacfdd2ac6457a10294096a3cfe63efdf4c26ec

commit beacfdd2ac6457a10294096a3cfe63efdf4c26ec
Author: Michael Meissner 
Date:   Sun Sep 21 03:29:41 2025 -0400

Move setting the assembler .machine directive to use CPU options.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000.cc (rs6000_machine_from_flags): Set the 
assembler
.machine name from CPU options for power11 through power6.

Diff:
---
 gcc/config/rs6000/rs6000.cc | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 93ed508e02da..6b49537976a2 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5929,17 +5929,17 @@ rs6000_machine_from_flags (void)
   flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL
 | OPTION_MASK_ALTIVEC);
 
-  if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
 return "power11";
-  if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER10_MASK) != 0)
 return "power10";
-  if ((flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER9_MASK) != 0)
 return "power9";
-  if ((flags & (ISA_2_7_MASKS_SERVER & ~ISA_2_6_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER8_MASK) != 0)
 return "power8";
-  if ((flags & (ISA_2_6_MASKS_SERVER & ~ISA_2_5_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER7_MASK) != 0)
 return "power7";
-  if ((flags & (ISA_2_5_MASKS_SERVER & ~ISA_2_4_MASKS)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER6_MASK) != 0)
 return "power6";
   if ((flags & (ISA_2_4_MASKS & ~ISA_2_1_MASKS)) != 0)
 return "power5";

[gcc r16-3781] ada: Tune description of Ghost_Assertion_Level

[Marc Poulhies via Gcc-cvs]

https://gcc.gnu.org/g:48f8e3027979088cacce27e0b552a59855940d87

commit r16-3781-g48f8e3027979088cacce27e0b552a59855940d87
Author: Piotr Trojanek 
Date:   Fri Aug 22 15:08:33 2025 +0200

ada: Tune description of Ghost_Assertion_Level

Fix grammar in comment.

gcc/ada/ChangeLog:

* einfo.ads (Ghost_Assertion_Level): Fix comment.

Diff:
---
 gcc/ada/einfo.ads | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/ada/einfo.ads b/gcc/ada/einfo.ads
index 6fbb76d4de04..669696d4bbb9 100644
--- a/gcc/ada/einfo.ads
+++ b/gcc/ada/einfo.ads
@@ -1467,8 +1467,8 @@ package Einfo is
 
 --Ghost_Assertion_Level
 --   Assertion level associated with the declaration of the entity. Its
---   value is either Empty for non-ghost entities. Standard_Level_Default
---   for Ghost entities without an assertion level or a user defined
+--   value is either Empty for non-ghost entities, Standard_Level_Default
+--   for Ghost entities without an assertion level, or a user-defined
 --   assertion level.
 
 --Has_Aliased_Components [implementation base type only]

[gcc/meissner/heads/work222-test] (4 commits) Merge commit 'refs/users/meissner/heads/work222-test' of gi

[Michael Meissner via Gcc-cvs]

The branch 'meissner/heads/work222-test' was updated to point to:

 2524c60ff786... Merge commit 'refs/users/meissner/heads/work222-test' of gi

It previously pointed to:

 e4bf435544d4... Merge commit 'refs/users/meissner/heads/work222-test' of gi

Diff:

Summary of changes (added commits):
---

  2524c60... Merge commit 'refs/users/meissner/heads/work222-test' of gi
  03c6026... Add ChangeLog.test and update REVISION.
  9289608... Use power7 CPU option for power7 support instead of -mpopcn (*)
  1e6db83... Revert changes (*)

(*) This commit already exists in another branch.
Because the reference `refs/users/meissner/heads/work222-test' matches
your hooks.email-new-commits-only configuration,
no separate email is sent for this commit.

[gcc(refs/users/meissner/heads/work222-test)] Merge commit 'refs/users/meissner/heads/work222-test' of git+ssh://gcc.gnu.org/git/gcc into me/work2

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:2524c60ff78691678455e8697f0288056ee6122f

commit 2524c60ff78691678455e8697f0288056ee6122f
Merge: 03c6026c4446 e4bf435544d4
Author: Michael Meissner 
Date:   Sun Sep 21 22:54:22 2025 -0400

Merge commit 'refs/users/meissner/heads/work222-test' of 
git+ssh://gcc.gnu.org/git/gcc into me/work222-test

Diff:

[gcc(refs/users/meissner/heads/work222-sha)] Merge commit 'refs/users/meissner/heads/work222-sha' of git+ssh://gcc.gnu.org/git/gcc into me/work22

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:3ac23c2131e574d7d84cb9182b159f4594159a93

commit 3ac23c2131e574d7d84cb9182b159f4594159a93
Merge: b3ac9b0d3cd0 f90bcab5cc0c
Author: Michael Meissner 
Date:   Sun Sep 21 22:53:15 2025 -0400

Merge commit 'refs/users/meissner/heads/work222-sha' of 
git+ssh://gcc.gnu.org/git/gcc into me/work222-sha

Diff:

[gcc(refs/users/meissner/heads/work222-test)] Add ChangeLog.test and update REVISION.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:03c6026c4446b21fafd37717f2f14d6003e1376b

commit 03c6026c4446b21fafd37717f2f14d6003e1376b
Author: Michael Meissner 
Date:   Fri Sep 19 13:17:32 2025 -0400

Add ChangeLog.test and update REVISION.

2025-09-19  Michael Meissner  

gcc/

* ChangeLog.test: New file for branch.
* REVISION: Update.

Diff:
---
 gcc/ChangeLog.test | 14 ++
 gcc/REVISION   |  2 +-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.test b/gcc/ChangeLog.test
new file mode 100644
index ..423db3a167fb
--- /dev/null
+++ b/gcc/ChangeLog.test
@@ -0,0 +1,14 @@
+ Branch work222-test, baseline 
+
+2025-09-19   Michael Meissner  
+
+Add ChangeLog.test and update REVISION.
+
+2025-09-19  Michael Meissner  
+
+gcc/
+
+   * ChangeLog.test: New file for branch.
+   * REVISION: Update.
+
+   Clone branch
diff --git a/gcc/REVISION b/gcc/REVISION
index 6cb180fd55bf..bfe8490ee827 100644
--- a/gcc/REVISION
+++ b/gcc/REVISION
@@ -1 +1 @@
-work222 branch
+work222-test branch

[gcc(refs/users/meissner/heads/work222-float)] Merge commit 'refs/users/meissner/heads/work222-float' of git+ssh://gcc.gnu.org/git/gcc into me/work

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:738b1e3f60f59291f8354dd89d67a9c6603f91ab

commit 738b1e3f60f59291f8354dd89d67a9c6603f91ab
Merge: b37bf16b0474 6ef9706c7631
Author: Michael Meissner 
Date:   Sun Sep 21 22:16:43 2025 -0400

Merge commit 'refs/users/meissner/heads/work222-float' of 
git+ssh://gcc.gnu.org/git/gcc into me/work222-float

Diff:

[gcc(refs/users/meissner/heads/work222-float)] Merge commit 'refs/users/meissner/heads/work222-float' of git+ssh://gcc.gnu.org/git/gcc into me/work

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:0f851f934921cf6a365c93450a38969ec737b590

commit 0f851f934921cf6a365c93450a38969ec737b590
Merge: aae96d1118ba 738b1e3f60f5
Author: Michael Meissner 
Date:   Sun Sep 21 22:52:07 2025 -0400

Merge commit 'refs/users/meissner/heads/work222-float' of 
git+ssh://gcc.gnu.org/git/gcc into me/work222-float

Diff:

[gcc r16-4016] Fortran: Fix error recovery after missing END BLOCK [PR103508]

[Paul Thomas via Gcc-cvs]

https://gcc.gnu.org/g:5e6937b9ab4f752c22b4e2fd0e01836a0df24653

commit r16-4016-g5e6937b9ab4f752c22b4e2fd0e01836a0df24653
Author: Paul Thomas 
Date:   Mon Sep 22 07:33:07 2025 +0100

Fortran: Fix error recovery after missing END BLOCK [PR103508]

2025-09-22  Steve Kargl  

gcc/fortran
PR fortran/103508
* decl.cc (gfc_match_end): Remove only the current partial
rather than removing the entire sibling chain.

gcc/testsuite/
PR fortran/103508
* gfortran.dg/pr103508.f90: New test.

Diff:
---
 gcc/fortran/decl.cc|  2 +-
 gcc/testsuite/gfortran.dg/pr103508.f90 | 22 ++
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/gcc/fortran/decl.cc b/gcc/fortran/decl.cc
index 996449390563..102c6a8e8df8 100644
--- a/gcc/fortran/decl.cc
+++ b/gcc/fortran/decl.cc
@@ -8986,7 +8986,7 @@ cleanup:
   /* If we are missing an END BLOCK, we created a half-ready namespace.
  Remove it from the parent namespace's sibling list.  */
 
-  while (state == COMP_BLOCK && !got_matching_end)
+  if (state == COMP_BLOCK && !got_matching_end)
 {
   parent_ns = gfc_current_ns->parent;
 
diff --git a/gcc/testsuite/gfortran.dg/pr103508.f90 
b/gcc/testsuite/gfortran.dg/pr103508.f90
new file mode 100644
index ..541b9b2d1f03
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr103508.f90
@@ -0,0 +1,22 @@
+! { dg-do compile }
+!
+! Check the fix for PR103508. As noted in comment 6 of the PR, the bug
+! has nothing to do with PDTs. However, the contributor's test has been
+! retained.
+!
+! Contributed by Gerhard Steinmetz  
+!
+program p
+   type t
+  integer :: n = 1
+  character(3) :: c
+   end type
+   block
+  block
+ type(t) :: x
+ x%c = 'abc'
+ print *, len(x%c)
+  end ! { dg-error "END BLOCK statement expected" }
+   end! { dg-error "END BLOCK statement expected" }
+end
+! { dg-error "Unexpected end of file" "" { target "*-*-*" } 0 }

[gcc r16-4006] Fortran: fix issues with rank-2 deferred-length character arrays [PR108581]

[Harald Anlauf via Gcc-cvs]

https://gcc.gnu.org/g:749af11149623dbf9ba026fd98bd7f31409fdaed

commit r16-4006-g749af11149623dbf9ba026fd98bd7f31409fdaed
Author: Harald Anlauf 
Date:   Sat Sep 20 22:20:25 2025 +0200

Fortran: fix issues with rank-2 deferred-length character arrays [PR108581]

PR fortran/108581

gcc/fortran/ChangeLog:

* trans-array.cc (gfc_conv_expr_descriptor): Take the dynamic
string length into account when deriving the dataptr offset for
a deferred-length character array.

gcc/testsuite/ChangeLog:

* gfortran.dg/deferred_character_39.f90: New test.

Diff:
---
 gcc/fortran/trans-array.cc |  13 ++
 .../gfortran.dg/deferred_character_39.f90  | 239 +
 2 files changed, 252 insertions(+)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index abde05f5dded..0111c9566f41 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -8912,6 +8912,19 @@ gfc_conv_expr_descriptor (gfc_se *se, gfc_expr *expr)
  gfc_rank_cst[dim], stride);
}
 
+  /* For deferred-length character we need to take the dynamic length
+into account for the dataptr offset.  */
+  if (expr->ts.type == BT_CHARACTER
+ && expr->ts.deferred
+ && expr->ts.u.cl->backend_decl
+ && VAR_P (expr->ts.u.cl->backend_decl))
+   {
+ tree base_type = TREE_TYPE (base);
+ base = fold_build2_loc (input_location, MULT_EXPR, base_type, base,
+ fold_convert (base_type,
+   expr->ts.u.cl->backend_decl));
+   }
+
   for (n = loop.dimen; n < loop.dimen + codim; n++)
{
  from = loop.from[n];
diff --git a/gcc/testsuite/gfortran.dg/deferred_character_39.f90 
b/gcc/testsuite/gfortran.dg/deferred_character_39.f90
new file mode 100644
index ..564f94bb9bde
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/deferred_character_39.f90
@@ -0,0 +1,239 @@
+! { dg-do run }
+! PR fortran/108581 - issues with rank-2 deferred-length character arrays
+
+program p
+  call pr108581
+  call test2
+end
+
+! Derived from original testcase
+subroutine pr108581
+  integer, parameter :: xmin = 0, xmax = 0
+  integer, parameter :: ymin = 0, ymax = 1
+  integer, parameter :: l = 2
+  integer:: x, y
+  character(8)   :: line1, line2, line3
+  character(*),   parameter :: expect(ymin:ymax) = ['A.','B*']
+  character(len=:), pointer :: a(:,:) => NULL()
+
+  allocate (character(len=l) :: a(xmin:xmax, ymin:ymax))
+  a(xmin:xmax, ymin) = expect(ymin)
+  a(xmin:xmax, ymax) = expect(ymax)
+
+  do y = ymin, ymax
+ write(line1,'(4A)') (a(x, y), x = xmin, xmax)
+ write(line2,'(4A)')  a(xmin:xmax, y)
+ write(line3,'(4A)')  a(:, y)
+ if (line1 /= expect(y) .or. &
+ line2 /= expect(y) .or. &
+ line3 /= expect(y)  ) then
+write(*,*) (a(x, y), x = xmin, xmax)
+write(*,*)  a(xmin:xmax, y)
+write(*,*)  a(:, y)
+stop 1 + y
+ end if
+  enddo
+  call chk (a)
+  deallocate (a)
+contains
+  subroutine chk (z)
+character(len=:), pointer :: z(:,:)
+integer :: y
+do y = lbound(z,2), ubound (z,2)
+   write(line2,'(4A)')  z(xmin:xmax, y)
+   write(line3,'(4A)')  z(:, y)
+   if (line2 /= expect(y) .or. &
+   line3 /= expect(y)  ) then
+  write(*,*) z(xmin:xmax, y)
+  write(*,*) z(:, y)
+  stop 5 + y
+   end if
+enddo
+  end subroutine chk
+end
+
+! Exercise character kinds, strides, ...
+subroutine test2
+  implicit none
+  integer, parameter :: l = 3
+  integer:: i
+
+  character(len=l,kind=1), parameter :: str1(*) = &
+   [   "123",   "456",   "789",   "0AB" ]
+  character(len=l,kind=4), parameter :: str4(*) = &
+   [ 4_"123", 4_"456", 4_"789", 4_"0AB" ]
+
+  character(len=l,kind=1), parameter :: str2(*,*) = &
+   reshape ([(str1(i),str1(5-i),i=1,4)], shape=[2,4])
+  character(len=l,kind=4), parameter :: str5(*,*) = &
+   reshape ([(str4(i),str4(5-i),i=1,4)], shape=[2,4])
+
+  character(len=l,kind=1), pointer :: a(:,:) => NULL(), e(:,:) => NULL()
+  character(len=:,kind=1), pointer :: b(:,:) => NULL(), f(:,:) => NULL()
+  character(len=l,kind=4), pointer :: c(:,:) => NULL(), g(:,:) => NULL()
+  character(len=:,kind=4), pointer :: d(:,:) => NULL(), h(:,:) => NULL()
+
+  character(len=16) :: s0, s1, s2, s3, s4
+
+  ! Simple case: shape=[1,4]
+  allocate (a, source = reshape (str1,[1,size(str1)]))
+  allocate (b, source = reshape (str1,[1,size(str1)]))
+  allocate (c, source = reshape (str4,[1,size(str4)]))
+! allocate (d, source=c)! ICE, tracked as pr121939
+  d => c
+  ! Positive non-unit stride
+  s0 = concat (str1(1::2))
+  write(s1,'(4A)') a(1,1::2)
+  write(s2,'(4A)') b(1,1::2)
+  write(s3,'(4A)') c(1,1::2)
+  write(s4,'(4A)

[gcc(refs/users/meissner/heads/work222)] Remove internal -mpower10 support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:b3b0c5fa53890ee16820623a2b1ce301b21fe849

commit b3b0c5fa53890ee16820623a2b1ce301b21fe849
Author: Michael Meissner 
Date:   Sun Sep 21 04:12:33 2025 -0400

Remove internal -mpower10 support.

2025-09-21  Michael Meissner  

gcc/

* config/rs6000/rs6000-cpus.def (POWER10_MASKS_SERVER): Drop 
-mpower10
ISA option.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.cc (rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.h (TARGET_POWER10): New macro.
* config/rs6000/rs6000.opt (-mpower10): Drop power11 from being an 
ISA
option.

Diff:
---
 gcc/config/rs6000/rs6000-cpus.def | 2 --
 gcc/config/rs6000/rs6000.cc   | 1 -
 gcc/config/rs6000/rs6000.h| 2 ++
 gcc/config/rs6000/rs6000.opt  | 2 +-
 4 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 8d008265db19..71e6edf5ef27 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -119,7 +119,6 @@
 | OPTION_MASK_PREFIXED)
 
 #define ISA_3_1_MASKS_SERVER   (ISA_3_0_MASKS_SERVER   \
-| OPTION_MASK_POWER10  \
 | OTHER_POWER10_MASKS)
 
 #define POWER11_MASKS_SERVER   ISA_3_1_MASKS_SERVER
@@ -164,7 +163,6 @@
 | OPTION_MASK_FLOAT128_HW  \
 | OPTION_MASK_FLOAT128_KEYWORD \
 | OPTION_MASK_FPRND\
-| OPTION_MASK_POWER10  \
 | OPTION_MASK_P10_FUSION   \
 | OPTION_MASK_HTM  \
 | OPTION_MASK_ISEL \
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 5daca441c71a..440b76140bfc 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -24481,7 +24481,6 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128",OPTION_MASK_FLOAT128_KEYWORD,   false, 
true  },
   { "float128-hardware",   OPTION_MASK_FLOAT128_HW,false, true  },
   { "fprnd",   OPTION_MASK_FPRND,  false, true  },
-  { "power10", OPTION_MASK_POWER10,false, true  },
   { "hard-dfp",OPTION_MASK_DFP,false, 
true  },
   { "htm", OPTION_MASK_HTM,false, true  },
   { "isel",OPTION_MASK_ISEL,   false, true  },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 78c674b1e05d..1d63d5f1ca38 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -558,6 +558,8 @@ extern int rs6000_vector_align[];
 
 /* ISA bits that are set via -mcpu=, but that do not have an associated
switch with the option.  */
+#define TARGET_POWER10 \
+  ((rs6000_cpu_option_flags & CPU_OPTION_POWER10_MASK) != 0)
 #define TARGET_POWER11 \
   ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
 #define TARGET_FUTURE  \
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index fb323beff9b4..451afabe2c1f 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -596,7 +596,7 @@ mspeculate-indirect-jumps
 Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save
 
 mpower10
-Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
+Target Undocumented WarnRemoved
 
 mpower11
 Target Undocumented WarnRemoved

[gcc(refs/users/aoliva/heads/testme)] aarch64: move pr113356.C under g++.target

[Alexandre Oliva via Gcc-cvs]

https://gcc.gnu.org/g:0d2b3ca4a9d2b2dfdaf6b179b8f0eae8f311f033

commit 0d2b3ca4a9d2b2dfdaf6b179b8f0eae8f311f033
Author: Clément Chigot 
Date:   Wed Sep 10 19:59:00 2025 -0300

aarch64: move pr113356.C under g++.target

This test requires a C++ compiler.

for gcc/testsuite/ChangeLog

* gcc.target/aarch64/pr113356.C: Move to ...
* g++.target/aarch64/pr113356.C: ... here.

Diff:
---
 gcc/testsuite/{gcc.target => g++.target}/aarch64/pr113356.C | 0
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/gcc/testsuite/gcc.target/aarch64/pr113356.C 
b/gcc/testsuite/g++.target/aarch64/pr113356.C
similarity index 100%
rename from gcc/testsuite/gcc.target/aarch64/pr113356.C
rename to gcc/testsuite/g++.target/aarch64/pr113356.C

[gcc r16-4008] Fix test case and add errors for when -fexternal-blas64 makse no sense.

[Thomas Koenig via Gcc-cvs]

https://gcc.gnu.org/g:0f28eb8ab909712aaf6517c0c818e5b36de32383

commit r16-4008-g0f28eb8ab909712aaf6517c0c818e5b36de32383
Author: Thomas Koenig 
Date:   Sun Sep 21 14:46:35 2025 +0200

Fix test case and add errors for when -fexternal-blas64 makse no sense.

-fexternal-blas64 requires front-end optimization to be turned on.
This patch issues a hard error if this is not the case, and also issues
an error on not-64 bit systems, where specifying it would make no sense,
and lead to errors.  Finally, this makes sure that the test is only 
performed
on 64-bit systems.

I tried creating test cases for the hard errors for the wrong option
combinations, but didn't succeed; see the thread on the gcc mailing
list on that topic.  These can always be added afterwards.

gcc/fortran/ChangeLog:

PR fortran/121161
* invoke.texi: Mention that -ffrontend-optimize is required
for -fexternal-blas64.
* options.cc (gfc_post_options): Fatal error if -fexternal-blas64
is specified without -ffrontend-optimize.
* trans-types.cc (gfc_init_kinds): Fatal error if -fexternal-blas64
is specified on a system which does not have 64-bit ptrdiff_t.

gcc/testsuite/ChangeLog:

PR fortran/121161
* gfortran.dg/matmul_blas_3.f90: Add effective target lp64.

Diff:
---
 gcc/fortran/invoke.texi | 3 ++-
 gcc/fortran/options.cc  | 3 +++
 gcc/fortran/trans-types.cc  | 3 +++
 gcc/testsuite/gfortran.dg/matmul_blas_3.f90 | 1 +
 4 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/gcc/fortran/invoke.texi b/gcc/fortran/invoke.texi
index d62ee819997f..a65f2d1cc34f 100644
--- a/gcc/fortran/invoke.texi
+++ b/gcc/fortran/invoke.texi
@@ -2027,7 +2027,8 @@ limit (see @option{-fblas-matmul-limit}).  This may be 
profitable if an
 optimized vendor BLAS library is available.  The BLAS library has
 to be specified at link time.  This option specifies a BLAS library
 with integer arguments of @code{KIND=8} (64 bits). It cannot be used
-together with @option{-fexternal-blas}.
+together with @option{-fexternal-blas}, and requires a 64-bit system.
+This option also requires @option{-ffrontend-optimize}.
 
 @opindex fblas-matmul-limit
 @item -fblas-matmul-limit=@var{n}
diff --git a/gcc/fortran/options.cc b/gcc/fortran/options.cc
index 35c1924a9c9b..21839ef4a4f9 100644
--- a/gcc/fortran/options.cc
+++ b/gcc/fortran/options.cc
@@ -515,6 +515,9 @@ gfc_post_options (const char **pfilename)
   if (flag_frontend_optimize == -1)
 flag_frontend_optimize = optimize && !optimize_debug;
 
+  if (flag_external_blas64 && !flag_frontend_optimize)
+gfc_fatal_error ("-ffrontend-optimize required for -fexternal-blas64");
+
   /* Same for front end loop interchange.  */
 
   if (flag_frontend_loop_interchange == -1)
diff --git a/gcc/fortran/trans-types.cc b/gcc/fortran/trans-types.cc
index 1754d9821532..a9e512ed135d 100644
--- a/gcc/fortran/trans-types.cc
+++ b/gcc/fortran/trans-types.cc
@@ -800,6 +800,9 @@ gfc_init_kinds (void)
 
   gfc_index_integer_kind = get_int_kind_from_name (PTRDIFF_TYPE);
 
+  if (flag_external_blas64 && gfc_index_integer_kind != gfc_integer_8_kind)
+gfc_fatal_error ("-fexternal-blas64 requires a 64-bit system");
+
   /* Pick a kind the same size as the C "int" type.  */
   gfc_c_int_kind = INT_TYPE_SIZE / 8;
 
diff --git a/gcc/testsuite/gfortran.dg/matmul_blas_3.f90 
b/gcc/testsuite/gfortran.dg/matmul_blas_3.f90
index d496596b5dab..bf02a38c458c 100644
--- a/gcc/testsuite/gfortran.dg/matmul_blas_3.f90
+++ b/gcc/testsuite/gfortran.dg/matmul_blas_3.f90
@@ -1,5 +1,6 @@
 ! { dg-do compile }
 ! { dg-options "-ffrontend-optimize -fexternal-blas64 -fdump-tree-original" }
+! { dg-require-effective-target lp64 }
 ! PR 121161 - option for 64-bit BLAS for MATMUL.
 ! Check this by making sure there is no KIND=4 integer.
 subroutine foo(a,b,c,n)

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Refactoring set_dimension_fields

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:697c5d6a2f7b525dc23eea03e2d52a27388e0066

commit 697c5d6a2f7b525dc23eea03e2d52a27388e0066
Author: Mikael Morin 
Date:   Sat Aug 16 16:28:37 2025 +0200

Refactoring set_dimension_fields

Diff:
---
 gcc/fortran/trans-descriptor.cc | 46 -
 1 file changed, 27 insertions(+), 19 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index cddffac71246..65ebfeb504a6 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -1017,6 +1017,25 @@ set_dimension_bounds (stmtblock_t * block, tree descr, 
tree dim,
 }
 
 
+static void
+set_dimension_fields (stmtblock_t * block, tree descr, tree dim,
+ tree lbound, tree ubound, tree stride, tree *offset)
+{
+  stride = gfc_evaluate_now (stride, block);
+  set_dimension_bounds (block, descr, dim, lbound, ubound, stride, offset);
+  gfc_conv_descriptor_stride_set (block, descr, dim, stride);
+}
+
+
+static void
+set_dimension_fields (stmtblock_t * block, tree descr, tree dim,
+ tree lbound, tree ubound, tree stride, tree offset_var)
+{
+  stride = gfc_evaluate_now (stride, block);
+  set_dimension_bounds (block, descr, dim, lbound, ubound, stride, offset_var);
+  gfc_conv_descriptor_stride_set (block, descr, dim, stride);
+}
+
 static void
 shift_dimension_bounds (stmtblock_t * block, tree descr, tree dim,
tree new_lbound, tree orig_lbound, tree orig_ubound,
@@ -1496,22 +1515,13 @@ gfc_conv_remap_descriptor (stmtblock_t *block, tree 
dest, int dest_rank,
   gfc_add_block_to_block (block, &lower_se.post);
   gfc_add_block_to_block (block, &upper_se.post);
 
-  /* Set bounds in descriptor.  */
-  gfc_conv_descriptor_lbound_set (block, dest, gfc_rank_cst[dim], lbound);
-  gfc_conv_descriptor_ubound_set (block, dest, gfc_rank_cst[dim], ubound);
-
-  /* Set stride.  */
   stride = gfc_evaluate_now (stride, block);
-  gfc_conv_descriptor_stride_set (block, dest, gfc_rank_cst[dim], stride);
 
-  /* Update offset.  */
-  tree tmp = fold_build2_loc (input_location, MULT_EXPR,
- gfc_array_index_type, lbound, stride);
-  offset = fold_build2_loc (input_location, MINUS_EXPR,
-   gfc_array_index_type, offset, tmp);
+  set_dimension_fields (block, dest, gfc_rank_cst[dim],
+   lbound, ubound, stride, &offset);
 
   /* Update stride.  */
-  tmp = gfc_conv_array_extent_dim (lbound, ubound, NULL);
+  tree tmp = gfc_conv_array_extent_dim (lbound, ubound, NULL);
   stride = fold_build2_loc (input_location, MULT_EXPR,
gfc_array_index_type, stride, tmp);
 }
@@ -1852,15 +1862,13 @@ set_gfc_dimension_from_cfi (stmtblock_t *block, tree 
gfc, tree cfi, tree idx,
 {
   /* gfc->dim[i].stride = cfi->dim[i].sm / cfi>elem_len */
   tmp = gfc_get_cfi_dim_sm (cfi, idx);
-  tmp = fold_build2_loc (input_location, TRUNC_DIV_EXPR,
-gfc_array_index_type, tmp,
-fold_convert (gfc_array_index_type,
-  gfc_get_cfi_desc_elem_len (cfi)));
-  stride = gfc_evaluate_now (tmp, block);
+  stride = fold_build2_loc (input_location, TRUNC_DIV_EXPR,
+   gfc_array_index_type, tmp,
+   fold_convert (gfc_array_index_type,
+ gfc_get_cfi_desc_elem_len (cfi)));
 }
 
-  set_dimension_bounds (block, gfc, idx, lbound, ubound, stride, offset_var);
-  gfc_conv_descriptor_stride_set (block, gfc, idx, stride);
+  set_dimension_fields (block, gfc, idx, lbound, ubound, stride, offset_var);
 }

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Factorisation set_dimension_fields gfc_set_descriptor_with_shape

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:efcf7f5ef0edf4b6985a426e16b82097af2378c7

commit efcf7f5ef0edf4b6985a426e16b82097af2378c7
Author: Mikael Morin 
Date:   Sat Aug 16 18:19:27 2025 +0200

Factorisation set_dimension_fields gfc_set_descriptor_with_shape

Correction régression c_f_pointer_tests_4

Diff:
---
 gcc/fortran/trans-descriptor.cc | 18 --
 1 file changed, 4 insertions(+), 14 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index ce7495ab1f34..6ada111b9e6e 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -1995,15 +1995,12 @@ gfc_set_descriptor_with_shape (stmtblock_t *block, tree 
desc, tree ptr,
   gfc_conv_expr (&lowerse, lower);
   gfc_add_block_to_block (&body, &lowerse.pre);
   lbound = fold_convert (gfc_array_index_type, lowerse.expr);
+  lbound = gfc_evaluate_now (lbound, &body);
   gfc_add_block_to_block (&body, &lowerse.post);
 }
   else
 lbound = gfc_index_one_node;
 
-  /* Set bounds and stride.  */
-  gfc_conv_descriptor_lbound_set (&body, desc, dim, lbound);
-  gfc_conv_descriptor_stride_set (&body, desc, dim, stride);
-
   gfc_conv_expr (&shapese, shape);
   gfc_add_block_to_block (&body, &shapese.pre);
   tree shapeval = fold_convert (gfc_array_index_type, shapese.expr);
@@ -2012,29 +2009,22 @@ gfc_set_descriptor_with_shape (stmtblock_t *block, tree 
desc, tree ptr,
 lbound, gfc_index_one_node);
   tree ubound = fold_build2_loc (input_location, PLUS_EXPR,
 gfc_array_index_type, tmp, shapeval);
-  gfc_conv_descriptor_ubound_set (&body, desc, dim, ubound);
+  ubound = gfc_evaluate_now (ubound, &body);
   gfc_add_block_to_block (&body, &shapese.post);
 
-  /* Calculate offset.  */
-  tmp = fold_build2_loc (input_location, MULT_EXPR, gfc_array_index_type,
-stride, lbound);
-  gfc_add_modify (&body, offset,
- fold_build2_loc (input_location, PLUS_EXPR,
-  gfc_array_index_type, offset, tmp));
+  set_dimension_fields (&body, desc, dim, lbound, ubound, stride, offset);
 
   /* Update stride.  */
   gfc_add_modify (&body, stride,
  fold_build2_loc (input_location, MULT_EXPR,
   gfc_array_index_type, stride, shapeval));
+
   /* Finish scalarization loop.  */
   gfc_trans_scalarizing_loops (&loop, &body);
   gfc_add_block_to_block (block, &loop.pre);
   gfc_add_block_to_block (block, &loop.post);
   gfc_cleanup_loop (&loop);
 
-  gfc_add_modify (block, offset,
- fold_build1_loc (input_location, NEGATE_EXPR,
-  gfc_array_index_type, offset));
   gfc_conv_descriptor_offset_set (block, desc, offset);
 }

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Déplacement gfc_array_init_count -> gfc_descriptor_init_count

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:dcba401dd45d27c3ef3f287fe94aa8f8420fc876

commit dcba401dd45d27c3ef3f287fe94aa8f8420fc876
Author: Mikael Morin 
Date:   Thu Jul 31 16:51:20 2025 +0200

Déplacement gfc_array_init_count -> gfc_descriptor_init_count

Diff:
---
 gcc/fortran/trans-array.cc  | 301 ++--
 gcc/fortran/trans-descriptor.cc | 283 +
 gcc/fortran/trans-descriptor.h  |   5 +
 3 files changed, 297 insertions(+), 292 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 7c1dab102030..2306f8939818 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -5817,289 +5817,6 @@ get_array_memory_size (tree element_size, tree 
elements_count,
 }
 
 
-/* Fills in an array descriptor, and returns the size of the array.
-   The size will be a simple_val, ie a variable or a constant.  Also
-   calculates the offset of the base.  The pointer argument overflow,
-   which should be of integer type, will increase in value if overflow
-   occurs during the size calculation.  Returns the size of the array.
-   {
-stride = 1;
-offset = 0;
-for (n = 0; n < rank; n++)
-  {
-   a.lbound[n] = specified_lower_bound;
-   offset = offset + a.lbond[n] * stride;
-   size = 1 - lbound;
-   a.ubound[n] = specified_upper_bound;
-   a.stride[n] = stride;
-   size = size >= 0 ? ubound + size : 0; //size = ubound + 1 - lbound
-   overflow += size == 0 ? 0: (MAX/size < stride ? 1: 0);
-   stride = stride * size;
-  }
-for (n = rank; n < rank+corank; n++)
-  (Set lcobound/ucobound as above.)
-element_size = sizeof (array element);
-if (!rank)
-  return element_size
-stride = (size_t) stride;
-overflow += element_size == 0 ? 0: (MAX/element_size < stride ? 1: 0);
-stride = stride * element_size;
-return (stride);
-   }  */
-/*GCC ARRAYS*/
-
-static tree
-gfc_array_init_count (tree descriptor, int rank, int corank, gfc_expr ** lower,
- gfc_expr ** upper, stmtblock_t * pblock,
- stmtblock_t * descriptor_block, tree * overflow,
- tree expr3_elem_size, gfc_expr *expr3, tree expr3_desc,
- bool e3_has_nodescriptor, gfc_expr *expr,
- tree element_size, bool explicit_ts,
- tree *empty_array_cond)
-{
-  tree type;
-  tree tmp;
-  tree size;
-  tree offset;
-  tree stride;
-  tree cond;
-  gfc_expr *ubound;
-  gfc_se se;
-  int n;
-
-  type = TREE_TYPE (descriptor);
-
-  stride = gfc_index_one_node;
-  offset = gfc_index_zero_node;
-
-  /* Set the dtype before the alloc, because registration of coarrays needs
- it initialized.  */
-  if (expr->ts.type == BT_CHARACTER
-  && expr->ts.deferred
-  && VAR_P (expr->ts.u.cl->backend_decl))
-{
-  type = gfc_typenode_for_spec (&expr->ts);
-  gfc_conv_descriptor_dtype_set (pblock, descriptor,
-gfc_get_dtype_rank_type (rank, type));
-}
-  else if (expr->ts.type == BT_CHARACTER
-  && expr->ts.deferred
-  && TREE_CODE (descriptor) == COMPONENT_REF)
-{
-  /* Deferred character components have their string length tucked away
-in a hidden field of the derived type. Obtain that and use it to
-set the dtype. The charlen backend decl is zero because the field
-type is zero length.  */
-  gfc_ref *ref;
-  tmp = NULL_TREE;
-  for (ref = expr->ref; ref; ref = ref->next)
-   if (ref->type == REF_COMPONENT
-   && gfc_deferred_strlen (ref->u.c.component, &tmp))
- break;
-  gcc_assert (tmp != NULL_TREE);
-  tmp = fold_build3_loc (input_location, COMPONENT_REF, TREE_TYPE (tmp),
-TREE_OPERAND (descriptor, 0), tmp, NULL_TREE);
-  tmp = fold_convert (gfc_charlen_type_node, tmp);
-  type = gfc_get_character_type_len (expr->ts.kind, tmp);
-  gfc_conv_descriptor_dtype_set (pblock, descriptor,
-gfc_get_dtype_rank_type (rank, type));
-}
-  else if (expr3_desc && GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (expr3_desc)))
-gfc_conv_descriptor_dtype_set (pblock, descriptor,
-  gfc_conv_descriptor_dtype_get (expr3_desc));
-  else if (expr->ts.type == BT_CLASS && !explicit_ts
-  && expr3 && expr3->ts.type != BT_CLASS
-  && expr3_elem_size != NULL_TREE && expr3_desc == NULL_TREE)
-gfc_conv_descriptor_elem_len_set (pblock, descriptor, expr3_elem_size);
-  else
-gfc_conv_descriptor_dtype_set (pblock, descriptor, gfc_get_dtype (type));
-
-  tree empty_cond = logical_false_node;
-
-  for (n = 0; n < rank; n++)
-{
-  tree conv_lbound;
-  tree conv_ubound;
-
-  /* We have 3 possibilities for determining the size of the array:
-lower == NULL=> lbound = 1, ubound = upper[n]
-upper[n] = NULL  => lbound = 1, ubound 

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Extraction gfc_set_pdt_array_descriptor

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:a90d83d74183b1ee4c0da808dd8178133d19fd7c

commit a90d83d74183b1ee4c0da808dd8178133d19fd7c
Author: Mikael Morin 
Date:   Thu Jul 31 12:34:22 2025 +0200

Extraction gfc_set_pdt_array_descriptor

Diff:
---
 gcc/fortran/trans-array.cc  | 62 +
 gcc/fortran/trans-descriptor.cc | 50 +
 gcc/fortran/trans-descriptor.h  |  2 ++
 3 files changed, 59 insertions(+), 55 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index f0b3b2e2b557..f9e991c465bf 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -10154,56 +10154,9 @@ structure_alloc_comps (gfc_symbol * der_type, tree 
decl, tree dest,
 
  if (c->attr.pdt_array)
{
- gfc_se tse;
- int i;
- tree size = gfc_index_one_node;
- tree offset = gfc_index_zero_node;
- tree lower, upper;
- gfc_expr *e;
-
- /* This chunk takes the expressions for 'lower' and 'upper'
-in the arrayspec and substitutes in the expressions for
-the parameters from 'pdt_param_list'. The descriptor
-fields can then be filled from the values so obtained.  */
- gcc_assert (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (comp)));
- for (i = 0; i < c->as->rank; i++)
-   {
- gfc_init_se (&tse, NULL);
- e = gfc_copy_expr (c->as->lower[i]);
- gfc_insert_parameter_exprs (e, pdt_param_list);
- gfc_conv_expr_type (&tse, e, gfc_array_index_type);
- gfc_free_expr (e);
- lower = tse.expr;
- gfc_conv_descriptor_lbound_set (&fnblock, comp,
- gfc_rank_cst[i],
- lower);
- e = gfc_copy_expr (c->as->upper[i]);
- gfc_insert_parameter_exprs (e, pdt_param_list);
- gfc_conv_expr_type (&tse, e, gfc_array_index_type);
- gfc_free_expr (e);
- upper = tse.expr;
- gfc_conv_descriptor_ubound_set (&fnblock, comp,
- gfc_rank_cst[i],
- upper);
- gfc_conv_descriptor_stride_set (&fnblock, comp,
- gfc_rank_cst[i],
- size);
- size = gfc_evaluate_now (size, &fnblock);
- offset = fold_build2_loc (input_location,
-   MINUS_EXPR,
-   gfc_array_index_type,
-   offset, size);
- offset = gfc_evaluate_now (offset, &fnblock);
- tmp = fold_build2_loc (input_location, MINUS_EXPR,
-gfc_array_index_type,
-upper, lower);
- tmp = fold_build2_loc (input_location, PLUS_EXPR,
-gfc_array_index_type,
-tmp, gfc_index_one_node);
- size = fold_build2_loc (input_location, MULT_EXPR,
- gfc_array_index_type, size, tmp);
-   }
- gfc_conv_descriptor_offset_set (&fnblock, comp, offset);
+ tree nelts = gfc_set_pdt_array_descriptor (&fnblock, comp, c->as,
+pdt_param_list);
+
  if (c->ts.type == BT_CLASS)
{
  tmp = gfc_get_vptr_from_expr (comp);
@@ -10214,18 +10167,17 @@ structure_alloc_comps (gfc_symbol * der_type, tree 
decl, tree dest,
  else
tmp = TYPE_SIZE_UNIT (gfc_get_element_type (ctype));
  tmp = fold_convert (gfc_array_index_type, tmp);
- size = fold_build2_loc (input_location, MULT_EXPR,
- gfc_array_index_type, size, tmp);
+ tree size = fold_build2_loc (input_location, MULT_EXPR,
+  gfc_array_index_type, nelts, tmp);
  size = gfc_evaluate_now (size, &fnblock);
  tmp = gfc_call_malloc (&fnblock, NULL, size);
  gfc_conv_descriptor_data_set (&fnblock, comp, tmp);
- gfc_conv_descriptor_dtype_set (&fnblock, comp,
-gfc_get_dtype (ctype));
 
  if (c->initializer && c->initializer->rank)
{
+ gfc_se tse;
  gfc_init_se (&tse, NULL);
- e = gfc_copy_expr (c->initializer);
+ gfc_expr *e = gfc_copy_expr (c->initializer);
  gfc_insert_parameter_exprs (e, pdt_param_lis

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Déplacement initialisation dernière borne sup assumed size

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:18eebb350521745383c224f1f75f8884013cf07c

commit 18eebb350521745383c224f1f75f8884013cf07c
Author: Mikael Morin 
Date:   Sun Aug 10 11:13:41 2025 +0200

Déplacement initialisation dernière borne sup assumed size

Diff:
---
 gcc/fortran/trans-array.cc | 37 ++---
 gcc/fortran/trans-expr.cc  | 32 
 2 files changed, 22 insertions(+), 47 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index e837c1582efb..71077af59c1a 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -7826,21 +7826,28 @@ gfc_conv_expr_descriptor (gfc_se *se, gfc_expr *expr)
expr->ts.u.cl->backend_decl = tmp;
}
 
-  /* If we have an array section, are assigning  or passing an array
-section argument make sure that the lower bound is 1.  References
-to the full array should otherwise keep the original bounds.  */
-  if (!info->ref || info->ref->u.ar.type != AR_FULL)
-   for (dim = 0; dim < loop.dimen; dim++)
- if (!integer_onep (loop.from[dim]))
-   {
- tmp = fold_build2_loc (input_location, MINUS_EXPR,
-gfc_array_index_type, gfc_index_one_node,
-loop.from[dim]);
- loop.to[dim] = fold_build2_loc (input_location, PLUS_EXPR,
- gfc_array_index_type,
- loop.to[dim], tmp);
- loop.from[dim] = gfc_index_one_node;
-   }
+  if (info->ref && info->ref->u.ar.type == AR_FULL)
+   {
+ if (info->ref->u.ar.as->type == AS_ASSUMED_SIZE)
+   loop.to[loop.dimen - 1] = build_int_cst (gfc_array_index_type, -1);
+   }
+  else
+   {
+ /* If we have an array section, are assigning  or passing an array
+section argument make sure that the lower bound is 1.  References
+to the full array should otherwise keep the original bounds.  */
+ for (dim = 0; dim < loop.dimen; dim++)
+   if (!integer_onep (loop.from[dim]))
+ {
+   tmp = fold_build2_loc (input_location, MINUS_EXPR,
+  gfc_array_index_type, gfc_index_one_node,
+  loop.from[dim]);
+   loop.to[dim] = fold_build2_loc (input_location, PLUS_EXPR,
+   gfc_array_index_type,
+   loop.to[dim], tmp);
+   loop.from[dim] = gfc_index_one_node;
+ }
+   }
 
   desc = info->descriptor;
   if (se->direct_byref && !se->byref_noassign)
diff --git a/gcc/fortran/trans-expr.cc b/gcc/fortran/trans-expr.cc
index 76ec12d23b48..9f26c95a9719 100644
--- a/gcc/fortran/trans-expr.cc
+++ b/gcc/fortran/trans-expr.cc
@@ -7665,38 +7665,6 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym,
}
}
}
-  /* Special case for an assumed-rank dummy argument. */
-  if (!sym->attr.is_bind_c && e && fsym && e->rank > 0
- && (fsym->ts.type == BT_CLASS
- ? (CLASS_DATA (fsym)->as
-&& CLASS_DATA (fsym)->as->type == AS_ASSUMED_RANK)
- : (fsym->as && fsym->as->type == AS_ASSUMED_RANK))
- && !(fsym->ts.type == BT_CLASS
-  ? (CLASS_DATA (fsym)->attr.class_pointer
- || CLASS_DATA (fsym)->attr.allocatable)
-  : (fsym->attr.pointer || fsym->attr.allocatable))
- && e->expr_type == EXPR_VARIABLE
- && e->symtree->n.sym->attr.dummy
- && (e->ts.type == BT_CLASS
- ? (e->ref && e->ref->next
-&& e->ref->next->type == REF_ARRAY
-&& e->ref->next->u.ar.type == AR_FULL
-&& e->ref->next->u.ar.as->type == AS_ASSUMED_SIZE)
- : (e->ref && e->ref->type == REF_ARRAY
-&& e->ref->u.ar.type == AR_FULL
-&& e->ref->u.ar.as->type == AS_ASSUMED_SIZE)))
-   {
- /* Assumed-size actual to assumed-rank dummy requires
-dim[rank-1].ubound = -1. */
- tree minus_one;
- tmp = build_fold_indirect_ref_loc (input_location, parmse.expr);
- if (fsym->ts.type == BT_CLASS)
-   tmp = gfc_class_data_get (tmp);
- minus_one = build_int_cst (gfc_array_index_type, -1);
- gfc_conv_descriptor_ubound_set (&parmse.pre, tmp,
- gfc_rank_cst[e->rank - 1],
- minus_one);
-   }
 
   /* The case with fsym->attr.optional is that of a user subroutine
 with an interface indicating an optional argument.  When we call

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Mise à jour offset & span dans gfc_array_init_size

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:1d7e588fb6fee4681d0d66bba49235194186676d

commit 1d7e588fb6fee4681d0d66bba49235194186676d
Author: Mikael Morin 
Date:   Fri Feb 14 11:22:35 2025 +0100

Mise à jour offset & span dans gfc_array_init_size

Diff:
---
 gcc/fortran/trans-array.cc | 30 ++
 1 file changed, 10 insertions(+), 20 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 2bfc57e58bb0..4614aa71b845 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -5816,8 +5816,8 @@ descriptor_element_size (tree descriptor, tree 
expr3_elem_size,
 /*GCC ARRAYS*/
 
 static tree
-gfc_array_init_size (tree descriptor, int rank, int corank, tree * poffset,
-gfc_expr ** lower, gfc_expr ** upper, stmtblock_t * pblock,
+gfc_array_init_size (tree descriptor, int rank, int corank, gfc_expr ** lower,
+gfc_expr ** upper, stmtblock_t * pblock,
 stmtblock_t * descriptor_block, tree * overflow,
 tree expr3_elem_size, gfc_expr *expr3, tree expr3_desc,
 bool e3_has_nodescriptor, gfc_expr *expr,
@@ -6060,6 +6060,12 @@ gfc_array_init_size (tree descriptor, int rank, int 
corank, tree * poffset,
   if (rank == 0)
 return element_size;
 
+  /* Update the array descriptor with the offset and the span.  */
+  offset = gfc_evaluate_now (offset, pblock);
+  gfc_conv_descriptor_offset_set (descriptor_block, descriptor, offset);
+  tmp = fold_convert (gfc_array_index_type, element_size);
+  gfc_conv_descriptor_span_set (descriptor_block, descriptor, tmp);
+
   stride = fold_convert (size_type_node, stride);
 
   /* First check for overflow. Since an array of type character can
@@ -6086,12 +6092,6 @@ gfc_array_init_size (tree descriptor, int rank, int 
corank, tree * poffset,
   size = fold_build2_loc (input_location, MULT_EXPR, size_type_node,
  stride, element_size);
 
-  if (poffset != NULL)
-{
-  offset = gfc_evaluate_now (offset, pblock);
-  *poffset = offset;
-}
-
   if (integer_zerop (or_expr))
 return size;
   if (integer_onep (or_expr))
@@ -6153,7 +6153,6 @@ gfc_array_allocate (gfc_se * se, gfc_expr * expr, tree 
status, tree errmsg,
 {
   tree tmp;
   tree pointer;
-  tree offset = NULL_TREE;
   tree token = NULL_TREE;
   tree size;
   tree msg;
@@ -6282,9 +6281,8 @@ gfc_array_allocate (gfc_se * se, gfc_expr * expr, tree 
status, tree errmsg,
   size = gfc_array_init_size (se->expr, alloc_w_e3_arr_spec ? expr->rank
   : ref->u.ar.as->rank,
  coarray ? ref->u.ar.as->corank : 0,
- &offset, lower, upper,
- &se->pre, &set_descriptor_block, &overflow,
- expr3_elem_size, expr3, e3_arr_desc,
+ lower, upper, &se->pre, &set_descriptor_block,
+ &overflow, expr3_elem_size, expr3, e3_arr_desc,
  e3_has_nodescriptor, expr, element_size,
  explicit_ts);
 
@@ -6422,14 +6420,6 @@ gfc_array_allocate (gfc_se * se, gfc_expr * expr, tree 
status, tree errmsg,
 
   gfc_add_expr_to_block (&se->pre, tmp);
 
-  /* Update the array descriptor with the offset and the span.  */
-  if (dimension)
-{
-  gfc_conv_descriptor_offset_set (&set_descriptor_block, se->expr, offset);
-  tmp = fold_convert (gfc_array_index_type, element_size);
-  gfc_conv_descriptor_span_set (&set_descriptor_block, se->expr, tmp);
-}
-
   set_descriptor = gfc_finish_block (&set_descriptor_block);
   if (status != NULL_TREE)
 {

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Ajout macros GFC_DESCRIPTOR1_ELEM, etc

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:36b23963083c1ffd1841542c950f798110c0366a

commit 36b23963083c1ffd1841542c950f798110c0366a
Author: Mikael Morin 
Date:   Thu Sep 11 12:28:19 2025 +0200

Ajout macros GFC_DESCRIPTOR1_ELEM, etc

Ajout macros libgfortran.h

Correction matmul_bounds_12

Correction matmul_internal.m4

Correction matmul_internal.m4

Correction matmul_internal.m4

Correction reduce_4

Correction findloc1.m4

Modifications mineures

Revert partiel modif quotation

Utilisation GFC_DESCRIPTOR1_ELEM random.c et reshape.m4

Extraction PTR_ADD_OFFSET

Extraction ARRAY_ELEM_AT_OFFSET

Modification macros

Correction macro

Diff:
---
 libgfortran/intrinsics/random.c  |  10 +-
 libgfortran/intrinsics/reshape_generic.c |   6 +-
 libgfortran/intrinsics/spread_generic.c  |   2 +-
 libgfortran/intrinsics/stat.c| 132 ++---
 libgfortran/libgfortran.h|  18 +++
 libgfortran/m4/bessel.m4 |  34 ++
 libgfortran/m4/ifindloc0.m4  |  32 ++
 libgfortran/m4/ifindloc2.m4  |   4 +-
 libgfortran/m4/iforeach-s.m4 |  22 +---
 libgfortran/m4/iforeach.m4   |  22 +---
 libgfortran/m4/matmul_internal.m4| 192 ---
 libgfortran/m4/maxloc0.m4|  16 +--
 libgfortran/m4/maxloc0s.m4   |   4 +-
 libgfortran/m4/maxloc2s.m4   |   2 +-
 libgfortran/m4/minloc0.m4|  16 +--
 libgfortran/m4/minloc0s.m4   |   4 +-
 libgfortran/m4/minloc2s.m4   |   2 +-
 libgfortran/m4/pack.m4   |   2 +-
 libgfortran/m4/reshape.m4|   6 +-
 libgfortran/m4/shape.m4  |   5 +-
 20 files changed, 250 insertions(+), 281 deletions(-)

diff --git a/libgfortran/intrinsics/random.c b/libgfortran/intrinsics/random.c
index 225eb60239ac..4ff57de9413e 100644
--- a/libgfortran/intrinsics/random.c
+++ b/libgfortran/intrinsics/random.c
@@ -1347,8 +1347,7 @@ random_seed_i4 (GFC_INTEGER_4 *size, gfc_array_i4 *put, 
gfc_array_i4 *get)
 
   /*  Then copy it back to the user variable.  */
   for (size_t i = 0; i < SZ_IN_INT_4 ; i++)
-   memcpy (&(get->base_addr[(SZ_IN_INT_4 - 1 - i) *
-GFC_DESCRIPTOR_STRIDE(get,0)]),
+   memcpy (GFC_DESCRIPTOR1_ELEM_ADDRESS (get, SZ_IN_INT_4 - 1 - i),
(unsigned char*) seed + i * sizeof(GFC_UINTEGER_4),
sizeof(GFC_UINTEGER_4));
 }
@@ -1378,8 +1377,7 @@ random_seed_i4 (GFC_INTEGER_4 *size, gfc_array_i4 *put, 
gfc_array_i4 *get)
   /*  We copy the seed given by the user.  */
   for (size_t i = 0; i < SZ_IN_INT_4; i++)
memcpy ((unsigned char*) seed + i * sizeof(GFC_UINTEGER_4),
-   &(put->base_addr[(SZ_IN_INT_4 - 1 - i) *
-GFC_DESCRIPTOR_STRIDE(put,0)]),
+   GFC_DESCRIPTOR1_ELEM_ADDRESS (put, SZ_IN_INT_4 - 1 - i),
sizeof(GFC_UINTEGER_4));
 
   /* We put it after scrambling the bytes, to paper around users who
@@ -1428,7 +1426,7 @@ random_seed_i8 (GFC_INTEGER_8 *size, gfc_array_i8 *put, 
gfc_array_i8 *get)
 
   /*  This code now should do correct strides.  */
   for (size_t i = 0; i < SZ_IN_INT_8; i++)
-   memcpy (&(get->base_addr[i * GFC_DESCRIPTOR_STRIDE(get,0)]), &seed[i],
+   memcpy (GFC_DESCRIPTOR1_ELEM_ADDRESS (get, i), &seed[i],
sizeof (GFC_UINTEGER_8));
 }
 
@@ -1456,7 +1454,7 @@ random_seed_i8 (GFC_INTEGER_8 *size, gfc_array_i8 *put, 
gfc_array_i8 *get)
 
   /*  This code now should do correct strides.  */
   for (size_t i = 0; i < SZ_IN_INT_8; i++)
-   memcpy (&seed[i], &(put->base_addr[i * GFC_DESCRIPTOR_STRIDE(put,0)]),
+   memcpy (&seed[i], GFC_DESCRIPTOR1_ELEM_ADDRESS (put, i),
sizeof (GFC_UINTEGER_8));
 
   scramble_seed (master_state.s, seed);
diff --git a/libgfortran/intrinsics/reshape_generic.c 
b/libgfortran/intrinsics/reshape_generic.c
index 1aa47bb9d8ee..4d15ce100fb8 100644
--- a/libgfortran/intrinsics/reshape_generic.c
+++ b/libgfortran/intrinsics/reshape_generic.c
@@ -77,7 +77,7 @@ reshape_internal (parray *ret, parray *source, shape_type 
*shape,
 
   for (n = 0; n < rdim; n++)
 {
-  shape_data[n] = shape->base_addr[n * GFC_DESCRIPTOR_STRIDE(shape,0)];
+  shape_data[n] = GFC_DESCRIPTOR1_ELEM(shape,n);
   if (shape_data[n] <= 0)
{
  shape_data[n] = 0;
@@ -187,7 +187,7 @@ reshape_internal (parray *ret, parray *source, shape_type 
*shape,
 
  for (n = 0; n < rdim; n++)
{
- v = order->base_addr[n * GFC_DESCRIPTOR_STRIDE(order,0)] - 1;
+ v = GFC_DESCRIPTOR1_ELEM(order,n) - 1;
 
  if (v < 0 || v >= rdim)
runtime_error("Value %ld out of range in ORDER argument"
@@ -206,7 +206,7 @@ reshape_internal (parray *ret, 

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Refactor set_dimension_fields descriptor_init_count

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:ff3ee88ad15bbcf17a8209ae1b2364a996df26ed

commit ff3ee88ad15bbcf17a8209ae1b2364a996df26ed
Author: Mikael Morin 
Date:   Sat Aug 16 19:16:15 2025 +0200

Refactor set_dimension_fields descriptor_init_count

Correction régression class_allocate_22

Ajout scan tree var

Correction dumps coarray_12

Diff:
---
 gcc/fortran/trans-descriptor.cc  | 18 +++-
 gcc/testsuite/gfortran.dg/coarray_12.f90 |  3 +-
 gcc/testsuite/lib/scandump.exp   | 50 
 gcc/testsuite/lib/scantree.exp   | 26 +
 4 files changed, 82 insertions(+), 15 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index 071840f0e871..1b08120e74a3 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -2816,15 +2816,8 @@ gfc_descriptor_init_count (tree descriptor, int rank, 
int corank,
  ubound = lower[n];
}
}
-  gfc_conv_descriptor_lbound_set (descriptor_block, descriptor,
- gfc_rank_cst[n], se.expr);
   conv_lbound = se.expr;
-
-  /* Work out the offset for this component.  */
-  tmp = fold_build2_loc (input_location, MULT_EXPR, gfc_array_index_type,
-se.expr, stride);
-  offset = fold_build2_loc (input_location, MINUS_EXPR,
-   gfc_array_index_type, offset, tmp);
+  conv_lbound = gfc_evaluate_now (conv_lbound, pblock);
 
   /* Set upper bound.  */
   gfc_init_se (&se, NULL);
@@ -2860,13 +2853,11 @@ gfc_descriptor_init_count (tree descriptor, int rank, 
int corank,
  if (ubound->expr_type == EXPR_FUNCTION)
se.expr = gfc_evaluate_now (se.expr, pblock);
}
-  gfc_conv_descriptor_ubound_set (descriptor_block, descriptor,
- gfc_rank_cst[n], se.expr);
   conv_ubound = se.expr;
+  conv_ubound = gfc_evaluate_now (conv_ubound, pblock);
 
-  /* Store the stride.  */
-  gfc_conv_descriptor_stride_set (descriptor_block, descriptor,
- gfc_rank_cst[n], stride);
+  set_dimension_fields (descriptor_block, descriptor, gfc_rank_cst[n],
+   conv_lbound, conv_ubound, stride, &offset);
 
   /* Calculate size and check whether extent is negative.  */
   size = gfc_conv_array_extent_dim (conv_lbound, conv_ubound, &empty_cond);
@@ -2950,7 +2941,6 @@ gfc_descriptor_init_count (tree descriptor, int rank, int 
corank,
 return gfc_index_one_node;
 
   /* Update the array descriptor with the offset and the span.  */
-  offset = gfc_evaluate_now (offset, pblock);
   gfc_conv_descriptor_offset_set (descriptor_block, descriptor, offset);
   tmp = fold_convert (gfc_array_index_type, element_size);
   gfc_conv_descriptor_span_set (descriptor_block, descriptor, tmp);
diff --git a/gcc/testsuite/gfortran.dg/coarray_12.f90 
b/gcc/testsuite/gfortran.dg/coarray_12.f90
index 70efaaff5160..9bbb9e3a3035 100644
--- a/gcc/testsuite/gfortran.dg/coarray_12.f90
+++ b/gcc/testsuite/gfortran.dg/coarray_12.f90
@@ -46,7 +46,8 @@ end subroutine testAlloc5
 
 
 ! { dg-final { scan-tree-dump-times "a.dim.0..lbound = 1;" 1 "original" } }
-! { dg-final { scan-tree-dump-times "a.dim.0..ubound = .*nn;" 1 "original" } }
+! { dg-final { global ubound_value; scan-tree-dump-var {a\.dim\[0\]\.ubound = 
(D\.\d+);} "original" "ubound_value" } }
+! { dg-final { global ubound_value; scan-tree-dump-times "$ubound_value = 
.*nn;" 1 "original" } }
 ! { dg-final { scan-tree-dump-times "a.dim.1..lbound = 1;" 1 "original" } }
 ! { dg-final { scan-tree-dump-times "a.dim.1..ubound = .*mm;" 1 "original" } }
 ! { dg-final { scan-tree-dump-times "a.dim.2..lbound = 1;" 1 "original" } }
diff --git a/gcc/testsuite/lib/scandump.exp b/gcc/testsuite/lib/scandump.exp
index a8441daa22fa..74a77f0a57e1 100644
--- a/gcc/testsuite/lib/scandump.exp
+++ b/gcc/testsuite/lib/scandump.exp
@@ -214,6 +214,56 @@ proc scan-dump-not { args } {
 }
 }
 
+# Utility for scanning compiler result, invoked via dg-final.
+# Call pass if pattern is present, otherwise fail.
+#
+# Argument 0 is the type of dump we are searching (rtl, tree, ipa)
+# Argument 1 is the regexp to match.
+# Argument 2 is the suffix for the dump file
+# Argument 3 is the suffix of the dump base
+# Argument 4 is the variable name to store the matched content
+# Argument 5 handles expected failures and the like
+proc scan-dump-var { args } {
+
+if { [llength $args] >= 6 } {
+switch [dg-process-target [lindex $args 5]] {
+"S" { }
+"N" { return }
+"F" { setup_xfail "*-*-*" }
+"P" { }
+}
+}
+
+set testcase [testname-for-summary]
+# The name might include a list of options; extract the file name.
+set filename [lindex $testcase 0]
+
+set printable_pattern [make_pattern_printable [li

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Factorisation shift_dimension_fields/set_dimension_fields gfc_set_temporaray_descriptor

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:653ed09615228372705f79e290dbeb330043c688

commit 653ed09615228372705f79e290dbeb330043c688
Author: Mikael Morin 
Date:   Sat Aug 16 18:41:13 2025 +0200

Factorisation shift_dimension_fields/set_dimension_fields 
gfc_set_temporaray_descriptor

Correction utilisation offset

Revert "Revert partiel"

This reverts commit 00ca0a062b284d18755fb50f9dece28fc3013ced.

Correction régression pr77942

Diff:
---
 gcc/fortran/trans-descriptor.cc | 52 ++---
 1 file changed, 18 insertions(+), 34 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index 6ada111b9e6e..f2fbe4e77045 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -1284,6 +1284,18 @@ shift_dimension_bounds (stmtblock_t * block, tree descr, 
tree dim,
 }
 
 
+static void
+shift_dimension_fields (stmtblock_t * block, tree descr, tree dim,
+   tree new_lbound, tree orig_lbound, tree orig_ubound,
+   tree orig_stride, tree *offset_value)
+{
+  tree stride = gfc_evaluate_now (orig_stride, block);
+  shift_dimension_bounds (block, descr, dim, new_lbound, orig_lbound, 
orig_ubound,
+ stride, offset_value);
+  gfc_conv_descriptor_stride_set (block, descr, dim, stride);
+}
+
+
 /* Modify a descriptor such that the lbound of a given dimension is the value
specified.  This also updates ubound and offset accordingly.  */
 
@@ -1428,12 +1440,10 @@ gfc_conv_shift_descriptor (stmtblock_t *block, tree 
dest, tree src,
 
   tree dim = gfc_rank_cst[n];
   tree stride = gfc_conv_descriptor_stride_get (src, dim);
-  shift_dimension_bounds (block, dest, gfc_rank_cst[n],
+  shift_dimension_fields (block, dest, gfc_rank_cst[n],
  lbound, gfc_index_zero_node,
  gfc_conv_descriptor_ubound_get (src, dim),
  stride, &offset);
-
-  gfc_conv_descriptor_stride_set (block, dest, dim, stride);
 }
 
   gfc_conv_descriptor_offset_set (block, dest, offset);
@@ -2358,39 +2368,13 @@ gfc_set_temporary_descriptor (stmtblock_t *block, tree 
descr, tree class_src,
   if (!callee_allocated)
 for (int n = 0; n < rank; n++)
   {
-   /* Store the stride and bound components in the descriptor.  */
-   gfc_conv_descriptor_stride_set (block, descr, gfc_rank_cst[n],
-   stride[n]);
-
-   tree this_lbound = shift_bounds ? gfc_index_zero_node : lbound[n];
-   gfc_conv_descriptor_lbound_set (block, descr, gfc_rank_cst[n],
-   this_lbound);
-
-   tree this_ubound;
if (shift_bounds)
- {
-   tree lbound_diff = fold_build2_loc (input_location, MINUS_EXPR,
-   gfc_array_index_type,
-   this_lbound, lbound[n]);
-   this_ubound = fold_build2_loc (input_location, PLUS_EXPR,
-  gfc_array_index_type,
-  ubound[n], lbound_diff);
- }
+ shift_dimension_fields (block, descr, gfc_rank_cst[n],
+ gfc_index_zero_node, lbound[n], ubound[n],
+ stride[n], &offset);
else
- this_ubound = ubound[n];
-
-   gfc_conv_descriptor_ubound_set (block, descr, gfc_rank_cst[n],
-   this_ubound);
-
-   if (!shift_bounds)
- {
-   tree tmp = fold_build2_loc (input_location, MULT_EXPR,
-   gfc_array_index_type, this_lbound,
-   stride[n]);
-   tmp = fold_build2_loc (input_location, MINUS_EXPR,
-  gfc_array_index_type, offset, tmp);
-   offset = gfc_evaluate_now (tmp, block);
- }
+ set_dimension_fields (block, descr, gfc_rank_cst[n], lbound[n],
+   ubound[n], stride[n], &offset);
   }
 
   gfc_conv_descriptor_span_set (block, descr, elemsize);

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Déplacement gfc_grow_array

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:9a548bb793ed35bb0476292d2b3b5e9d189fe435

commit 9a548bb793ed35bb0476292d2b3b5e9d189fe435
Author: Mikael Morin 
Date:   Thu Jul 31 14:41:23 2025 +0200

Déplacement gfc_grow_array

Diff:
---
 gcc/fortran/trans-array.cc  | 37 -
 gcc/fortran/trans-descriptor.cc | 39 +++
 gcc/fortran/trans-descriptor.h  |  1 +
 3 files changed, 40 insertions(+), 37 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 81209ad1f389..7c1dab102030 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -1309,43 +1309,6 @@ gfc_get_iteration_count (tree start, tree end, tree step)
 }
 
 
-/* Extend the data in array DESC by EXTRA elements.  */
-
-static void
-gfc_grow_array (stmtblock_t * pblock, tree desc, tree extra)
-{
-  tree arg0, arg1;
-  tree tmp;
-  tree size;
-  tree ubound;
-
-  if (integer_zerop (extra))
-return;
-
-  ubound = gfc_conv_descriptor_ubound_get (desc, gfc_rank_cst[0]);
-
-  /* Add EXTRA to the upper bound.  */
-  tmp = fold_build2_loc (input_location, PLUS_EXPR, gfc_array_index_type,
-ubound, extra);
-  gfc_conv_descriptor_ubound_set (pblock, desc, gfc_rank_cst[0], tmp);
-
-  /* Get the value of the current data pointer.  */
-  arg0 = gfc_conv_descriptor_data_get (desc);
-
-  /* Calculate the new array size.  */
-  size = TYPE_SIZE_UNIT (gfc_get_element_type (TREE_TYPE (desc)));
-  tmp = fold_build2_loc (input_location, PLUS_EXPR, gfc_array_index_type,
-ubound, gfc_index_one_node);
-  arg1 = fold_build2_loc (input_location, MULT_EXPR, size_type_node,
- fold_convert (size_type_node, tmp),
- fold_convert (size_type_node, size));
-
-  /* Call the realloc() function.  */
-  tmp = gfc_call_realloc (pblock, arg0, arg1);
-  gfc_conv_descriptor_data_set (pblock, desc, tmp);
-}
-
-
 /* Return true if the bounds of iterator I can only be determined
at run time.  */
 
diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index a885ad4d77aa..5ab51ad326f2 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -2468,3 +2468,42 @@ gfc_set_pdt_array_descriptor (stmtblock_t *block, tree 
descr,
 
   return size;
 }
+
+
+/* Extend the data in array DESC by EXTRA elements.  */
+
+void
+gfc_grow_array (stmtblock_t * pblock, tree desc, tree extra)
+{
+  tree arg0, arg1;
+  tree tmp;
+  tree size;
+  tree ubound;
+
+  if (integer_zerop (extra))
+return;
+
+  ubound = gfc_conv_descriptor_ubound_get (desc, gfc_rank_cst[0]);
+
+  /* Add EXTRA to the upper bound.  */
+  tmp = fold_build2_loc (input_location, PLUS_EXPR, gfc_array_index_type,
+ubound, extra);
+  gfc_conv_descriptor_ubound_set (pblock, desc, gfc_rank_cst[0], tmp);
+
+  /* Get the value of the current data pointer.  */
+  arg0 = gfc_conv_descriptor_data_get (desc);
+
+  /* Calculate the new array size.  */
+  size = TYPE_SIZE_UNIT (gfc_get_element_type (TREE_TYPE (desc)));
+  tmp = fold_build2_loc (input_location, PLUS_EXPR, gfc_array_index_type,
+ubound, gfc_index_one_node);
+  arg1 = fold_build2_loc (input_location, MULT_EXPR, size_type_node,
+ fold_convert (size_type_node, tmp),
+ fold_convert (size_type_node, size));
+
+  /* Call the realloc() function.  */
+  tmp = gfc_call_realloc (pblock, arg0, arg1);
+  gfc_conv_descriptor_data_set (pblock, desc, tmp);
+}
+
+
diff --git a/gcc/fortran/trans-descriptor.h b/gcc/fortran/trans-descriptor.h
index 33ed46d1c47a..f383cd97c262 100644
--- a/gcc/fortran/trans-descriptor.h
+++ b/gcc/fortran/trans-descriptor.h
@@ -147,5 +147,6 @@ void gfc_set_descriptor_for_assign_realloc (stmtblock_t *, 
gfc_loopinfo *,
tree, tree, bool);
 tree gfc_set_pdt_array_descriptor (stmtblock_t *, tree, gfc_array_spec *,
   gfc_actual_arglist *, tree);
+void gfc_grow_array (stmtblock_t *, tree, tree);
 
 #endif /* GFC_TRANS_DESCRIPTOR_H */

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Factorisation set_dimension_fields gfc_set_descriptor

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:9e39425fd2d2481bd9482e3b9bebb1ef91552b91

commit 9e39425fd2d2481bd9482e3b9bebb1ef91552b91
Author: Mikael Morin 
Date:   Sat Aug 16 18:11:01 2025 +0200

Factorisation set_dimension_fields gfc_set_descriptor

Diff:
---
 gcc/fortran/trans-descriptor.cc | 17 ++---
 1 file changed, 2 insertions(+), 15 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index d16127cf3ed7..ce7495ab1f34 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -1860,27 +1860,14 @@ gfc_set_descriptor (stmtblock_t *block, tree dest, tree 
src, gfc_expr *src_expr,
   tree from = lowers[dim];
   tree to = uppers[dim];
 
-  gfc_conv_descriptor_lbound_set (block, dest,
- gfc_rank_cst[dim], from);
-
-  /* Set the new upper bound.  */
-  gfc_conv_descriptor_ubound_set (block, dest,
- gfc_rank_cst[dim], to);
-
   /* Multiply the stride by the section stride to get the
 total stride.  */
   stride = fold_build2_loc (input_location, MULT_EXPR,
gfc_array_index_type,
stride, info->stride[n]);
 
-  tmp = fold_build2_loc (input_location, MULT_EXPR,
-TREE_TYPE (offset), stride, from);
-  offset = fold_build2_loc (input_location, MINUS_EXPR,
-  TREE_TYPE (offset), offset, tmp);
-
-  /* Store the new stride.  */
-  gfc_conv_descriptor_stride_set (block, dest,
- gfc_rank_cst[dim], stride);
+  set_dimension_fields (block, dest, gfc_rank_cst[dim], from, to, stride,
+   &offset);
 }
 
   for (int n = rank; n < rank + corank; n++)

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Refactoring nullifcations descripteur

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:751a342533ffd1b880df88cb355600241474

commit 751a342533ffd1b880df88cb355600241474
Author: Mikael Morin 
Date:   Sun Aug 10 18:30:59 2025 +0200

Refactoring nullifcations descripteur

Revert partiel

Diff:
---
 gcc/fortran/trans-descriptor.cc | 104 ++--
 1 file changed, 101 insertions(+), 3 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index ad07726d52bc..d0ef2baf9966 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -722,6 +722,103 @@ gfc_get_dtype_rank_type (int rank, tree etype)
 }
 
 
+class constructor_elements
+{
+  vec *values;
+  bool constant;
+
+public:
+  constructor_elements () : values (nullptr), constant (true) {}
+  void add_value (tree elt, tree val);
+  tree build (tree type);
+};
+
+
+void
+constructor_elements::add_value (tree elt, tree val)
+{
+  CONSTRUCTOR_APPEND_ELT (values, elt, val);
+  if (!TREE_CONSTANT (val))
+constant = false;
+}
+
+
+tree
+constructor_elements::build (tree type)
+{
+  tree cstr = build_constructor (type, values);
+  if (constant)
+TREE_CONSTANT (cstr) = 1;
+
+  return cstr;
+}
+
+
+struct write_destination
+{
+  enum write_type
+  {
+STATIC_INIT,
+REGULAR_ASSIGN
+  }
+  type;
+
+  tree ref;
+
+  union u
+  {
+struct rw
+{
+  stmtblock_t *block;
+
+  rw (stmtblock_t *b) : block(b) {}
+}
+regular_assign;
+
+constructor_elements static_init;
+
+u(stmtblock_t *block) : regular_assign (block) {}
+u() : static_init () {}
+  }
+  u;
+
+  write_destination (tree r, stmtblock_t *b)
+  : type (REGULAR_ASSIGN), ref (r), u (b) {}
+  write_destination (tree d) : type (STATIC_INIT), ref (d), u () {}
+};
+
+
+static void
+set_descriptor_field (write_destination &dest, descriptor_field field, tree 
value)
+{
+  if (dest.type == write_destination::STATIC_INIT)
+{
+  tree field_decl = gfc_advance_chain (TYPE_FIELDS (TREE_TYPE (dest.ref)),
+  field);
+  dest.u.static_init.add_value (field_decl, value);
+}
+  else
+{
+  tree comp_ref = get_ref_comp (dest.ref, field);
+  set_value (dest.u.regular_assign.block, comp_ref, value);
+}
+}
+
+
+static void
+set_descriptor (write_destination &dest)
+{
+  set_descriptor_field (dest, DATA_FIELD, null_pointer_node);
+  if (dest.type == write_destination::STATIC_INIT)
+{
+  tree decl = dest.ref;
+  tree type = TREE_TYPE (decl);
+  tree cstr = dest.u.static_init.build (type);
+  DECL_INITIAL (decl) = cstr;
+}
+}
+
+
 /* Build a null array descriptor constructor.  */
 
 tree
@@ -829,21 +926,22 @@ gfc_conv_descriptor_cosize (tree desc, int rank, int 
corank)
 void
 gfc_nullify_descriptor (stmtblock_t *block, tree descr)
 {
-  gfc_conv_descriptor_data_set (block, descr, null_pointer_node); 
+  write_destination dest(descr, block);
+  set_descriptor (dest);
 }
 
 
 void
 gfc_init_descriptor_result (stmtblock_t *block, tree descr)
 {
-  gfc_conv_descriptor_data_set (block, descr, null_pointer_node);
+  gfc_nullify_descriptor (block, descr);
 }
 
 
 void
 gfc_init_absent_descriptor (stmtblock_t *block, tree descr)
 {
-  gfc_conv_descriptor_data_set (block, descr, null_pointer_node);
+  gfc_nullify_descriptor (block, descr);
 }

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Extraction gfc_set_temporary_descriptor

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:de5c8708ce87384fc624ad93720b89da93e87c82

commit de5c8708ce87384fc624ad93720b89da93e87c82
Author: Mikael Morin 
Date:   Wed Jul 23 12:12:01 2025 +0200

Extraction gfc_set_temporary_descriptor

Diff:
---
 gcc/fortran/trans-array.cc  | 62 +
 gcc/fortran/trans-descriptor.cc | 53 +++
 gcc/fortran/trans-descriptor.h  |  4 +++
 3 files changed, 76 insertions(+), 43 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 8d114492ba53..4d96e75072f0 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -624,13 +624,14 @@ gfc_set_loop_bounds_from_array_spec 
(gfc_interface_mapping * mapping,
DYNAMIC is true if the caller may want to extend the array later
using realloc.  This prevents us from putting the array on the stack.  */
 
-static void
+static tree
 gfc_trans_allocate_array_storage (stmtblock_t * pre, stmtblock_t * post,
  gfc_array_info * info, tree size, tree nelem,
  tree initial, bool dynamic, bool dealloc)
 {
   tree tmp;
   tree desc;
+  tree ptr = NULL_TREE;
   bool onstack;
 
   desc = info->descriptor;
@@ -638,7 +639,7 @@ gfc_trans_allocate_array_storage (stmtblock_t * pre, 
stmtblock_t * post,
   if (size == NULL_TREE || (dynamic && integer_zerop (size)))
 {
   /* A callee allocated array.  */
-  gfc_conv_descriptor_data_set (pre, desc, null_pointer_node);
+  ptr = null_pointer_node;
   onstack = false;
 }
   else
@@ -666,8 +667,7 @@ gfc_trans_allocate_array_storage (stmtblock_t * pre, 
stmtblock_t * post,
   fold_build1_loc (input_location,
DECL_EXPR, TREE_TYPE (tmp),
tmp));
- tmp = gfc_build_addr_expr (NULL_TREE, tmp);
- gfc_conv_descriptor_data_set (pre, desc, tmp);
+ ptr = gfc_build_addr_expr (NULL_TREE, tmp);
}
   else
{
@@ -675,7 +675,7 @@ gfc_trans_allocate_array_storage (stmtblock_t * pre, 
stmtblock_t * post,
  if (initial == NULL_TREE)
{
  tmp = gfc_call_malloc (pre, NULL, size);
- tmp = gfc_evaluate_now (tmp, pre);
+ ptr = gfc_evaluate_now (tmp, pre);
}
  else
{
@@ -718,18 +718,12 @@ gfc_trans_allocate_array_storage (stmtblock_t * pre, 
stmtblock_t * post,
  build_empty_stmt (input_location));
  gfc_add_expr_to_block (pre, tmp);
 
- tmp = fold_convert (pvoid_type_node, packed);
+ ptr = fold_convert (pvoid_type_node, packed);
}
-
- gfc_conv_descriptor_data_set (pre, desc, tmp);
}
 }
   info->data = gfc_conv_descriptor_data_get (desc);
 
-  /* The offset is zero because we create temporaries with a zero
- lower bound.  */
-  gfc_conv_descriptor_offset_set (pre, desc, gfc_index_zero_node);
-
   if (dealloc && !onstack)
 {
   /* Free the temporary.  */
@@ -737,6 +731,8 @@ gfc_trans_allocate_array_storage (stmtblock_t * pre, 
stmtblock_t * post,
   tmp = gfc_call_free (tmp);
   gfc_add_expr_to_block (post, tmp);
 }
+
+  return ptr;
 }
 
 
@@ -970,6 +966,7 @@ gfc_trans_create_temp_array (stmtblock_t * pre, stmtblock_t 
* post, gfc_ss * ss,
   gfc_ss *s;
   gfc_array_info *info;
   tree from[GFC_MAX_DIMENSIONS], to[GFC_MAX_DIMENSIONS];
+  tree stride[GFC_MAX_DIMENSIONS];
   tree type;
   tree desc;
   tree tmp;
@@ -1105,13 +1102,12 @@ gfc_trans_create_temp_array (stmtblock_t * pre, 
stmtblock_t * post, gfc_ss * ss,
   TREE_USED (desc) = 0;
 }
 
+  bool rank_changer = false;
   if (class_expr != NULL_TREE
   || (fcn_ss && fcn_ss->info && fcn_ss->info->class_container))
 {
   tree class_data;
-  tree dtype;
   gfc_expr *expr1 = fcn_ss ? fcn_ss->info->expr : NULL;
-  bool rank_changer;
 
   /* Pick out these transformational functions because they change the rank
 or shape of the first argument. This requires that the class type be
@@ -1165,17 +1161,7 @@ gfc_trans_create_temp_array (stmtblock_t * pre, 
stmtblock_t * post, gfc_ss * ss,
   class_data = gfc_class_data_get (tmp);
 
   if (rank_changer)
-   {
- /* Take the dtype from the class expression.  */
- tree class_descr = gfc_class_data_get (class_expr);
- dtype = gfc_conv_descriptor_dtype_get (class_descr);
- gfc_conv_descriptor_dtype_set (pre, desc, dtype);
-
-
- /* These transformational functions change the rank.  */
- gfc_conv_descriptor_rank_set (pre, desc, ss->loop->dimen);
- fcn_ss->info->class_container = NULL_TREE;
-   }
+   fcn_ss->info->class_container = NULL_TREE;
 
   /* Assign the new descriptor to the _data field. This allows the
 vptr _copy to be used for scalarized assi

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Suppression set_dtype_if_unallocated

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:d538b9fe67aa5e8a75debfa885fd770da671d979

commit d538b9fe67aa5e8a75debfa885fd770da671d979
Author: Mikael Morin 
Date:   Sun Aug 10 11:03:57 2025 +0200

Suppression set_dtype_if_unallocated

Extraction gfc_descriptor_set_dtype_if_unallocated

Sauvegarde

Revert partiel

Sauvegarde

Correction indentation

Diff:
---
 gcc/fortran/trans-array.cc  |   2 +-
 gcc/fortran/trans-descriptor.cc |  33 +++--
 gcc/fortran/trans-descriptor.h  |   2 +-
 gcc/fortran/trans-expr.cc   | 104 ++--
 4 files changed, 58 insertions(+), 83 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index cef65c93b534..e837c1582efb 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -547,7 +547,7 @@ void
 gfc_trans_static_array_pointer (gfc_symbol * sym)
 {
   gcc_assert (TREE_STATIC (sym->backend_decl));
-  gfc_init_static_descriptor (sym->backend_decl);
+  gfc_init_static_descriptor (sym);
 }
 
 
diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index 048184afb76b..ad07726d52bc 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -848,10 +848,38 @@ gfc_init_absent_descriptor (stmtblock_t *block, tree 
descr)
 
 
 void
-gfc_init_static_descriptor (tree descr)
+gfc_init_static_descriptor (gfc_symbol *sym)
 {
+  vec *v = NULL;
+
+  tree descr = sym->backend_decl;
   tree type = TREE_TYPE (descr);
-  DECL_INITIAL (descr) = gfc_build_null_descriptor (type);
+
+  gcc_assert (GFC_DESCRIPTOR_TYPE_P (type));
+  tree fields = TYPE_FIELDS (type);
+
+  tree data_field = gfc_advance_chain (fields, DATA_FIELD);
+  CONSTRUCTOR_APPEND_ELT (v, data_field,
+ fold_convert (TREE_TYPE (data_field),
+   null_pointer_node));
+
+  gfc_array_spec *as;
+  if (sym->ts.type == BT_CLASS)
+as = CLASS_DATA (sym)->as;
+  else
+as = sym->as;
+
+  int rank = as ? as->rank : 0;
+  tree dtype_field = gfc_advance_chain (fields, DTYPE_FIELD);
+  tree dtype_value = gfc_get_dtype_rank_type (rank,
+ gfc_get_element_type (type));
+  CONSTRUCTOR_APPEND_ELT (v, dtype_field,
+ fold_convert (TREE_TYPE (dtype_field), dtype_value));
+
+  tree constr = build_constructor (type, v);
+  TREE_CONSTANT (constr) = 1;
+
+  DECL_INITIAL (descr) = constr;
 }
 
 
@@ -2806,4 +2834,3 @@ gfc_set_empty_descriptor_bounds (stmtblock_t *block, tree 
descr, int rank)
 
   gfc_conv_descriptor_offset_set (block, descr, gfc_index_zero_node);
 }
-
diff --git a/gcc/fortran/trans-descriptor.h b/gcc/fortran/trans-descriptor.h
index 6ca550fe8de2..40e1586ce5f7 100644
--- a/gcc/fortran/trans-descriptor.h
+++ b/gcc/fortran/trans-descriptor.h
@@ -86,7 +86,7 @@ gfc_get_descriptor_offsets_for_info (const_tree desc_type, 
tree *data_off,
 void gfc_nullify_descriptor (stmtblock_t *block, tree);
 void gfc_init_descriptor_result (stmtblock_t *block, tree descr);
 void gfc_init_absent_descriptor (stmtblock_t *block, tree descr);
-void gfc_init_static_descriptor (tree descr);
+void gfc_init_static_descriptor (gfc_symbol *);
 tree gfc_create_null_actual_descriptor (stmtblock_t *, gfc_typespec *,
symbol_attribute, int);
 
diff --git a/gcc/fortran/trans-expr.cc b/gcc/fortran/trans-expr.cc
index adfc287977b1..76ec12d23b48 100644
--- a/gcc/fortran/trans-expr.cc
+++ b/gcc/fortran/trans-expr.cc
@@ -5899,50 +5899,6 @@ expr_may_alias_variables (gfc_expr *e, bool 
array_may_alias)
 }
 
 
-/* A helper function to set the dtype for unallocated or unassociated
-   entities.  */
-
-static void
-set_dtype_for_unallocated (gfc_se *parmse, gfc_expr *e)
-{
-  tree tmp;
-  tree desc;
-  tree cond;
-  tree type;
-  stmtblock_t block;
-
-  /* TODO Figure out how to handle optional dummies.  */
-  if (e && e->expr_type == EXPR_VARIABLE
-  && e->symtree->n.sym->attr.optional)
-return;
-
-  desc = parmse->expr;
-  if (desc == NULL_TREE)
-return;
-
-  if (POINTER_TYPE_P (TREE_TYPE (desc)))
-desc = build_fold_indirect_ref_loc (input_location, desc);
-  if (GFC_CLASS_TYPE_P (TREE_TYPE (desc)))
-desc = gfc_class_data_get (desc);
-  if (!GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (desc)))
-return;
-
-  gfc_init_block (&block);
-  tmp = gfc_conv_descriptor_data_get (desc);
-  cond = fold_build2_loc (input_location, EQ_EXPR,
- logical_type_node, tmp,
- build_int_cst (TREE_TYPE (tmp), 0));
-  type = gfc_get_element_type (TREE_TYPE (desc));
-  gfc_conv_descriptor_dtype_set (&block, desc, 
-gfc_get_dtype_rank_type (e->rank, type));
-  cond = build3_v (COND_EXPR, cond,
-  gfc_finish_block (&block),
-  build_empty_stmt (input_location));
-  gfc_add_expr_to_block (&parmse->pre, cond);
-}
-
-
-
 /* Provide an interface between gfortra

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Refactoring descriptor_write

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:02ef2e63e20e3df6fb78abd54f1b3788af51f4e5

commit 02ef2e63e20e3df6fb78abd54f1b3788af51f4e5
Author: Mikael Morin 
Date:   Mon Aug 11 21:52:36 2025 +0200

Refactoring descriptor_write

Diff:
---
 gcc/fortran/trans-descriptor.cc | 31 ---
 1 file changed, 20 insertions(+), 11 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index d0ef2baf9966..a173530cbc70 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -722,6 +722,15 @@ gfc_get_dtype_rank_type (int rank, tree etype)
 }
 
 
+enum descriptor_write_case
+{
+  POINTER_NULLIFY,
+  RESULT_INIT,
+  ABSENT_ARG_INIT,
+  STATIC_INIT
+};
+
+
 class constructor_elements
 {
   vec *values;
@@ -754,22 +763,22 @@ constructor_elements::build (tree type)
 }
 
 
-struct write_destination
+struct descriptor_write
 {
-  enum write_type
+  const enum write_type
   {
 STATIC_INIT,
 REGULAR_ASSIGN
   }
   type;
 
-  tree ref;
+  const tree ref;
 
   union u
   {
 struct rw
 {
-  stmtblock_t *block;
+  stmtblock_t * const block;
 
   rw (stmtblock_t *b) : block(b) {}
 }
@@ -782,16 +791,16 @@ struct write_destination
   }
   u;
 
-  write_destination (tree r, stmtblock_t *b)
+  descriptor_write (tree r, stmtblock_t *b)
   : type (REGULAR_ASSIGN), ref (r), u (b) {}
-  write_destination (tree d) : type (STATIC_INIT), ref (d), u () {}
+  descriptor_write (tree d) : type (STATIC_INIT), ref (d), u () {}
 };
 
 
 static void
-set_descriptor_field (write_destination &dest, descriptor_field field, tree 
value)
+set_descriptor_field (descriptor_write &dest, descriptor_field field, tree 
value)
 {
-  if (dest.type == write_destination::STATIC_INIT)
+  if (dest.type == descriptor_write::STATIC_INIT)
 {
   tree field_decl = gfc_advance_chain (TYPE_FIELDS (TREE_TYPE (dest.ref)),
   field);
@@ -806,10 +815,10 @@ set_descriptor_field (write_destination &dest, 
descriptor_field field, tree valu
 
 
 static void
-set_descriptor (write_destination &dest)
+set_descriptor (descriptor_write &dest)
 {
   set_descriptor_field (dest, DATA_FIELD, null_pointer_node);
-  if (dest.type == write_destination::STATIC_INIT)
+  if (dest.type == descriptor_write::STATIC_INIT)
 {
   tree decl = dest.ref;
   tree type = TREE_TYPE (decl);
@@ -926,7 +935,7 @@ gfc_conv_descriptor_cosize (tree desc, int rank, int corank)
 void
 gfc_nullify_descriptor (stmtblock_t *block, tree descr)
 {
-  write_destination dest(descr, block);
+  descriptor_write dest(descr, block);
   set_descriptor (dest);
 }

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Refactoring set_dimension_fields set_pdt_array_descriptor

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:977ca8e46461052aaac11eb7fa0c45cde185a4fe

commit 977ca8e46461052aaac11eb7fa0c45cde185a4fe
Author: Mikael Morin 
Date:   Sat Aug 16 19:09:50 2025 +0200

Refactoring set_dimension_fields set_pdt_array_descriptor

Diff:
---
 gcc/fortran/trans-descriptor.cc | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index 510fc984de34..071840f0e871 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -2606,18 +2606,17 @@ gfc_set_pdt_array_descriptor (stmtblock_t *block, tree 
descr,
   gfc_conv_expr_type (&tse, e, gfc_array_index_type);
   gfc_free_expr (e);
   tree lower = tse.expr;
+
   gfc_conv_descriptor_lbound_set (block, descr, gfc_rank_cst[i], lower);
   e = gfc_copy_expr (as->upper[i]);
   gfc_insert_parameter_exprs (e, pdt_param_list);
   gfc_conv_expr_type (&tse, e, gfc_array_index_type);
   gfc_free_expr (e);
   tree upper = tse.expr;
-  gfc_conv_descriptor_ubound_set (block, descr, gfc_rank_cst[i], upper);
-  gfc_conv_descriptor_stride_set (block, descr, gfc_rank_cst[i], size);
-  size = gfc_evaluate_now (size, block);
-  offset = fold_build2_loc (input_location, MINUS_EXPR,
-   gfc_array_index_type, offset, size);
-  offset = gfc_evaluate_now (offset, block);
+
+  set_dimension_fields (block, descr, gfc_rank_cst[i], lower, upper, size,
+   &offset);
+
   tree tmp = fold_build2_loc (input_location, MINUS_EXPR,
  gfc_array_index_type, upper, lower);
   tmp = fold_build2_loc (input_location, PLUS_EXPR, gfc_array_index_type,

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Suppression déclarations inutiles

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:d7a905f48019205575f744b3e1128fe9018eaa98

commit d7a905f48019205575f744b3e1128fe9018eaa98
Author: Mikael Morin 
Date:   Wed Aug 6 21:38:11 2025 +0200

Suppression déclarations inutiles

Diff:
---
 gcc/fortran/trans-descriptor.h | 4 
 1 file changed, 4 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.h b/gcc/fortran/trans-descriptor.h
index 40e1586ce5f7..0881f0367316 100644
--- a/gcc/fortran/trans-descriptor.h
+++ b/gcc/fortran/trans-descriptor.h
@@ -61,14 +61,10 @@ tree gfc_conv_descriptor_sm_get (tree desc, tree dim);
 
 void gfc_conv_descriptor_data_set (stmtblock_t *block, tree desc, tree value);
 void gfc_conv_descriptor_data_set (stmtblock_t *block, tree desc, tree value);
-void gfc_conv_descriptor_offset_set (stmtblock_t *block, tree desc, tree 
value);
 void gfc_conv_descriptor_dtype_set (stmtblock_t *block, tree desc, tree value);
 void gfc_conv_descriptor_version_set (stmtblock_t *block, tree desc, tree 
value);
 void gfc_conv_descriptor_rank_set (stmtblock_t *block, tree desc, tree value);
 void gfc_conv_descriptor_rank_set (stmtblock_t *block, tree desc, int value);
-void gfc_conv_descriptor_dimension_set (stmtblock_t *block, tree desc, tree 
dim, tree value);
-void gfc_conv_descriptor_dimension_set (stmtblock_t *block, tree desc, int 
dim, tree value);
-void gfc_conv_descriptor_ubound_set (stmtblock_t *block, tree desc, tree dim, 
tree value);
 void gfc_conv_descriptor_token_set (stmtblock_t *block, tree desc, tree value);
 
 tree gfc_build_null_descriptor (tree type);

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Renseignement dtype initialisation statique

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:0f05d1555ac0e0c906fe012a5b349a2848c6f69e

commit 0f05d1555ac0e0c906fe012a5b349a2848c6f69e
Author: Mikael Morin 
Date:   Mon Aug 11 19:59:55 2025 +0200

Renseignement dtype initialisation statique

Diff:
---
 gcc/fortran/trans-descriptor.cc | 234 +++-
 gcc/fortran/trans-descriptor.h  |   2 +-
 2 files changed, 163 insertions(+), 73 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index a173530cbc70..d16127cf3ed7 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -727,7 +727,8 @@ enum descriptor_write_case
   POINTER_NULLIFY,
   RESULT_INIT,
   ABSENT_ARG_INIT,
-  STATIC_INIT
+  STATIC_INIT,
+  NONSTATIC_INIT
 };
 
 
@@ -797,6 +798,44 @@ struct descriptor_write
 };
 
 
+struct value_source
+{
+  const descriptor_write_case type;
+
+  union u
+  {
+struct nsi
+{
+  gfc_symbol * const sym;
+  gfc_expr * const expr;
+  tree string_length;
+
+  nsi (gfc_symbol *s, gfc_expr *e, tree sl)
+ : sym (s), expr (e), string_length (sl) {}
+}
+nonstatic_init;
+
+struct si
+{
+  gfc_symbol * const sym;
+
+  si (gfc_symbol *s) : sym (s) {}
+}
+static_init;
+
+u () {}
+u (gfc_symbol *s) : static_init (s) {}
+u (gfc_symbol *s, gfc_expr *e, tree sl) : nonstatic_init (s, e, sl) {}
+  }
+  u;
+
+  value_source (descriptor_write_case t) : type (t), u () {}
+  value_source (gfc_symbol *s) : type (STATIC_INIT), u (s) {}
+  value_source (gfc_symbol *s, gfc_expr *e, tree sl)
+  : type (NONSTATIC_INIT), u (s, e, sl) {}
+};
+
+
 static void
 set_descriptor_field (descriptor_write &dest, descriptor_field field, tree 
value)
 {
@@ -814,10 +853,117 @@ set_descriptor_field (descriptor_write &dest, 
descriptor_field field, tree value
 }
 
 
+static tree
+get_descriptor_data_value (const value_source &src)
+{
+  if (src.type == NONSTATIC_INIT)
+{
+  gfc_symbol *sym = src.u.nonstatic_init.sym;
+
+  symbol_attribute attr = gfc_symbol_attr (sym);
+  if (!attr.save
+ && (attr.allocatable
+ || (attr.pointer && (gfc_option.rtcheck & GFC_RTCHECK_POINTER
+   return null_pointer_node;
+  else
+   return NULL_TREE;
+}
+  else
+return null_pointer_node;
+}
+
+
+static tree
+get_descriptor_dtype_value (tree descr, const value_source &src)
+{
+  if (src.type == NONSTATIC_INIT)
+{
+  gfc_symbol *sym = src.u.nonstatic_init.sym;
+  gfc_expr *expr = src.u.nonstatic_init.expr;
+  tree string_length = src.u.nonstatic_init.string_length;
+
+  gfc_array_spec *as;
+  if (sym->ts.type == BT_CLASS)
+   as = CLASS_DATA (sym)->as;
+  else
+   as = sym->as;
+
+  int rank;
+  if (as == nullptr)
+   rank = 0;
+  else if (as->type != AS_ASSUMED_RANK)
+   rank = as->rank;
+  else if (expr)
+   rank = expr->rank;
+  else
+   rank = -1;
+
+  tree etype = gfc_get_element_type (TREE_TYPE (descr));
+  return gfc_get_dtype_rank_type_slen (rank, etype, string_length);
+}
+  else if (src.type == STATIC_INIT)
+{
+  gfc_symbol *sym = src.u.nonstatic_init.sym;
+
+  gfc_array_spec *as;
+  if (sym->ts.type == BT_CLASS)
+   as = CLASS_DATA (sym)->as;
+  else
+   as = sym->as;
+
+  int rank;
+  if (as == nullptr)
+   rank = 0;
+  else if (as->type != AS_ASSUMED_RANK)
+   rank = as->rank;
+  else
+   rank = -1;
+
+  tree etype = gfc_get_element_type (TREE_TYPE (descr));
+  return gfc_get_dtype_rank_type (rank, etype);
+}
+
+  return NULL_TREE;
+}
+
+
+static tree
+get_descriptor_offset_value (const value_source &src)
+{
+  if (src.type == NONSTATIC_INIT)
+{
+  gfc_symbol *sym = src.u.nonstatic_init.sym;
+
+  symbol_attribute attr = gfc_symbol_attr (sym);
+  if ((attr.allocatable
+  || attr.optional
+  || (attr.pointer && (gfc_option.rtcheck & GFC_RTCHECK_POINTER)))
+ && attr.codimension)
+   return null_pointer_node;
+}
+
+  return NULL_TREE;
+}
+
+
 static void
-set_descriptor (descriptor_write &dest)
+set_descriptor (descriptor_write &dest, const value_source &src)
 {
-  set_descriptor_field (dest, DATA_FIELD, null_pointer_node);
+  tree data_value = get_descriptor_data_value (src);
+  if (data_value != NULL_TREE)
+set_descriptor_field (dest, DATA_FIELD, data_value);
+
+  tree dtype_value = get_descriptor_dtype_value (dest.ref, src);
+  if (dtype_value != NULL_TREE)
+set_descriptor_field (dest, DTYPE_FIELD, dtype_value);
+
+  if (flag_coarray == GFC_FCOARRAY_LIB)
+{
+  tree offset_value = get_descriptor_offset_value (src);
+  if (offset_value != NULL_TREE)
+   set_descriptor_field (dest, OFFSET_FIELD, offset_value);
+}
+
   if (dest.type == descriptor_write::STATIC_INIT)
 {
   tree decl = dest.ref;
@@ -936,103 +1082,47 @@ void
 gfc_nullify_descriptor (stmtblock_t *block, tree de

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Extraction gfc_create_unallocated_library_result_descriptor

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:d8ec93c5d6d3546459546191d672d520893f2afc

commit d8ec93c5d6d3546459546191d672d520893f2afc
Author: Mikael Morin 
Date:   Wed Sep 10 20:38:07 2025 +0200

Extraction gfc_create_unallocated_library_result_descriptor

Diff:
---
 gcc/fortran/trans-descriptor.cc | 14 ++
 gcc/fortran/trans-descriptor.h  |  2 ++
 gcc/fortran/trans-expr.cc   | 10 ++
 3 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index 556a749fad6c..994e9543adab 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -2959,3 +2959,17 @@ gfc_set_empty_descriptor_bounds (stmtblock_t *block, 
tree descr, int rank)
 
   gfc_conv_descriptor_offset_set (block, descr, gfc_index_zero_node);
 }
+
+
+tree
+gfc_create_unallocated_library_result_descriptor (stmtblock_t *block, tree 
source_descr, tree dtype)
+{
+  if (dtype == NULL_TREE)
+dtype = gfc_get_dtype (TREE_TYPE (source_descr));
+
+  gfc_conv_descriptor_dtype_set (block, source_descr, dtype);
+  tree res_desc = gfc_evaluate_now (source_descr, block);
+  gfc_conv_descriptor_data_set (block, res_desc, null_pointer_node);
+
+  return res_desc;
+}
diff --git a/gcc/fortran/trans-descriptor.h b/gcc/fortran/trans-descriptor.h
index 52762c3c94a4..70dfab8b6f6d 100644
--- a/gcc/fortran/trans-descriptor.h
+++ b/gcc/fortran/trans-descriptor.h
@@ -144,5 +144,7 @@ gfc_descriptor_init_count (tree, int, int, gfc_expr **, 
gfc_expr **,
   tree, gfc_expr *, tree, bool, gfc_expr *, tree,
   bool, tree *);
 void gfc_set_empty_descriptor_bounds (stmtblock_t *, tree, int);
+tree gfc_create_unallocated_library_result_descriptor (stmtblock_t *, tree,
+  tree);
 
 #endif /* GFC_TRANS_DESCRIPTOR_H */
diff --git a/gcc/fortran/trans-expr.cc b/gcc/fortran/trans-expr.cc
index 90a0a49375b9..dae41a0818d8 100644
--- a/gcc/fortran/trans-expr.cc
+++ b/gcc/fortran/trans-expr.cc
@@ -11422,14 +11422,8 @@ fcncall_realloc_result (gfc_se *se, int rank, tree 
dtype)
 desc = build_fold_indirect_ref_loc (input_location, desc);
 
   /* Unallocated, the descriptor does not have a dtype.  */
-  if (dtype != NULL_TREE)
-gfc_conv_descriptor_dtype_set (&se->pre, desc, dtype);
-  else
-gfc_conv_descriptor_dtype_set (&se->pre, desc,
-  gfc_get_dtype (TREE_TYPE (desc)));
-
-  res_desc = gfc_evaluate_now (desc, &se->pre);
-  gfc_conv_descriptor_data_set (&se->pre, res_desc, null_pointer_node);
+  res_desc = gfc_create_unallocated_library_result_descriptor (&se->pre, desc,
+  dtype);
   se->expr = gfc_build_addr_expr (NULL_TREE, res_desc);
 
   /* Free the lhs after the function call and copy the result data to

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Refactor set_dimension_fields set_empty_descriptor

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:ddd02836b6198ca0d3b2e84fc5f61c7112c9e2ac

commit ddd02836b6198ca0d3b2e84fc5f61c7112c9e2ac
Author: Mikael Morin 
Date:   Sat Aug 16 19:17:56 2025 +0200

Refactor set_dimension_fields set_empty_descriptor

Diff:
---
 gcc/fortran/trans-descriptor.cc | 11 +++
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index 1b08120e74a3..9b296f17ed14 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -2952,15 +2952,10 @@ gfc_descriptor_init_count (tree descriptor, int rank, 
int corank,
 void
 gfc_set_empty_descriptor_bounds (stmtblock_t *block, tree descr, int rank)
 {
+  tree offset = gfc_index_zero_node;
   for (int n = 0; n < rank; n++)
-{
-  gfc_conv_descriptor_lbound_set (block, descr, gfc_rank_cst[n],
- gfc_index_one_node);
-  gfc_conv_descriptor_ubound_set (block, descr, gfc_rank_cst[n],
- gfc_index_zero_node);
-  gfc_conv_descriptor_stride_set (block, descr, gfc_rank_cst[n],
- gfc_index_zero_node);
-}
+set_dimension_fields (block, descr, gfc_rank_cst[n], gfc_index_one_node,
+ gfc_index_zero_node, gfc_index_zero_node, &offset);
 
   gfc_conv_descriptor_offset_set (block, descr, gfc_index_zero_node);
 }

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Extraction gfc_set_gfc_from_cfi

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:b4306bfee1cf9229ba9f1fd8efa094921ed87f3f

commit b4306bfee1cf9229ba9f1fd8efa094921ed87f3f
Author: Mikael Morin 
Date:   Tue Jul 22 12:17:50 2025 +0200

Extraction gfc_set_gfc_from_cfi

Diff:
---
 gcc/fortran/trans-descriptor.cc | 99 +
 gcc/fortran/trans-descriptor.h  |  3 ++
 gcc/fortran/trans-expr.cc   | 92 +-
 3 files changed, 103 insertions(+), 91 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index 28031526ad76..c8352f46c6c7 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -1793,3 +1793,102 @@ gfc_set_descriptor_with_shape (stmtblock_t *block, tree 
desc, tree ptr,
   gfc_array_index_type, offset));
   gfc_conv_descriptor_offset_set (block, desc, offset);
 }
+
+
+void
+gfc_set_gfc_from_cfi (stmtblock_t *block, tree gfc, gfc_expr *e, tree rank,
+ tree gfc_strlen, tree cfi, gfc_symbol *fsym)
+{
+  stmtblock_t block2;
+  gfc_init_block (&block2);
+  if (e->rank == 0)
+{
+  tree tmp = gfc_get_cfi_desc_base_addr (cfi);
+  gfc_add_modify (block, gfc, fold_convert (TREE_TYPE (gfc), tmp));
+}
+  else
+{
+  tree tmp = gfc_get_cfi_desc_base_addr (cfi);
+  gfc_conv_descriptor_data_set (block, gfc, tmp);
+
+  if (fsym->attr.allocatable)
+   {
+ /* gfc->span = cfi->elem_len.  */
+ tmp = fold_convert (gfc_array_index_type,
+ gfc_get_cfi_dim_sm (cfi, gfc_rank_cst[0]));
+   }
+  else
+   {
+ /* gfc->span = ((cfi->dim[0].sm % cfi->elem_len)
+ ? cfi->dim[0].sm : cfi->elem_len).  */
+ tmp = gfc_get_cfi_dim_sm (cfi, gfc_rank_cst[0]);
+ tree tmp2 = fold_convert (gfc_array_index_type,
+   gfc_get_cfi_desc_elem_len (cfi));
+ tmp = fold_build2_loc (input_location, TRUNC_MOD_EXPR,
+gfc_array_index_type, tmp, tmp2);
+ tmp = fold_build2_loc (input_location, NE_EXPR, boolean_type_node,
+tmp, gfc_index_zero_node);
+ tmp = build3_loc (input_location, COND_EXPR, gfc_array_index_type, 
tmp,
+   gfc_get_cfi_dim_sm (cfi, gfc_rank_cst[0]), tmp2);
+   }
+  gfc_conv_descriptor_span_set (&block2, gfc, tmp);
+
+  /* Calculate offset + set lbound, ubound and stride.  */
+  gfc_conv_descriptor_offset_set (&block2, gfc, gfc_index_zero_node);
+  /* Loop: for (i = 0; i < rank; ++i).  */
+  tree idx = gfc_create_var (TREE_TYPE (rank), "idx");
+  /* Loop body.  */
+  stmtblock_t loop_body;
+  gfc_init_block (&loop_body);
+  /* gfc->dim[i].lbound = ... */
+  tmp = gfc_get_cfi_dim_lbound (cfi, idx);
+  gfc_conv_descriptor_lbound_set (&loop_body, gfc, idx, tmp);
+
+  /* gfc->dim[i].ubound = gfc->dim[i].lbound + cfi->dim[i].extent - 1. */
+  tmp = fold_build2_loc (input_location, MINUS_EXPR, gfc_array_index_type,
+gfc_conv_descriptor_lbound_get (gfc, idx),
+gfc_index_one_node);
+  tmp = fold_build2_loc (input_location, PLUS_EXPR, gfc_array_index_type,
+gfc_get_cfi_dim_extent (cfi, idx), tmp);
+  gfc_conv_descriptor_ubound_set (&loop_body, gfc, idx, tmp);
+
+  /* gfc->dim[i].stride = cfi->dim[i].sm / cfi>elem_len */
+  tmp = gfc_get_cfi_dim_sm (cfi, idx);
+  tmp = fold_build2_loc (input_location, TRUNC_DIV_EXPR,
+gfc_array_index_type, tmp,
+fold_convert (gfc_array_index_type,
+  gfc_get_cfi_desc_elem_len (cfi)));
+  gfc_conv_descriptor_stride_set (&loop_body, gfc, idx, tmp);
+
+  /* gfc->offset -= gfc->dim[i].stride * gfc->dim[i].lbound. */
+  tmp = fold_build2_loc (input_location, MULT_EXPR, gfc_array_index_type,
+gfc_conv_descriptor_stride_get (gfc, idx),
+gfc_conv_descriptor_lbound_get (gfc, idx));
+  tmp = fold_build2_loc (input_location, MINUS_EXPR, gfc_array_index_type,
+gfc_conv_descriptor_offset_get (gfc), tmp);
+  gfc_conv_descriptor_offset_set (&loop_body, gfc, tmp);
+  /* Generate loop.  */
+  gfc_simple_for_loop (&block2, idx, build_int_cst (TREE_TYPE (idx), 0),
+  rank, LT_EXPR, build_int_cst (TREE_TYPE (idx), 1),
+  gfc_finish_block (&loop_body));
+}
+
+  if (e->ts.type == BT_CHARACTER && !e->ts.u.cl->length)
+{
+  tree tmp = fold_convert (gfc_charlen_type_node,
+  gfc_get_cfi_desc_elem_len (cfi));
+  if (e->ts.kind != 1)
+   tmp = fold_build2_loc (input_location, TRUNC_DIV_EXPR,
+  gfc_charlen_type_node, tmp,
+  buil

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Reindentation retour à la ligne set_descriptor_with_shape

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:ef17aa126159c5a864e3b79ded81fade97e9f25d

commit ef17aa126159c5a864e3b79ded81fade97e9f25d
Author: Mikael Morin 
Date:   Sun Aug 17 19:43:40 2025 +0200

Reindentation retour à la ligne set_descriptor_with_shape

Diff:
---
 gcc/fortran/trans-descriptor.cc | 20 +++-
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index 60cb6f1b9798..d283c741767f 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -1755,11 +1755,12 @@ gfc_set_descriptor_with_shape (stmtblock_t *block, tree 
desc, tree ptr,
 
   gfc_conv_expr (&shapese, shape);
   gfc_add_block_to_block (&body, &shapese.pre);
-  tree ubound = fold_build2_loc (
-input_location, MINUS_EXPR, gfc_array_index_type,
-fold_build2_loc (input_location, PLUS_EXPR, gfc_array_index_type, lbound,
-fold_convert (gfc_array_index_type, shapese.expr)),
-gfc_index_one_node);
+  tmp = fold_build2_loc (input_location, MINUS_EXPR, gfc_array_index_type,
+lbound, gfc_index_one_node);
+  tree ubound = fold_build2_loc (input_location, PLUS_EXPR,
+gfc_array_index_type, tmp,
+fold_convert (gfc_array_index_type,
+  shapese.expr));
   gfc_conv_descriptor_ubound_set (&body, desc, dim, ubound);
   gfc_add_block_to_block (&body, &shapese.post);
 
@@ -1771,10 +1772,11 @@ gfc_set_descriptor_with_shape (stmtblock_t *block, tree 
desc, tree ptr,
   gfc_array_index_type, offset, tmp));
 
   /* Update stride.  */
-  gfc_add_modify (
-&body, stride,
-fold_build2_loc (input_location, MULT_EXPR, gfc_array_index_type, stride,
-fold_convert (gfc_array_index_type, shapese.expr)));
+  gfc_add_modify (&body, stride,
+ fold_build2_loc (input_location, MULT_EXPR,
+  gfc_array_index_type, stride,
+  fold_convert (gfc_array_index_type,
+shapese.expr)));
   /* Finish scalarization loop.  */
   gfc_trans_scalarizing_loops (&loop, &body);
   gfc_add_block_to_block (block, &loop.pre);

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Extraction gfc_set_descriptor_for_assign_realloc

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:1049972d78c173a29853b088c117864cfe96d5da

commit 1049972d78c173a29853b088c117864cfe96d5da
Author: Mikael Morin 
Date:   Thu Jul 31 12:11:15 2025 +0200

Extraction gfc_set_descriptor_for_assign_realloc

Diff:
---
 gcc/fortran/trans-array.cc  | 228 ++--
 gcc/fortran/trans-array.h   |   1 +
 gcc/fortran/trans-descriptor.cc | 215 +
 gcc/fortran/trans-descriptor.h  |   3 +
 4 files changed, 225 insertions(+), 222 deletions(-)

diff --git a/gcc/fortran/trans-array.cc b/gcc/fortran/trans-array.cc
index 6d7620b2046a..f0b3b2e2b557 100644
--- a/gcc/fortran/trans-array.cc
+++ b/gcc/fortran/trans-array.cc
@@ -10571,76 +10571,6 @@ gfc_check_pdt_dummy (gfc_symbol * der_type, tree decl, 
int rank,
 }
 
 
-/* Returns the value of LBOUND for an expression.  This could be broken out
-   from gfc_conv_intrinsic_bound but this seemed to be simpler.  This is
-   called by gfc_alloc_allocatable_for_assignment.  */
-static tree
-get_std_lbound (gfc_expr *expr, tree desc, int dim, bool assumed_size)
-{
-  tree lbound;
-  tree ubound;
-  tree stride;
-  tree cond, cond1, cond3, cond4;
-  tree tmp;
-  gfc_ref *ref;
-
-  if (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (desc)))
-{
-  tmp = gfc_rank_cst[dim];
-  lbound = gfc_conv_descriptor_lbound_get (desc, tmp);
-  ubound = gfc_conv_descriptor_ubound_get (desc, tmp);
-  stride = gfc_conv_descriptor_stride_get (desc, tmp);
-  cond1 = fold_build2_loc (input_location, GE_EXPR, logical_type_node,
-  ubound, lbound);
-  cond3 = fold_build2_loc (input_location, GE_EXPR, logical_type_node,
-  stride, gfc_index_zero_node);
-  cond3 = fold_build2_loc (input_location, TRUTH_AND_EXPR,
-  logical_type_node, cond3, cond1);
-  cond4 = fold_build2_loc (input_location, LT_EXPR, logical_type_node,
-  stride, gfc_index_zero_node);
-  if (assumed_size)
-   cond = fold_build2_loc (input_location, EQ_EXPR, logical_type_node,
-   tmp, build_int_cst (gfc_array_index_type,
-   expr->rank - 1));
-  else
-   cond = logical_false_node;
-
-  cond1 = fold_build2_loc (input_location, TRUTH_OR_EXPR,
-  logical_type_node, cond3, cond4);
-  cond = fold_build2_loc (input_location, TRUTH_OR_EXPR,
- logical_type_node, cond, cond1);
-
-  return fold_build3_loc (input_location, COND_EXPR,
- gfc_array_index_type, cond,
- lbound, gfc_index_one_node);
-}
-
-  if (expr->expr_type == EXPR_FUNCTION)
-{
-  /* A conversion function, so use the argument.  */
-  gcc_assert (expr->value.function.isym
- && expr->value.function.isym->conversion);
-  expr = expr->value.function.actual->expr;
-}
-
-  if (expr->expr_type == EXPR_VARIABLE)
-{
-  tmp = TREE_TYPE (expr->symtree->n.sym->backend_decl);
-  for (ref = expr->ref; ref; ref = ref->next)
-   {
- if (ref->type == REF_COMPONENT
-   && ref->u.c.component->as
-   && ref->next
-   && ref->next->u.ar.type == AR_FULL)
-   tmp = TREE_TYPE (ref->u.c.component->backend_decl);
-   }
-  return GFC_TYPE_ARRAY_LBOUND(tmp, dim);
-}
-
-  return gfc_index_one_node;
-}
-
-
 /* Returns true if an expression represents an lhs that can be reallocated
on assignment.  */
 
@@ -10790,8 +10720,8 @@ concat_str_length (gfc_expr* expr)
At the end of the function, the expressions have been replaced with variable
references.  */
 
-static void
-update_reallocated_descriptor (stmtblock_t *block, gfc_loopinfo *loop)
+void
+gfc_update_reallocated_descriptor (stmtblock_t *block, gfc_loopinfo *loop)
 {
   for (gfc_ss *s = loop->ss; s != gfc_ss_terminator; s = s->loop_chain)
 {
@@ -10844,7 +10774,6 @@ gfc_alloc_allocatable_for_assignment (gfc_loopinfo 
*loop,
   gfc_array_info *linfo;
   tree realloc_expr;
   tree alloc_expr;
-  tree size1;
   tree size2;
   tree elemsize1;
   tree elemsize2;
@@ -10852,19 +10781,15 @@ gfc_alloc_allocatable_for_assignment (gfc_loopinfo 
*loop,
   tree cond_null;
   tree cond;
   tree tmp;
-  tree tmp2;
   tree lbound;
   tree ubound;
   tree desc;
   tree old_desc;
   tree desc2;
-  tree offset;
   tree jump_label1;
   tree jump_label2;
-  tree lbd;
   tree class_expr2 = NULL_TREE;
   int n;
-  gfc_array_spec * as;
   bool coarray = (flag_coarray == GFC_FCOARRAY_LIB
  && gfc_caf_attr (expr1, true).codimension);
   tree token;
@@ -11090,20 +11015,6 @@ gfc_alloc_allocatable_for_assignment (gfc_loopinfo 
*loop,
  build_empty_stmt (input_location));
   gfc_add_expr_to_block (&fblock, tmp);
 
-  /* Get arrayspec if expr is a full array.  */
-  if (expr2 && expr2->expr_type

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Déroulement boucle set_gfc_from_cfi

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:630597274f6000a42b6b2b590bf34e84be962d03

commit 630597274f6000a42b6b2b590bf34e84be962d03
Author: Mikael Morin 
Date:   Fri Aug 15 15:42:37 2025 +0200

Déroulement boucle set_gfc_from_cfi

Diff:
---
 gcc/fortran/trans-descriptor.cc | 78 ++---
 1 file changed, 42 insertions(+), 36 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index d6fe1fc91c01..a26a3b2b01a9 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -2042,26 +2042,6 @@ gfc_set_gfc_from_cfi (stmtblock_t *block, stmtblock_t 
*block2, tree gfc_desc,
   tree offset = gfc_create_var (gfc_array_index_type, "offset");
   gfc_add_modify (block2, offset, gfc_index_zero_node);
 
-  if (sym->as->rank > 0 && !sym->attr.pointer && !sym->attr.allocatable)
-for (int i = 0; i < sym->as->rank; ++i)
-  {
-   gfc_se se;
-   gfc_init_se (&se, NULL );
-   if (sym->as->lower[i])
- {
-   gfc_conv_expr (&se, sym->as->lower[i]);
-   tmp = se.expr;
- }
-   else
- tmp = gfc_index_one_node;
-   gfc_add_block_to_block (block2, &se.pre);
-   gfc_conv_descriptor_lbound_set (block2, gfc_desc, gfc_rank_cst[i], tmp);
-   gfc_add_block_to_block (block2, &se.post);
-  }
-
-  /* Loop: for (i = 0; i < rank; ++i).  */
-  tree idx = gfc_create_var (TREE_TYPE (rank), "idx");
-
   /* Stride  */
   tree stride;
   if (do_copy_inout)
@@ -2069,25 +2049,51 @@ gfc_set_gfc_from_cfi (stmtblock_t *block, stmtblock_t 
*block2, tree gfc_desc,
   else
 stride = NULL_TREE;
 
-  /* Loop body.  */
-  stmtblock_t loop_body;
-  gfc_init_block (&loop_body);
-  /* gfc->dim[i].lbound = ... */
-  tree lbound;
-  if (sym->attr.pointer || sym->attr.allocatable)
-lbound = gfc_get_cfi_dim_lbound (cfi, idx);
-  else if (sym->as->rank < 0)
-lbound = gfc_index_one_node;
+  if (sym->as->rank > 0 && !sym->attr.pointer && !sym->attr.allocatable)
+{
+  for (int i = 0; i < sym->as->rank; ++i)
+   {
+ gfc_se se;
+ gfc_init_se (&se, NULL );
+ if (sym->as->lower[i])
+   {
+ gfc_conv_expr (&se, sym->as->lower[i]);
+ tmp = se.expr;
+   }
+ else
+   tmp = gfc_index_one_node;
+ gfc_add_block_to_block (block2, &se.pre);
+ tree lbound = gfc_evaluate_now (tmp, block2);
+ gfc_add_block_to_block (block2, &se.post);
+ set_gfc_dimension_from_cfi (block2, gfc_desc, cfi, gfc_rank_cst[i],
+ lbound, offset, stride, do_copy_inout);
+   }
+}
   else
-lbound = gfc_conv_descriptor_lbound_get (gfc_desc, idx);
+{
+  /* Loop: for (i = 0; i < rank; ++i).  */
+  tree idx = gfc_create_var (TREE_TYPE (rank), "idx");
 
-  set_gfc_dimension_from_cfi (&loop_body, gfc_desc, cfi, idx, lbound, offset,
- stride, do_copy_inout);
+  /* Loop body.  */
+  stmtblock_t loop_body;
+  gfc_init_block (&loop_body);
+  /* gfc->dim[i].lbound = ... */
+  tree lbound;
+  if (sym->attr.pointer || sym->attr.allocatable)
+   lbound = gfc_get_cfi_dim_lbound (cfi, idx);
+  else if (sym->as->rank < 0)
+   lbound = gfc_index_one_node;
+  else
+   gcc_unreachable ();
 
-  /* Generate loop.  */
-  gfc_simple_for_loop (block2, idx, build_zero_cst (TREE_TYPE (idx)),
-  rank, LT_EXPR, build_int_cst (TREE_TYPE (idx), 1),
-  gfc_finish_block (&loop_body));
+  set_gfc_dimension_from_cfi (&loop_body, gfc_desc, cfi, idx, lbound, 
offset,
+ stride, do_copy_inout);
+
+  /* Generate loop.  */
+  gfc_simple_for_loop (block2, idx, build_zero_cst (TREE_TYPE (idx)),
+  rank, LT_EXPR, build_int_cst (TREE_TYPE (idx), 1),
+  gfc_finish_block (&loop_body));
+}
 
   gfc_conv_descriptor_offset_set (block2, gfc_desc, offset);
 }

[gcc(refs/users/mikael/heads/refactor_descriptor_v08)] Refactor set_dimension_bounds

[Mikael Morin via Gcc-cvs]

https://gcc.gnu.org/g:c2a505ae9ac7f2efc273e4005d1a058bc2fb955a

commit c2a505ae9ac7f2efc273e4005d1a058bc2fb955a
Author: Mikael Morin 
Date:   Fri Aug 15 22:08:28 2025 +0200

Refactor set_dimension_bounds

Correction régression pr85938

Diff:
---
 gcc/fortran/trans-descriptor.cc | 54 ++---
 1 file changed, 34 insertions(+), 20 deletions(-)

diff --git a/gcc/fortran/trans-descriptor.cc b/gcc/fortran/trans-descriptor.cc
index a26a3b2b01a9..cddffac71246 100644
--- a/gcc/fortran/trans-descriptor.cc
+++ b/gcc/fortran/trans-descriptor.cc
@@ -989,13 +989,40 @@ gfc_set_descriptor_from_scalar (stmtblock_t *block, tree 
descr,
 }
 
 
+static void
+set_dimension_bounds (stmtblock_t * block, tree descr, tree dim,
+ tree lbound, tree ubound, tree stride, tree *offset)
+{
+  lbound = gfc_evaluate_now (lbound, block);
+
+  gfc_conv_descriptor_ubound_set (block, descr, dim, ubound);
+
+  tree tmp = fold_build2_loc (input_location, MULT_EXPR,
+ gfc_array_index_type, lbound, stride);
+  *offset = fold_build2_loc (input_location, MINUS_EXPR,
+gfc_array_index_type, *offset, tmp);
+
+  /* Finally set lbound to value we want.  */
+  gfc_conv_descriptor_lbound_set (block, descr, dim, lbound);
+}
+
+
+static void
+set_dimension_bounds (stmtblock_t * block, tree descr, tree dim,
+ tree lbound, tree ubound, tree stride, tree offset_var)
+{
+  tree offset = offset_var;
+  set_dimension_bounds (block, descr, dim, lbound, ubound, stride, &offset);
+  gfc_add_modify (block, offset_var, offset);
+}
+
+
 static void
 shift_dimension_bounds (stmtblock_t * block, tree descr, tree dim,
tree new_lbound, tree orig_lbound, tree orig_ubound,
tree orig_stride, tree *offset_value)
 {
   new_lbound = fold_convert (gfc_array_index_type, new_lbound);
-  new_lbound = gfc_evaluate_now (new_lbound, block);
 
   orig_stride = gfc_evaluate_now (orig_stride, block);
 
@@ -1007,14 +1034,9 @@ shift_dimension_bounds (stmtblock_t * block, tree descr, 
tree dim,
  updating the lbound, as they depend on the lbound expression!  */
   tree ubound = fold_build2_loc (input_location, PLUS_EXPR,
 gfc_array_index_type, orig_ubound, diff);
-  gfc_conv_descriptor_ubound_set (block, descr, dim, ubound);
-  tree tmp = fold_build2_loc (input_location, MULT_EXPR,
- gfc_array_index_type, new_lbound, orig_stride);
-  *offset_value = fold_build2_loc (input_location, MINUS_EXPR,
-  gfc_array_index_type, *offset_value, tmp);
 
-  /* Finally set lbound to value we want.  */
-  gfc_conv_descriptor_lbound_set (block, descr, dim, new_lbound);
+  set_dimension_bounds (block, descr, dim, new_lbound, ubound, orig_stride,
+   offset_value);
 }
 
 
@@ -1802,15 +1824,12 @@ set_gfc_dimension_from_cfi (stmtblock_t *block, tree 
gfc, tree cfi, tree idx,
 {
   /* gfc->dim[i].lbound = ... */
   lbound = fold_convert (gfc_array_index_type, lbound);
-  lbound = gfc_evaluate_now (lbound, block);
-  gfc_conv_descriptor_lbound_set (block, gfc, idx, lbound);
 
   /* gfc->dim[i].ubound = gfc->dim[i].lbound + cfi->dim[i].extent - 1. */
   tree tmp = fold_build2_loc (input_location, MINUS_EXPR, gfc_array_index_type,
  lbound, gfc_index_one_node);
-  tmp = fold_build2_loc (input_location, PLUS_EXPR, gfc_array_index_type,
-gfc_get_cfi_dim_extent (cfi, idx), tmp);
-  gfc_conv_descriptor_ubound_set (block, gfc, idx, tmp);
+  tree ubound = fold_build2_loc (input_location, PLUS_EXPR, 
gfc_array_index_type,
+gfc_get_cfi_dim_extent (cfi, idx), tmp);
 
   tree stride;
   if (contiguous)
@@ -1839,14 +1858,9 @@ set_gfc_dimension_from_cfi (stmtblock_t *block, tree 
gfc, tree cfi, tree idx,
   gfc_get_cfi_desc_elem_len (cfi)));
   stride = gfc_evaluate_now (tmp, block);
 }
-  gfc_conv_descriptor_stride_set (block, gfc, idx, stride);
 
-  /* gfc->offset -= gfc->dim[i].stride * gfc->dim[i].lbound. */
-  tmp = fold_build2_loc (input_location, MULT_EXPR, gfc_array_index_type,
-stride, lbound);
-  tmp = fold_build2_loc (input_location, MINUS_EXPR, gfc_array_index_type,
-offset_var, tmp);
-  gfc_add_modify (block, offset_var, tmp);
+  set_dimension_bounds (block, gfc, idx, lbound, ubound, stride, offset_var);
+  gfc_conv_descriptor_stride_set (block, gfc, idx, stride);
 }