https://gcc.gnu.org/g:6d64a123d1039ae94045ba8800c3474ae7cbf164

commit 6d64a123d1039ae94045ba8800c3474ae7cbf164
Author: Michael Meissner <meiss...@linux.ibm.com>
Date:   Sun Sep 21 16:38:55 2025 -0400

    Remove internal -mpower10 support.
    
    2025-09-21  Michael Meissner  <meiss...@linux.ibm.com>
    
    gcc/
    
            * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Drop 
-mpower10
            ISA option.
            (POWERPC_MASKS): Likewise.
            * config/rs6000/rs6000.cc (rs6000_opt_masks): Likewise.
            * config/rs6000/rs6000.h (TARGET_POWER10): New macro.
            * config/rs6000/rs6000.opt (-mpower10): Drop power11 from being an 
ISA
            option.

Diff:
---
 gcc/config/rs6000/rs6000-cpus.def | 2 --
 gcc/config/rs6000/rs6000.cc       | 1 -
 gcc/config/rs6000/rs6000.h        | 2 ++
 gcc/config/rs6000/rs6000.opt      | 2 +-
 4 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 3102d88525bb..bec532f42b80 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -119,7 +119,6 @@
                                 | OPTION_MASK_PREFIXED)
 
 #define ISA_3_1_MASKS_SERVER   (ISA_3_0_MASKS_SERVER                   \
-                                | OPTION_MASK_POWER10                  \
                                 | OTHER_POWER10_MASKS)
 
 #define POWER11_MASKS_SERVER   ISA_3_1_MASKS_SERVER
@@ -164,7 +163,6 @@
                                 | OPTION_MASK_FLOAT128_HW              \
                                 | OPTION_MASK_FLOAT128_KEYWORD         \
                                 | OPTION_MASK_FPRND                    \
-                                | OPTION_MASK_POWER10                  \
                                 | OPTION_MASK_P10_FUSION               \
                                 | OPTION_MASK_HTM                      \
                                 | OPTION_MASK_ISEL                     \
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 5daca441c71a..440b76140bfc 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -24481,7 +24481,6 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128",                        OPTION_MASK_FLOAT128_KEYWORD,   false, 
true  },
   { "float128-hardware",       OPTION_MASK_FLOAT128_HW,        false, true  },
   { "fprnd",                   OPTION_MASK_FPRND,              false, true  },
-  { "power10",                 OPTION_MASK_POWER10,            false, true  },
   { "hard-dfp",                        OPTION_MASK_DFP,                false, 
true  },
   { "htm",                     OPTION_MASK_HTM,                false, true  },
   { "isel",                    OPTION_MASK_ISEL,               false, true  },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 78c674b1e05d..1d63d5f1ca38 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -558,6 +558,8 @@ extern int rs6000_vector_align[];
 
 /* ISA bits that are set via -mcpu=<xxx>, but that do not have an associated
    switch with the option.  */
+#define TARGET_POWER10                                                 \
+  ((rs6000_cpu_option_flags & CPU_OPTION_POWER10_MASK) != 0)
 #define TARGET_POWER11                                                 \
   ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
 #define TARGET_FUTURE                                                  \
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index fb323beff9b4..451afabe2c1f 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -596,7 +596,7 @@ mspeculate-indirect-jumps
 Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save
 
 mpower10
-Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
+Target Undocumented WarnRemoved
 
 mpower11
 Target Undocumented WarnRemoved

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