[dpdk-dev][PATCH v2 1/3] common/cnxk: add ROC support to parse cnxk custom sa action

[kirankumark]

From: Kiran Kumar K 

Adding ROC Flow changes to parse custom SA action for cnxk device.
When custom sa action is enabled, VTAG actions are not allowed.
And custom SA index will be calculated based on SA_HI and SA_LO
values. This allows the potential for a MCAM entry to match
many SAs, rather than only match a single SA.

Signed-off-by: Kiran Kumar K 
---
 drivers/common/cnxk/roc_nix.h |  1 +
 drivers/common/cnxk/roc_nix_inl.c | 13 ---
 drivers/common/cnxk/roc_npc.c | 58 +++
 drivers/common/cnxk/roc_npc.h | 19 ++
 4 files changed, 86 insertions(+), 5 deletions(-)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index dbb816d961..7313cc4d36 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -405,6 +405,7 @@ struct roc_nix {
bool io_enabled;
bool rx_ptp_ena;
uint16_t cints;
+   bool custom_sa_action;
 
 #define ROC_NIX_MEM_SZ (6 * 1024)
uint8_t reserved[ROC_NIX_MEM_SZ] __plt_cache_aligned;
diff --git a/drivers/common/cnxk/roc_nix_inl.c 
b/drivers/common/cnxk/roc_nix_inl.c
index 826c6e99c1..e14f8a1f32 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -217,6 +217,14 @@ roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix, bool 
inb_inl_dev, uint32_t spi)
if (!sa_base)
return 0;
 
+   /* Get SA size */
+   sz = roc_nix_inl_inb_sa_sz(roc_nix, inb_inl_dev);
+   if (!sz)
+   return 0;
+
+   if (roc_nix->custom_sa_action)
+   return (sa_base + (spi * sz));
+
/* Check if SPI is in range */
mask = roc_nix_inl_inb_spi_range(roc_nix, inb_inl_dev, &min_spi,
 &max_spi);
@@ -224,11 +232,6 @@ roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix, bool 
inb_inl_dev, uint32_t spi)
plt_warn("Inbound SA SPI %u not in range (%u..%u)", spi,
 min_spi, max_spi);
 
-   /* Get SA size */
-   sz = roc_nix_inl_inb_sa_sz(roc_nix, inb_inl_dev);
-   if (!sz)
-   return 0;
-
/* Basic logic of SPI->SA for now */
return (sa_base + ((spi & mask) * sz));
 }
diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c
index fc88fd58bc..784f63d92a 100644
--- a/drivers/common/cnxk/roc_npc.c
+++ b/drivers/common/cnxk/roc_npc.c
@@ -293,6 +293,48 @@ roc_npc_validate_portid_action(struct roc_npc *roc_npc_src,
return 0;
 }
 
+static int
+npc_parse_msns_action(struct roc_npc *roc_npc, const struct roc_npc_action 
*act,
+ struct roc_npc_flow *flow, uint8_t *has_msns_action)
+{
+   const struct roc_npc_sec_action *sec_action;
+   union {
+   uint64_t reg;
+   union nix_rx_vtag_action_u act;
+   } vtag_act;
+
+   if (roc_npc->roc_nix->custom_sa_action == 0 ||
+   roc_model_is_cn9k() == 1 || act->conf == NULL)
+   return 0;
+
+   *has_msns_action = true;
+   sec_action = act->conf;
+
+   vtag_act.reg = 0;
+   vtag_act.act.sa_xor = sec_action->sa_xor;
+   vtag_act.act.sa_hi = sec_action->sa_hi;
+   vtag_act.act.sa_lo = sec_action->sa_lo;
+
+   switch (sec_action->alg) {
+   case ROC_NPC_SEC_ACTION_ALG0:
+   break;
+   case ROC_NPC_SEC_ACTION_ALG1:
+   vtag_act.act.vtag1_valid = false;
+   vtag_act.act.vtag1_lid = ROC_NPC_SEC_ACTION_ALG1;
+   break;
+   case ROC_NPC_SEC_ACTION_ALG2:
+   vtag_act.act.vtag1_valid = false;
+   vtag_act.act.vtag1_lid = ROC_NPC_SEC_ACTION_ALG2;
+   break;
+   default:
+   return -1;
+   }
+
+   flow->vtag_action = vtag_act.reg;
+
+   return 0;
+}
+
 static int
 npc_parse_actions(struct roc_npc *roc_npc, const struct roc_npc_attr *attr,
  const struct roc_npc_action actions[],
@@ -305,11 +347,13 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct 
roc_npc_attr *attr,
const struct roc_npc_action_queue *act_q;
const struct roc_npc_action_vf *vf_act;
bool vlan_insert_action = false;
+   uint8_t has_msns_act = 0;
int sel_act, req_act = 0;
uint16_t pf_func, vf_id;
int errcode = 0;
int mark = 0;
int rq = 0;
+   int rc = 0;
 
/* Initialize actions */
flow->ctr_id = NPC_COUNTER_NONE;
@@ -399,6 +443,12 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct 
roc_npc_attr *attr,
rq = 0;
pf_func = nix_inl_dev_pffunc_get();
}
+   rc = npc_parse_msns_action(roc_npc, actions, flow,
+  &has_msns_act);
+   if (rc) {
+   errcode = NPC_ERR_ACTION_NOTSUP;
+   goto err_exit;
+   

[dpdk-dev][PATCH v2 2/3] net/cnxk: add devargs support to parse custom SA action

[kirankumark]

From: Kiran Kumar K 

Adding devargs support to parse custom sa action.
Devargs can be specified in the following way.
-a 0002:02:00.0,custom_sa_act=1

Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/cnxk.rst   | 20 
 drivers/net/cnxk/cnxk_ethdev_devargs.c | 10 --
 2 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst
index 31c801fa04..e5087343ed 100644
--- a/doc/guides/nics/cnxk.rst
+++ b/doc/guides/nics/cnxk.rst
@@ -251,6 +251,26 @@ Runtime Config Options
With the above configuration, application can enable inline IPsec processing
for 128 outbound SAs.
 
+- ``Enable custom SA action`` (default ``0``)
+
+   Custom SA action can be enabled by specifying ``custom_sa_act`` ``devargs`` 
parameter.
+
+   For example::
+
+  -a 0002:02:00.0,custom_sa_act=1
+
+   With the above configuration, application can enable custom SA action. This
+   configuration allows the potential for a MCAM entry to match many SAs,
+   rather than only match a single SA.
+   For cnxk device sa_index will be calculated based on SPI value. So, it will
+   be 1 to 1 mapping. By enabling this devargs and setting a MCAM rule, will
+   allow application to configure the sa_index as part of session create. And
+   later original SPI value can be updated using session update.
+   For example, application can set sa_index as 0 using session create as SPI 
value
+   and later can update the original SPI value (for example 0x1001) using
+   session update. And create a flow rule with security action and algorithm as
+   RTE_PMD_CNXK_SEC_ACTION_ALG0 and sa_hi as 0x1000 and sa_lo as 0x0001.
+
 - ``Outbound CPT LF queue size`` (default ``8200``)
 
Size of Outbound CPT LF queue in number of descriptors can be specified by
diff --git a/drivers/net/cnxk/cnxk_ethdev_devargs.c 
b/drivers/net/cnxk/cnxk_ethdev_devargs.c
index 9b2beb6743..248582e1f6 100644
--- a/drivers/net/cnxk/cnxk_ethdev_devargs.c
+++ b/drivers/net/cnxk/cnxk_ethdev_devargs.c
@@ -245,6 +245,7 @@ parse_sdp_channel_mask(const char *key, const char *value, 
void *extra_args)
 #define CNXK_OUTB_NB_CRYPTO_QS "outb_nb_crypto_qs"
 #define CNXK_SDP_CHANNEL_MASK  "sdp_channel_mask"
 #define CNXK_FLOW_PRE_L2_INFO  "flow_pre_l2_info"
+#define CNXK_CUSTOM_SA_ACT "custom_sa_act"
 
 int
 cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev 
*dev)
@@ -263,9 +264,10 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, 
struct cnxk_eth_dev *dev)
struct sdp_channel sdp_chan;
uint16_t rss_tag_as_xor = 0;
uint16_t scalar_enable = 0;
-   uint8_t lock_rx_ctx = 0;
+   uint16_t custom_sa_act = 0;
struct rte_kvargs *kvlist;
uint16_t no_inl_dev = 0;
+   uint8_t lock_rx_ctx = 0;
 
memset(&sdp_chan, 0, sizeof(sdp_chan));
memset(&pre_l2_info, 0, sizeof(struct flow_pre_l2_size_info));
@@ -307,6 +309,8 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, 
struct cnxk_eth_dev *dev)
   &parse_sdp_channel_mask, &sdp_chan);
rte_kvargs_process(kvlist, CNXK_FLOW_PRE_L2_INFO,
   &parse_pre_l2_hdr_info, &pre_l2_info);
+   rte_kvargs_process(kvlist, CNXK_CUSTOM_SA_ACT, &parse_flag,
+  &custom_sa_act);
rte_kvargs_free(kvlist);
 
 null_devargs:
@@ -323,6 +327,7 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, 
struct cnxk_eth_dev *dev)
dev->nix.max_sqb_count = sqb_count;
dev->nix.reta_sz = reta_sz;
dev->nix.lock_rx_ctx = lock_rx_ctx;
+   dev->nix.custom_sa_action = custom_sa_act;
dev->npc.flow_prealloc_size = flow_prealloc_size;
dev->npc.flow_max_priority = flow_max_priority;
dev->npc.switch_header_type = switch_header_type;
@@ -350,4 +355,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_cnxk,
  CNXK_FLOW_PRE_L2_INFO "=<0-255>/<1-255>/<0-1>"
  CNXK_OUTB_NB_CRYPTO_QS "=<1-64>"
  CNXK_NO_INL_DEV "=0"
- CNXK_SDP_CHANNEL_MASK "=<1-4095>/<1-4095>");
+ CNXK_SDP_CHANNEL_MASK "=<1-4095>/<1-4095>"
+ CNXK_CUSTOM_SA_ACT "=1");
-- 
2.25.1

[dpdk-dev][PATCH v2 1/3] common/cnxk: add ROC support to parse cnxk custom sa action

[kirankumark]

From: Kiran Kumar K 

Adding ROC Flow changes to parse custom SA action for cnxk device.
When custom sa action is enabled, VTAG actions are not allowed.
And custom SA index will be calculated based on SA_HI and SA_LO
values. This allows the potential for a MCAM entry to match
many SAs, rather than only match a single SA.

Signed-off-by: Kiran Kumar K 
---
 drivers/common/cnxk/roc_nix.h |  1 +
 drivers/common/cnxk/roc_nix_inl.c | 13 ---
 drivers/common/cnxk/roc_npc.c | 58 +++
 drivers/common/cnxk/roc_npc.h | 19 ++
 4 files changed, 86 insertions(+), 5 deletions(-)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index dbb816d961..7313cc4d36 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -405,6 +405,7 @@ struct roc_nix {
bool io_enabled;
bool rx_ptp_ena;
uint16_t cints;
+   bool custom_sa_action;
 
 #define ROC_NIX_MEM_SZ (6 * 1024)
uint8_t reserved[ROC_NIX_MEM_SZ] __plt_cache_aligned;
diff --git a/drivers/common/cnxk/roc_nix_inl.c 
b/drivers/common/cnxk/roc_nix_inl.c
index 826c6e99c1..e14f8a1f32 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -217,6 +217,14 @@ roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix, bool 
inb_inl_dev, uint32_t spi)
if (!sa_base)
return 0;
 
+   /* Get SA size */
+   sz = roc_nix_inl_inb_sa_sz(roc_nix, inb_inl_dev);
+   if (!sz)
+   return 0;
+
+   if (roc_nix->custom_sa_action)
+   return (sa_base + (spi * sz));
+
/* Check if SPI is in range */
mask = roc_nix_inl_inb_spi_range(roc_nix, inb_inl_dev, &min_spi,
 &max_spi);
@@ -224,11 +232,6 @@ roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix, bool 
inb_inl_dev, uint32_t spi)
plt_warn("Inbound SA SPI %u not in range (%u..%u)", spi,
 min_spi, max_spi);
 
-   /* Get SA size */
-   sz = roc_nix_inl_inb_sa_sz(roc_nix, inb_inl_dev);
-   if (!sz)
-   return 0;
-
/* Basic logic of SPI->SA for now */
return (sa_base + ((spi & mask) * sz));
 }
diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c
index fc88fd58bc..784f63d92a 100644
--- a/drivers/common/cnxk/roc_npc.c
+++ b/drivers/common/cnxk/roc_npc.c
@@ -293,6 +293,48 @@ roc_npc_validate_portid_action(struct roc_npc *roc_npc_src,
return 0;
 }
 
+static int
+npc_parse_msns_action(struct roc_npc *roc_npc, const struct roc_npc_action 
*act,
+ struct roc_npc_flow *flow, uint8_t *has_msns_action)
+{
+   const struct roc_npc_sec_action *sec_action;
+   union {
+   uint64_t reg;
+   union nix_rx_vtag_action_u act;
+   } vtag_act;
+
+   if (roc_npc->roc_nix->custom_sa_action == 0 ||
+   roc_model_is_cn9k() == 1 || act->conf == NULL)
+   return 0;
+
+   *has_msns_action = true;
+   sec_action = act->conf;
+
+   vtag_act.reg = 0;
+   vtag_act.act.sa_xor = sec_action->sa_xor;
+   vtag_act.act.sa_hi = sec_action->sa_hi;
+   vtag_act.act.sa_lo = sec_action->sa_lo;
+
+   switch (sec_action->alg) {
+   case ROC_NPC_SEC_ACTION_ALG0:
+   break;
+   case ROC_NPC_SEC_ACTION_ALG1:
+   vtag_act.act.vtag1_valid = false;
+   vtag_act.act.vtag1_lid = ROC_NPC_SEC_ACTION_ALG1;
+   break;
+   case ROC_NPC_SEC_ACTION_ALG2:
+   vtag_act.act.vtag1_valid = false;
+   vtag_act.act.vtag1_lid = ROC_NPC_SEC_ACTION_ALG2;
+   break;
+   default:
+   return -1;
+   }
+
+   flow->vtag_action = vtag_act.reg;
+
+   return 0;
+}
+
 static int
 npc_parse_actions(struct roc_npc *roc_npc, const struct roc_npc_attr *attr,
  const struct roc_npc_action actions[],
@@ -305,11 +347,13 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct 
roc_npc_attr *attr,
const struct roc_npc_action_queue *act_q;
const struct roc_npc_action_vf *vf_act;
bool vlan_insert_action = false;
+   uint8_t has_msns_act = 0;
int sel_act, req_act = 0;
uint16_t pf_func, vf_id;
int errcode = 0;
int mark = 0;
int rq = 0;
+   int rc = 0;
 
/* Initialize actions */
flow->ctr_id = NPC_COUNTER_NONE;
@@ -399,6 +443,12 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct 
roc_npc_attr *attr,
rq = 0;
pf_func = nix_inl_dev_pffunc_get();
}
+   rc = npc_parse_msns_action(roc_npc, actions, flow,
+  &has_msns_act);
+   if (rc) {
+   errcode = NPC_ERR_ACTION_NOTSUP;
+   goto err_exit;
+   

[dpdk-dev][PATCH v2 2/3] net/cnxk: add devargs support to parse custom SA action

[kirankumark]

From: Kiran Kumar K 

Adding devargs support to parse custom sa action.
Devargs can be specified in the following way.
-a 0002:02:00.0,custom_sa_act=1

Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/cnxk.rst   | 20 
 drivers/net/cnxk/cnxk_ethdev_devargs.c | 10 --
 2 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst
index 31c801fa04..e5087343ed 100644
--- a/doc/guides/nics/cnxk.rst
+++ b/doc/guides/nics/cnxk.rst
@@ -251,6 +251,26 @@ Runtime Config Options
With the above configuration, application can enable inline IPsec processing
for 128 outbound SAs.
 
+- ``Enable custom SA action`` (default ``0``)
+
+   Custom SA action can be enabled by specifying ``custom_sa_act`` ``devargs`` 
parameter.
+
+   For example::
+
+  -a 0002:02:00.0,custom_sa_act=1
+
+   With the above configuration, application can enable custom SA action. This
+   configuration allows the potential for a MCAM entry to match many SAs,
+   rather than only match a single SA.
+   For cnxk device sa_index will be calculated based on SPI value. So, it will
+   be 1 to 1 mapping. By enabling this devargs and setting a MCAM rule, will
+   allow application to configure the sa_index as part of session create. And
+   later original SPI value can be updated using session update.
+   For example, application can set sa_index as 0 using session create as SPI 
value
+   and later can update the original SPI value (for example 0x1001) using
+   session update. And create a flow rule with security action and algorithm as
+   RTE_PMD_CNXK_SEC_ACTION_ALG0 and sa_hi as 0x1000 and sa_lo as 0x0001.
+
 - ``Outbound CPT LF queue size`` (default ``8200``)
 
Size of Outbound CPT LF queue in number of descriptors can be specified by
diff --git a/drivers/net/cnxk/cnxk_ethdev_devargs.c 
b/drivers/net/cnxk/cnxk_ethdev_devargs.c
index 9b2beb6743..248582e1f6 100644
--- a/drivers/net/cnxk/cnxk_ethdev_devargs.c
+++ b/drivers/net/cnxk/cnxk_ethdev_devargs.c
@@ -245,6 +245,7 @@ parse_sdp_channel_mask(const char *key, const char *value, 
void *extra_args)
 #define CNXK_OUTB_NB_CRYPTO_QS "outb_nb_crypto_qs"
 #define CNXK_SDP_CHANNEL_MASK  "sdp_channel_mask"
 #define CNXK_FLOW_PRE_L2_INFO  "flow_pre_l2_info"
+#define CNXK_CUSTOM_SA_ACT "custom_sa_act"
 
 int
 cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev 
*dev)
@@ -263,9 +264,10 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, 
struct cnxk_eth_dev *dev)
struct sdp_channel sdp_chan;
uint16_t rss_tag_as_xor = 0;
uint16_t scalar_enable = 0;
-   uint8_t lock_rx_ctx = 0;
+   uint16_t custom_sa_act = 0;
struct rte_kvargs *kvlist;
uint16_t no_inl_dev = 0;
+   uint8_t lock_rx_ctx = 0;
 
memset(&sdp_chan, 0, sizeof(sdp_chan));
memset(&pre_l2_info, 0, sizeof(struct flow_pre_l2_size_info));
@@ -307,6 +309,8 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, 
struct cnxk_eth_dev *dev)
   &parse_sdp_channel_mask, &sdp_chan);
rte_kvargs_process(kvlist, CNXK_FLOW_PRE_L2_INFO,
   &parse_pre_l2_hdr_info, &pre_l2_info);
+   rte_kvargs_process(kvlist, CNXK_CUSTOM_SA_ACT, &parse_flag,
+  &custom_sa_act);
rte_kvargs_free(kvlist);
 
 null_devargs:
@@ -323,6 +327,7 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, 
struct cnxk_eth_dev *dev)
dev->nix.max_sqb_count = sqb_count;
dev->nix.reta_sz = reta_sz;
dev->nix.lock_rx_ctx = lock_rx_ctx;
+   dev->nix.custom_sa_action = custom_sa_act;
dev->npc.flow_prealloc_size = flow_prealloc_size;
dev->npc.flow_max_priority = flow_max_priority;
dev->npc.switch_header_type = switch_header_type;
@@ -350,4 +355,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_cnxk,
  CNXK_FLOW_PRE_L2_INFO "=<0-255>/<1-255>/<0-1>"
  CNXK_OUTB_NB_CRYPTO_QS "=<1-64>"
  CNXK_NO_INL_DEV "=0"
- CNXK_SDP_CHANNEL_MASK "=<1-4095>/<1-4095>");
+ CNXK_SDP_CHANNEL_MASK "=<1-4095>/<1-4095>"
+ CNXK_CUSTOM_SA_ACT "=1");
-- 
2.25.1

[dpdk-dev][PATCH v2 3/3] net/cnxk: adding cnxk support to configure custom sa index

[kirankumark]

From: Kiran Kumar K 

Adding cnxk device driver support to configure custom sa index.
Custom sa index can be configured as part of the session create
as SPI, and later original SPI can be updated using session update.

Signed-off-by: Kiran Kumar K 
---
 doc/api/doxy-api-index.md   |   3 +-
 doc/api/doxy-api.conf.in|   1 +
 drivers/net/cnxk/cn10k_ethdev_sec.c | 107 +++-
 drivers/net/cnxk/cn9k_ethdev.c  |   6 ++
 drivers/net/cnxk/cn9k_ethdev_sec.c  |   2 +-
 drivers/net/cnxk/cnxk_ethdev.h  |   3 +-
 drivers/net/cnxk/cnxk_ethdev_sec.c  |  30 +---
 drivers/net/cnxk/cnxk_flow.c|   1 +
 drivers/net/cnxk/meson.build|   2 +
 drivers/net/cnxk/rte_pmd_cnxk.h |  94 
 drivers/net/cnxk/version.map|   7 ++
 11 files changed, 241 insertions(+), 15 deletions(-)
 create mode 100644 drivers/net/cnxk/rte_pmd_cnxk.h

diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md
index 4245b9635c..8f9564ee84 100644
--- a/doc/api/doxy-api-index.md
+++ b/doc/api/doxy-api-index.md
@@ -56,7 +56,8 @@ The public API headers are grouped by topics:
   [dpaa2_qdma] (@ref rte_pmd_dpaa2_qdma.h),
   [crypto_scheduler]   (@ref rte_cryptodev_scheduler.h),
   [dlb2]   (@ref rte_pmd_dlb2.h),
-  [ifpga]  (@ref rte_pmd_ifpga.h)
+  [ifpga]  (@ref rte_pmd_ifpga.h),
+  [cnxk]   (@ref rte_pmd_cnxk.h)
 
 - **memory**:
   [memseg] (@ref rte_memory.h),
diff --git a/doc/api/doxy-api.conf.in b/doc/api/doxy-api.conf.in
index db2ca9b6ed..b49942412d 100644
--- a/doc/api/doxy-api.conf.in
+++ b/doc/api/doxy-api.conf.in
@@ -12,6 +12,7 @@ INPUT   = @TOPDIR@/doc/api/doxy-api-index.md \
   @TOPDIR@/drivers/net/ark \
   @TOPDIR@/drivers/net/bnxt \
   @TOPDIR@/drivers/net/bonding \
+  @TOPDIR@/drivers/net/cnxk \
   @TOPDIR@/drivers/net/dpaa \
   @TOPDIR@/drivers/net/dpaa2 \
   @TOPDIR@/drivers/net/i40e \
diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c 
b/drivers/net/cnxk/cn10k_ethdev_sec.c
index 87bb691ab4..60ae5d7d99 100644
--- a/drivers/net/cnxk/cn10k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -502,7 +503,7 @@ cn10k_eth_sec_session_create(void *device,
  ROC_NIX_INL_OT_IPSEC_OUTB_SW_RSVD);
 
/* Alloc an sa index */
-   rc = cnxk_eth_outb_sa_idx_get(dev, &sa_idx);
+   rc = cnxk_eth_outb_sa_idx_get(dev, &sa_idx, ipsec->spi);
if (rc)
goto mempool_put;
 
@@ -657,6 +658,109 @@ cn10k_eth_sec_capabilities_get(void *device __rte_unused)
return cn10k_eth_sec_capabilities;
 }
 
+static int
+cn10k_eth_sec_session_update(void *device, struct rte_security_session *sess,
+struct rte_security_session_conf *conf)
+{
+   struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)device;
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct roc_ot_ipsec_inb_sa *inb_sa_dptr;
+   struct rte_security_ipsec_xform *ipsec;
+   struct rte_crypto_sym_xform *crypto;
+   struct cnxk_eth_sec_sess *eth_sec;
+   bool inbound;
+   int rc;
+
+   if (conf->action_type != RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL ||
+   conf->protocol != RTE_SECURITY_PROTOCOL_IPSEC)
+   return -ENOENT;
+
+   ipsec = &conf->ipsec;
+   crypto = conf->crypto_xform;
+   inbound = !!(ipsec->direction == RTE_SECURITY_IPSEC_SA_DIR_INGRESS);
+
+   eth_sec = cnxk_eth_sec_sess_get_by_sess(dev, sess);
+   if (!eth_sec)
+   return -ENOENT;
+
+   eth_sec->spi = conf->ipsec.spi;
+
+   if (inbound) {
+   inb_sa_dptr = (struct roc_ot_ipsec_inb_sa *)dev->inb.sa_dptr;
+   memset(inb_sa_dptr, 0, sizeof(struct roc_ot_ipsec_inb_sa));
+
+   rc = cnxk_ot_ipsec_inb_sa_fill(inb_sa_dptr, ipsec, crypto,
+  true);
+   if (rc)
+   return -EINVAL;
+
+   rc = roc_nix_inl_ctx_write(&dev->nix, inb_sa_dptr, eth_sec->sa,
+  eth_sec->inb,
+  sizeof(struct roc_ot_ipsec_inb_sa));
+   if (rc)
+   return -EINVAL;
+   } else {
+   struct roc_ot_ipsec_outb_sa *outb_sa_dptr;
+
+   outb_sa_dptr = (struct roc_ot_ipsec_outb_sa *)dev->outb.sa_dptr;
+   memset(outb_sa_dptr, 0, sizeof(struct roc_ot_ipsec_outb_sa));
+
+   rc = cnxk_ot_ipsec_outb_sa_fill(outb_sa_dptr, ipsec, crypto);
+   if (rc)
+   return -EINVAL;
+   rc = roc_nix_inl

[dpdk-dev][PATCH v2 3/3] net/cnxk: adding cnxk support to configure custom sa index

[kirankumark]

From: Kiran Kumar K 

Adding cnxk device driver support to configure custom sa index.
Custom sa index can be configured as part of the session create
as SPI, and later original SPI can be updated using session update.

Signed-off-by: Kiran Kumar K 
---
 doc/api/doxy-api-index.md   |   3 +-
 doc/api/doxy-api.conf.in|   1 +
 drivers/net/cnxk/cn10k_ethdev_sec.c | 107 +++-
 drivers/net/cnxk/cn9k_ethdev.c  |   6 ++
 drivers/net/cnxk/cn9k_ethdev_sec.c  |   2 +-
 drivers/net/cnxk/cnxk_ethdev.h  |   3 +-
 drivers/net/cnxk/cnxk_ethdev_sec.c  |  30 +---
 drivers/net/cnxk/cnxk_flow.c|   1 +
 drivers/net/cnxk/meson.build|   2 +
 drivers/net/cnxk/rte_pmd_cnxk.h |  94 
 drivers/net/cnxk/version.map|   7 ++
 11 files changed, 241 insertions(+), 15 deletions(-)
 create mode 100644 drivers/net/cnxk/rte_pmd_cnxk.h

diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md
index 4245b9635c..8f9564ee84 100644
--- a/doc/api/doxy-api-index.md
+++ b/doc/api/doxy-api-index.md
@@ -56,7 +56,8 @@ The public API headers are grouped by topics:
   [dpaa2_qdma] (@ref rte_pmd_dpaa2_qdma.h),
   [crypto_scheduler]   (@ref rte_cryptodev_scheduler.h),
   [dlb2]   (@ref rte_pmd_dlb2.h),
-  [ifpga]  (@ref rte_pmd_ifpga.h)
+  [ifpga]  (@ref rte_pmd_ifpga.h),
+  [cnxk]   (@ref rte_pmd_cnxk.h)
 
 - **memory**:
   [memseg] (@ref rte_memory.h),
diff --git a/doc/api/doxy-api.conf.in b/doc/api/doxy-api.conf.in
index db2ca9b6ed..b49942412d 100644
--- a/doc/api/doxy-api.conf.in
+++ b/doc/api/doxy-api.conf.in
@@ -12,6 +12,7 @@ INPUT   = @TOPDIR@/doc/api/doxy-api-index.md \
   @TOPDIR@/drivers/net/ark \
   @TOPDIR@/drivers/net/bnxt \
   @TOPDIR@/drivers/net/bonding \
+  @TOPDIR@/drivers/net/cnxk \
   @TOPDIR@/drivers/net/dpaa \
   @TOPDIR@/drivers/net/dpaa2 \
   @TOPDIR@/drivers/net/i40e \
diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c 
b/drivers/net/cnxk/cn10k_ethdev_sec.c
index 87bb691ab4..60ae5d7d99 100644
--- a/drivers/net/cnxk/cn10k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -502,7 +503,7 @@ cn10k_eth_sec_session_create(void *device,
  ROC_NIX_INL_OT_IPSEC_OUTB_SW_RSVD);
 
/* Alloc an sa index */
-   rc = cnxk_eth_outb_sa_idx_get(dev, &sa_idx);
+   rc = cnxk_eth_outb_sa_idx_get(dev, &sa_idx, ipsec->spi);
if (rc)
goto mempool_put;
 
@@ -657,6 +658,109 @@ cn10k_eth_sec_capabilities_get(void *device __rte_unused)
return cn10k_eth_sec_capabilities;
 }
 
+static int
+cn10k_eth_sec_session_update(void *device, struct rte_security_session *sess,
+struct rte_security_session_conf *conf)
+{
+   struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)device;
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct roc_ot_ipsec_inb_sa *inb_sa_dptr;
+   struct rte_security_ipsec_xform *ipsec;
+   struct rte_crypto_sym_xform *crypto;
+   struct cnxk_eth_sec_sess *eth_sec;
+   bool inbound;
+   int rc;
+
+   if (conf->action_type != RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL ||
+   conf->protocol != RTE_SECURITY_PROTOCOL_IPSEC)
+   return -ENOENT;
+
+   ipsec = &conf->ipsec;
+   crypto = conf->crypto_xform;
+   inbound = !!(ipsec->direction == RTE_SECURITY_IPSEC_SA_DIR_INGRESS);
+
+   eth_sec = cnxk_eth_sec_sess_get_by_sess(dev, sess);
+   if (!eth_sec)
+   return -ENOENT;
+
+   eth_sec->spi = conf->ipsec.spi;
+
+   if (inbound) {
+   inb_sa_dptr = (struct roc_ot_ipsec_inb_sa *)dev->inb.sa_dptr;
+   memset(inb_sa_dptr, 0, sizeof(struct roc_ot_ipsec_inb_sa));
+
+   rc = cnxk_ot_ipsec_inb_sa_fill(inb_sa_dptr, ipsec, crypto,
+  true);
+   if (rc)
+   return -EINVAL;
+
+   rc = roc_nix_inl_ctx_write(&dev->nix, inb_sa_dptr, eth_sec->sa,
+  eth_sec->inb,
+  sizeof(struct roc_ot_ipsec_inb_sa));
+   if (rc)
+   return -EINVAL;
+   } else {
+   struct roc_ot_ipsec_outb_sa *outb_sa_dptr;
+
+   outb_sa_dptr = (struct roc_ot_ipsec_outb_sa *)dev->outb.sa_dptr;
+   memset(outb_sa_dptr, 0, sizeof(struct roc_ot_ipsec_outb_sa));
+
+   rc = cnxk_ot_ipsec_outb_sa_fill(outb_sa_dptr, ipsec, crypto);
+   if (rc)
+   return -EINVAL;
+   rc = roc_nix_inl

[dpdk-dev] [PATCH 1/2] common/octeontx2: sync mbox with AF

[kirankumark]

From: Kiran Kumar K 

Sync mbox with AF, And bump up the version.

Signed-off-by: Kiran Kumar K 
---
 drivers/common/octeontx2/otx2_mbox.h | 30 ++--
 1 file changed, 20 insertions(+), 10 deletions(-)

diff --git a/drivers/common/octeontx2/otx2_mbox.h 
b/drivers/common/octeontx2/otx2_mbox.h
index b435694db7..25b521a7fa 100644
--- a/drivers/common/octeontx2/otx2_mbox.h
+++ b/drivers/common/octeontx2/otx2_mbox.h
@@ -90,7 +90,7 @@ struct mbox_msghdr {
 #define OTX2_MBOX_RSP_SIG (0xbeef)
/* Signature, for validating corrupted msgs */
uint16_t __otx2_io sig;
-#define OTX2_MBOX_VERSION (0x000a)
+#define OTX2_MBOX_VERSION (0x000b)
/* Version of msg's structure for this ID */
uint16_t __otx2_io ver;
/* Offset of next msg within mailbox region */
@@ -356,6 +356,7 @@ struct ready_msg_rsp {
 };
 
 enum npc_pkind_type {
+   NPC_RX_CUSTOM_PRE_L2_PKIND = 55ULL,
NPC_RX_VLAN_EXDSA_PKIND = 56ULL,
NPC_RX_CHLEN24B_PKIND,
NPC_RX_CPT_HDR_PKIND,
@@ -373,18 +374,27 @@ enum npc_pkind_type {
 /* Struct to set pkind */
 struct npc_set_pkind {
struct mbox_msghdr hdr;
-#define OTX2_PRIV_FLAGS_DEFAULT  BIT_ULL(0)
-#define OTX2_PRIV_FLAGS_EDSA BIT_ULL(1)
-#define OTX2_PRIV_FLAGS_HIGIGBIT_ULL(2)
-#define OTX2_PRIV_FLAGS_FDSA BIT_ULL(3)
-#define OTX2_PRIV_FLAGS_EXDSABIT_ULL(4)
-#define OTX2_PRIV_FLAGS_VLAN_EXDSABIT_ULL(5)
-#define OTX2_PRIV_FLAGS_CUSTOM   BIT_ULL(63)
+#define OTX2_PRIV_FLAGS_DEFAULT   BIT_ULL(0)
+#define OTX2_PRIV_FLAGS_EDSA  BIT_ULL(1)
+#define OTX2_PRIV_FLAGS_HIGIG BIT_ULL(2)
+#define OTX2_PRIV_FLAGS_FDSA  BIT_ULL(3)
+#define OTX2_PRIV_FLAGS_EXDSA BIT_ULL(4)
+#define OTX2_PRIV_FLAGS_VLAN_EXDSA BIT_ULL(5)
+#define OTX2_PRIV_FLAGS_CUSTOMBIT_ULL(63)
uint64_t __otx2_io mode;
-#define PKIND_TX   BIT_ULL(0)
-#define PKIND_RX   BIT_ULL(1)
+#define PKIND_TX BIT_ULL(0)
+#define PKIND_RX BIT_ULL(1)
uint8_t __otx2_io dir;
uint8_t __otx2_io pkind; /* valid only in case custom flag */
+   uint8_t __otx2_io var_len_off;
+   /* Offset of custom header length field.
+* Valid only for pkind NPC_RX_CUSTOM_PRE_L2_PKIND
+*/
+   uint8_t __otx2_io var_len_off_mask; /* Mask for length with in offset */
+   uint8_t __otx2_io shift_dir;
+   /* Shift direction to get length of the
+* header at var_len_off
+*/
 };
 
 /* Structure for requesting resource provisioning.
-- 
2.25.1

[dpdk-dev] [PATCH 2/2] common/cnxk: sync mbox with AF

[kirankumark]

From: Kiran Kumar K 

Sync mbox with AF, And bump up the version.

Signed-off-by: Kiran Kumar K 
---
 drivers/common/cnxk/roc_mbox.h | 12 +++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index bc40848450..22f6ebcd92 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -28,7 +28,7 @@ struct mbox_msghdr {
 #define MBOX_RSP_SIG (0xbeef)
/* Signature, for validating corrupted msgs */
uint16_t __io sig;
-#define MBOX_VERSION (0x000a)
+#define MBOX_VERSION (0x000b)
/* Version of msg's structure for this ID */
uint16_t __io ver;
/* Offset of next msg within mailbox region */
@@ -283,6 +283,7 @@ struct ready_msg_rsp {
 };
 
 enum npc_pkind_type {
+   NPC_RX_CUSTOM_PRE_L2_PKIND = 55ULL,
NPC_RX_VLAN_EXDSA_PKIND = 56ULL,
NPC_RX_CHLEN24B_PKIND,
NPC_RX_CPT_HDR_PKIND,
@@ -309,6 +310,15 @@ struct npc_set_pkind {
 #define PKIND_RX BIT_ULL(1)
uint8_t __io dir;
uint8_t __io pkind; /* valid only in case custom flag */
+   uint8_t __io var_len_off;
+   /* Offset of custom header length field.
+* Valid only for pkind NPC_RX_CUSTOM_PRE_L2_PKIND
+*/
+   uint8_t __io var_len_off_mask; /* Mask for length with in offset */
+   uint8_t __io shift_dir;
+   /* Shift direction to get length of the
+* header at var_len_off
+*/
 };
 
 /* Structure for requesting resource provisioning.
-- 
2.25.1

[dpdk-dev] [PATCH] crypto/cnxk: fix bus error on RSA verify

[kirankumark]

From: Kiran Kumar K 

While creating RSA session, private key length is not being
calculated properly. This is causing bus error on RSA verify.
This patch fix the issue with length calculation.

Fixes: 5a3513caeb455 ("crypto/cnxk: add asymmetric session")

Signed-off-by: Kiran Kumar K 
---
 drivers/crypto/cnxk/cnxk_ae.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h
index 00dc75ef9d..6222171fe6 100644
--- a/drivers/crypto/cnxk/cnxk_ae.h
+++ b/drivers/crypto/cnxk/cnxk_ae.h
@@ -82,15 +82,15 @@ cnxk_ae_fill_rsa_params(struct cnxk_ae_sess *sess,
struct rte_crypto_rsa_xform *rsa = &sess->rsa_ctx;
size_t mod_len = xfrm_rsa->n.length;
size_t exp_len = xfrm_rsa->e.length;
-   size_t len = (mod_len / 2);
uint64_t total_size;
+   size_t len = 0;
 
if (qt.p.length != 0 && qt.p.data == NULL)
return -EINVAL;
 
/* Make sure key length used is not more than mod_len/2 */
if (qt.p.data != NULL)
-   len = RTE_MIN(len, qt.p.length);
+   len = (((mod_len / 2) < qt.p.length) ? 0 : qt.p.length);
 
/* Total size required for RSA key params(n,e,(q,dQ,p,dP,qInv)) */
total_size = mod_len + exp_len + 5 * len;
-- 
2.25.1

[dpdk-dev] [PATCH] test/crypto-perf: fix crash issue with asym perf test

[kirankumark]

From: Kiran Kumar K 

While populating the crypto ops in case of asymmetric, result
is being allocated from stack. This is causing crash in the
application. And operation type is also not being initialized
properly. Adding a fix by allocating the result from global
memory and initialized the operation memory properly.

Fixes: ba588ce3f9339 ("test/crypto-perf: test asymmetric crypto throughput")

Signed-off-by: Kiran Kumar K 
---
 app/test-crypto-perf/cperf_ops.c  |  5 ++---
 app/test-crypto-perf/cperf_test_common.c  | 18 +-
 app/test-crypto-perf/cperf_test_vectors.c |  2 ++
 app/test-crypto-perf/cperf_test_vectors.h |  1 +
 4 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 263841c339..d975ae1ab8 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -21,7 +21,6 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
   uint64_t *tsc_start __rte_unused)
 {
uint16_t i;
-   uint8_t result[sizeof(perf_mod_p)] = { 0 };
struct rte_cryptodev_asym_session *asym_sess = (void *)sess;
 
for (i = 0; i < nb_ops; i++) {
@@ -30,8 +29,8 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
asym_op->modex.base.data = perf_base;
asym_op->modex.base.length = sizeof(perf_base);
-   asym_op->modex.result.data = result;
-   asym_op->modex.result.length = sizeof(result);
+   asym_op->modex.result.data = perf_mod_result;
+   asym_op->modex.result.length = sizeof(perf_mod_result);
rte_crypto_op_attach_asym_session(ops[i], asym_sess);
}
return 0;
diff --git a/app/test-crypto-perf/cperf_test_common.c 
b/app/test-crypto-perf/cperf_test_common.c
index 89f13fdebd..97a1ea47ad 100644
--- a/app/test-crypto-perf/cperf_test_common.c
+++ b/app/test-crypto-perf/cperf_test_common.c
@@ -82,6 +82,20 @@ fill_multi_seg_mbuf(struct rte_mbuf *m, struct rte_mempool 
*mp,
m->next = NULL;
 }
 
+static void
+mempool_asym_obj_init(struct rte_mempool *mp, __rte_unused void *opaque_arg,
+ void *obj, __rte_unused unsigned int i)
+{
+   struct rte_crypto_op *op = obj;
+
+   /* Set crypto operation */
+   op->type = RTE_CRYPTO_OP_TYPE_ASYMMETRIC;
+   op->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+   op->sess_type = RTE_CRYPTO_OP_WITH_SESSION;
+   op->phys_addr = rte_mem_virt2iova(obj);
+   op->mempool = mp;
+}
+
 static void
 mempool_obj_init(struct rte_mempool *mp,
 void *opaque_arg,
@@ -146,13 +160,15 @@ cperf_alloc_common_memory(const struct cperf_options 
*options,
 rte_socket_id());
*pool = rte_crypto_op_pool_create(
pool_name, RTE_CRYPTO_OP_TYPE_ASYMMETRIC,
-   options->pool_sz, 0, 0, rte_socket_id());
+   options->pool_sz, RTE_MEMPOOL_CACHE_MAX_SIZE, 0,
+   rte_socket_id());
if (*pool == NULL) {
RTE_LOG(ERR, USER1,
"Cannot allocate mempool for device %u\n",
dev_id);
return -1;
}
+   rte_mempool_obj_iter(*pool, mempool_asym_obj_init, NULL);
return 0;
}
 
diff --git a/app/test-crypto-perf/cperf_test_vectors.c 
b/app/test-crypto-perf/cperf_test_vectors.c
index e578ec1434..dafcfc0c6c 100644
--- a/app/test-crypto-perf/cperf_test_vectors.c
+++ b/app/test-crypto-perf/cperf_test_vectors.c
@@ -34,6 +34,8 @@ uint8_t perf_mod_p[129] = {
0x55
 };
 
+uint8_t perf_mod_result[sizeof(perf_mod_p)];
+
 uint8_t perf_mod_e[3] = {0x01, 0x00, 0x01};
 
 uint8_t plaintext[2048] = {
diff --git a/app/test-crypto-perf/cperf_test_vectors.h 
b/app/test-crypto-perf/cperf_test_vectors.h
index 92818c22b7..70f2839cd6 100644
--- a/app/test-crypto-perf/cperf_test_vectors.h
+++ b/app/test-crypto-perf/cperf_test_vectors.h
@@ -93,5 +93,6 @@ extern uint8_t digest[2048];
 extern uint8_t perf_base[20];
 extern uint8_t perf_mod_p[129];
 extern uint8_t perf_mod_e[3];
+extern uint8_t perf_mod_result[sizeof(perf_mod_p)];
 
 #endif
-- 
2.25.1

[dpdk-dev] [PATCH] test/crypto-perf: fix crash issue with asym perf test

[kirankumark]

From: Kiran Kumar K 

While populating the crypto ops in case of asymmetric, result
is being allocated from stack. This is causing crash in the
application. And operation type is also not being initialized
properly. Adding a fix by allocating the result from global
memory and initialized the operation memory properly.

Fixes: ba588ce3f9339 ("test/crypto-perf: test asymmetric crypto throughput")

Signed-off-by: Kiran Kumar K 
---
 app/test-crypto-perf/cperf_ops.c  |  5 ++---
 app/test-crypto-perf/cperf_test_common.c  | 18 +-
 app/test-crypto-perf/cperf_test_vectors.c |  2 ++
 app/test-crypto-perf/cperf_test_vectors.h |  1 +
 4 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 263841c339..d975ae1ab8 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -21,7 +21,6 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
   uint64_t *tsc_start __rte_unused)
 {
uint16_t i;
-   uint8_t result[sizeof(perf_mod_p)] = { 0 };
struct rte_cryptodev_asym_session *asym_sess = (void *)sess;
 
for (i = 0; i < nb_ops; i++) {
@@ -30,8 +29,8 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
asym_op->modex.base.data = perf_base;
asym_op->modex.base.length = sizeof(perf_base);
-   asym_op->modex.result.data = result;
-   asym_op->modex.result.length = sizeof(result);
+   asym_op->modex.result.data = perf_mod_result;
+   asym_op->modex.result.length = sizeof(perf_mod_result);
rte_crypto_op_attach_asym_session(ops[i], asym_sess);
}
return 0;
diff --git a/app/test-crypto-perf/cperf_test_common.c 
b/app/test-crypto-perf/cperf_test_common.c
index 89f13fdebd..97a1ea47ad 100644
--- a/app/test-crypto-perf/cperf_test_common.c
+++ b/app/test-crypto-perf/cperf_test_common.c
@@ -82,6 +82,20 @@ fill_multi_seg_mbuf(struct rte_mbuf *m, struct rte_mempool 
*mp,
m->next = NULL;
 }
 
+static void
+mempool_asym_obj_init(struct rte_mempool *mp, __rte_unused void *opaque_arg,
+ void *obj, __rte_unused unsigned int i)
+{
+   struct rte_crypto_op *op = obj;
+
+   /* Set crypto operation */
+   op->type = RTE_CRYPTO_OP_TYPE_ASYMMETRIC;
+   op->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+   op->sess_type = RTE_CRYPTO_OP_WITH_SESSION;
+   op->phys_addr = rte_mem_virt2iova(obj);
+   op->mempool = mp;
+}
+
 static void
 mempool_obj_init(struct rte_mempool *mp,
 void *opaque_arg,
@@ -146,13 +160,15 @@ cperf_alloc_common_memory(const struct cperf_options 
*options,
 rte_socket_id());
*pool = rte_crypto_op_pool_create(
pool_name, RTE_CRYPTO_OP_TYPE_ASYMMETRIC,
-   options->pool_sz, 0, 0, rte_socket_id());
+   options->pool_sz, RTE_MEMPOOL_CACHE_MAX_SIZE, 0,
+   rte_socket_id());
if (*pool == NULL) {
RTE_LOG(ERR, USER1,
"Cannot allocate mempool for device %u\n",
dev_id);
return -1;
}
+   rte_mempool_obj_iter(*pool, mempool_asym_obj_init, NULL);
return 0;
}
 
diff --git a/app/test-crypto-perf/cperf_test_vectors.c 
b/app/test-crypto-perf/cperf_test_vectors.c
index e578ec1434..dafcfc0c6c 100644
--- a/app/test-crypto-perf/cperf_test_vectors.c
+++ b/app/test-crypto-perf/cperf_test_vectors.c
@@ -34,6 +34,8 @@ uint8_t perf_mod_p[129] = {
0x55
 };
 
+uint8_t perf_mod_result[sizeof(perf_mod_p)];
+
 uint8_t perf_mod_e[3] = {0x01, 0x00, 0x01};
 
 uint8_t plaintext[2048] = {
diff --git a/app/test-crypto-perf/cperf_test_vectors.h 
b/app/test-crypto-perf/cperf_test_vectors.h
index 92818c22b7..70f2839cd6 100644
--- a/app/test-crypto-perf/cperf_test_vectors.h
+++ b/app/test-crypto-perf/cperf_test_vectors.h
@@ -93,5 +93,6 @@ extern uint8_t digest[2048];
 extern uint8_t perf_base[20];
 extern uint8_t perf_mod_p[129];
 extern uint8_t perf_mod_e[3];
+extern uint8_t perf_mod_result[sizeof(perf_mod_p)];
 
 #endif
-- 
2.25.1

[dpdk-dev] [PATCH v3] app/crypto-perf: add throughput test for asymmetric crypto

[kirankumark]

From: Kiran Kumar K 

Adding support for asymmetric crypto perf test.
Only modex is supported for now.

Signed-off-by: Kiran Kumar K 
---
 app/test-crypto-perf/cperf_ops.c |  59 ++-
 app/test-crypto-perf/cperf_options.h |   3 +-
 app/test-crypto-perf/cperf_options_parsing.c |   4 +
 app/test-crypto-perf/cperf_test_common.c |  16 +++
 app/test-crypto-perf/cperf_test_throughput.c |  24 +++--
 app/test-crypto-perf/cperf_test_vectors.c|  36 +++
 app/test-crypto-perf/cperf_test_vectors.h|  11 ++
 app/test-crypto-perf/main.c  | 105 +--
 doc/guides/rel_notes/release_21_11.rst   |   2 +
 9 files changed, 244 insertions(+), 16 deletions(-)

diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 0d7baf214b..4b7d66edb2 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -8,6 +8,33 @@
 #include "cperf_ops.h"
 #include "cperf_test_vectors.h"
 
+static int
+cperf_set_ops_asym(struct rte_crypto_op **ops,
+  uint32_t src_buf_offset __rte_unused,
+  uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
+  struct rte_cryptodev_sym_session *sess,
+  const struct cperf_options *options __rte_unused,
+  const struct cperf_test_vector *test_vector __rte_unused,
+  uint16_t iv_offset __rte_unused,
+  uint32_t *imix_idx __rte_unused)
+{
+   uint16_t i;
+   uint8_t result[sizeof(perf_mod_p)] = { 0 };
+   struct rte_cryptodev_asym_session *asym_sess = (void *)sess;
+
+   for (i = 0; i < nb_ops; i++) {
+   struct rte_crypto_asym_op *asym_op = ops[i]->asym;
+
+   ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+   asym_op->modex.base.data = perf_base;
+   asym_op->modex.base.length = sizeof(perf_base);
+   asym_op->modex.result.data = result;
+   asym_op->modex.result.length = sizeof(result);
+   rte_crypto_op_attach_asym_session(ops[i], asym_sess);
+   }
+   return 0;
+}
+
 #ifdef RTE_LIB_SECURITY
 static int
 cperf_set_ops_security(struct rte_crypto_op **ops,
@@ -550,7 +577,32 @@ cperf_create_session(struct rte_mempool *sess_mp,
struct rte_crypto_sym_xform auth_xform;
struct rte_crypto_sym_xform aead_xform;
struct rte_cryptodev_sym_session *sess = NULL;
-
+   struct rte_crypto_asym_xform xform = {0};
+   int rc;
+
+   if (options->op_type == CPERF_ASYM_MODEX) {
+   xform.next = NULL;
+   xform.xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX;
+   xform.modex.modulus.data = perf_mod_p;
+   xform.modex.modulus.length = sizeof(perf_mod_p);
+   xform.modex.exponent.data = perf_mod_e;
+   xform.modex.exponent.length = sizeof(perf_mod_e);
+
+   sess = (void *)rte_cryptodev_asym_session_create(sess_mp);
+   if (sess == NULL)
+   return NULL;
+   rc = rte_cryptodev_asym_session_init(dev_id, (void *)sess,
+&xform, priv_mp);
+   if (rc < 0) {
+   if (sess != NULL) {
+   rte_cryptodev_asym_session_clear(dev_id,
+(void *)sess);
+   rte_cryptodev_asym_session_free((void *)sess);
+   }
+   return NULL;
+   }
+   return sess;
+   }
 #ifdef RTE_LIB_SECURITY
/*
 * security only
@@ -820,6 +872,11 @@ cperf_get_op_functions(const struct cperf_options *options,
 
op_fns->sess_create = cperf_create_session;
 
+   if (options->op_type == CPERF_ASYM_MODEX) {
+   op_fns->populate_ops = cperf_set_ops_asym;
+   return 0;
+   }
+
if (options->op_type == CPERF_AEAD) {
op_fns->populate_ops = cperf_set_ops_aead;
return 0;
diff --git a/app/test-crypto-perf/cperf_options.h 
b/app/test-crypto-perf/cperf_options.h
index 9664a4b343..f5ea2b90a5 100644
--- a/app/test-crypto-perf/cperf_options.h
+++ b/app/test-crypto-perf/cperf_options.h
@@ -79,7 +79,8 @@ enum cperf_op_type {
CPERF_AUTH_THEN_CIPHER,
CPERF_AEAD,
CPERF_PDCP,
-   CPERF_DOCSIS
+   CPERF_DOCSIS,
+   CPERF_ASYM_MODEX
 };
 
 extern const char *cperf_op_type_strs[];
diff --git a/app/test-crypto-perf/cperf_options_parsing.c 
b/app/test-crypto-perf/cperf_options_parsing.c
index 0348972c85..2a7acb0111 100644
--- a/app/test-crypto-perf/cperf_options_parsing.c
+++ b/app/test-crypto-perf/cperf_options_parsing.c
@@ -457,6 +457,10 @@ parse_op_type(struct cperf_options *opts, const char *arg)
{
cperf_op_type_strs[CPERF_DOCSIS],
CPERF_DOCSIS

[dpdk-dev] [PATCH v4] app/crypto-perf: add throughput test for asymmetric crypto

[kirankumark]

From: Kiran Kumar K 

Adding support for asymmetric crypto perf test.
Only modex is supported for now.

One new optype has been added.
--optype modex

./dpdk-test-crypto-perf --master-lcore 0 -l 0,1 --log-level=8 --
--devtype crypto_cn9k --optype modex

Signed-off-by: Kiran Kumar K 
---
 app/test-crypto-perf/cperf_ops.c |  59 ++-
 app/test-crypto-perf/cperf_options.h |   3 +-
 app/test-crypto-perf/cperf_options_parsing.c |   4 +
 app/test-crypto-perf/cperf_test_common.c |  16 +++
 app/test-crypto-perf/cperf_test_throughput.c |  24 +++--
 app/test-crypto-perf/cperf_test_vectors.c|  36 +++
 app/test-crypto-perf/cperf_test_vectors.h|  11 ++
 app/test-crypto-perf/main.c  | 105 +--
 doc/guides/rel_notes/release_21_11.rst   |   5 +
 doc/guides/tools/cryptoperf.rst  |   1 +
 10 files changed, 248 insertions(+), 16 deletions(-)

diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 0d7baf214b..4b7d66edb2 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -8,6 +8,33 @@
 #include "cperf_ops.h"
 #include "cperf_test_vectors.h"
 
+static int
+cperf_set_ops_asym(struct rte_crypto_op **ops,
+  uint32_t src_buf_offset __rte_unused,
+  uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
+  struct rte_cryptodev_sym_session *sess,
+  const struct cperf_options *options __rte_unused,
+  const struct cperf_test_vector *test_vector __rte_unused,
+  uint16_t iv_offset __rte_unused,
+  uint32_t *imix_idx __rte_unused)
+{
+   uint16_t i;
+   uint8_t result[sizeof(perf_mod_p)] = { 0 };
+   struct rte_cryptodev_asym_session *asym_sess = (void *)sess;
+
+   for (i = 0; i < nb_ops; i++) {
+   struct rte_crypto_asym_op *asym_op = ops[i]->asym;
+
+   ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+   asym_op->modex.base.data = perf_base;
+   asym_op->modex.base.length = sizeof(perf_base);
+   asym_op->modex.result.data = result;
+   asym_op->modex.result.length = sizeof(result);
+   rte_crypto_op_attach_asym_session(ops[i], asym_sess);
+   }
+   return 0;
+}
+
 #ifdef RTE_LIB_SECURITY
 static int
 cperf_set_ops_security(struct rte_crypto_op **ops,
@@ -550,7 +577,32 @@ cperf_create_session(struct rte_mempool *sess_mp,
struct rte_crypto_sym_xform auth_xform;
struct rte_crypto_sym_xform aead_xform;
struct rte_cryptodev_sym_session *sess = NULL;
-
+   struct rte_crypto_asym_xform xform = {0};
+   int rc;
+
+   if (options->op_type == CPERF_ASYM_MODEX) {
+   xform.next = NULL;
+   xform.xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX;
+   xform.modex.modulus.data = perf_mod_p;
+   xform.modex.modulus.length = sizeof(perf_mod_p);
+   xform.modex.exponent.data = perf_mod_e;
+   xform.modex.exponent.length = sizeof(perf_mod_e);
+
+   sess = (void *)rte_cryptodev_asym_session_create(sess_mp);
+   if (sess == NULL)
+   return NULL;
+   rc = rte_cryptodev_asym_session_init(dev_id, (void *)sess,
+&xform, priv_mp);
+   if (rc < 0) {
+   if (sess != NULL) {
+   rte_cryptodev_asym_session_clear(dev_id,
+(void *)sess);
+   rte_cryptodev_asym_session_free((void *)sess);
+   }
+   return NULL;
+   }
+   return sess;
+   }
 #ifdef RTE_LIB_SECURITY
/*
 * security only
@@ -820,6 +872,11 @@ cperf_get_op_functions(const struct cperf_options *options,
 
op_fns->sess_create = cperf_create_session;
 
+   if (options->op_type == CPERF_ASYM_MODEX) {
+   op_fns->populate_ops = cperf_set_ops_asym;
+   return 0;
+   }
+
if (options->op_type == CPERF_AEAD) {
op_fns->populate_ops = cperf_set_ops_aead;
return 0;
diff --git a/app/test-crypto-perf/cperf_options.h 
b/app/test-crypto-perf/cperf_options.h
index 9664a4b343..f5ea2b90a5 100644
--- a/app/test-crypto-perf/cperf_options.h
+++ b/app/test-crypto-perf/cperf_options.h
@@ -79,7 +79,8 @@ enum cperf_op_type {
CPERF_AUTH_THEN_CIPHER,
CPERF_AEAD,
CPERF_PDCP,
-   CPERF_DOCSIS
+   CPERF_DOCSIS,
+   CPERF_ASYM_MODEX
 };
 
 extern const char *cperf_op_type_strs[];
diff --git a/app/test-crypto-perf/cperf_options_parsing.c 
b/app/test-crypto-perf/cperf_options_parsing.c
index 0348972c85..2a7acb0111 100644
--- a/app/test-crypto-perf/cperf_options_parsing.c
+++ b/app/test-cryp

[dpdk-dev] [PATCH v5] app/crypto-perf: add throughput test for asymmetric crypto

[kirankumark]

From: Kiran Kumar K 

Adding support for asymmetric crypto perf test.
Only modex is supported for now.

One new optype has been added.
--optype modex

./dpdk-test-crypto-perf -c 0x3 -- --devtype crypto_cn9k --optype modex
--ptest throughput

Signed-off-by: Kiran Kumar K 
---
 app/test-crypto-perf/cperf_ops.c |  59 ++-
 app/test-crypto-perf/cperf_options.h |   3 +-
 app/test-crypto-perf/cperf_options_parsing.c |   4 +
 app/test-crypto-perf/cperf_test_common.c |  16 +++
 app/test-crypto-perf/cperf_test_throughput.c |  24 +++--
 app/test-crypto-perf/cperf_test_vectors.c|  36 +++
 app/test-crypto-perf/cperf_test_vectors.h|  11 ++
 app/test-crypto-perf/main.c  | 105 +--
 doc/guides/rel_notes/release_21_11.rst   |   5 +
 doc/guides/tools/cryptoperf.rst  |   1 +
 10 files changed, 248 insertions(+), 16 deletions(-)

diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 0d7baf214b..4b7d66edb2 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -8,6 +8,33 @@
 #include "cperf_ops.h"
 #include "cperf_test_vectors.h"
 
+static int
+cperf_set_ops_asym(struct rte_crypto_op **ops,
+  uint32_t src_buf_offset __rte_unused,
+  uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
+  struct rte_cryptodev_sym_session *sess,
+  const struct cperf_options *options __rte_unused,
+  const struct cperf_test_vector *test_vector __rte_unused,
+  uint16_t iv_offset __rte_unused,
+  uint32_t *imix_idx __rte_unused)
+{
+   uint16_t i;
+   uint8_t result[sizeof(perf_mod_p)] = { 0 };
+   struct rte_cryptodev_asym_session *asym_sess = (void *)sess;
+
+   for (i = 0; i < nb_ops; i++) {
+   struct rte_crypto_asym_op *asym_op = ops[i]->asym;
+
+   ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+   asym_op->modex.base.data = perf_base;
+   asym_op->modex.base.length = sizeof(perf_base);
+   asym_op->modex.result.data = result;
+   asym_op->modex.result.length = sizeof(result);
+   rte_crypto_op_attach_asym_session(ops[i], asym_sess);
+   }
+   return 0;
+}
+
 #ifdef RTE_LIB_SECURITY
 static int
 cperf_set_ops_security(struct rte_crypto_op **ops,
@@ -550,7 +577,32 @@ cperf_create_session(struct rte_mempool *sess_mp,
struct rte_crypto_sym_xform auth_xform;
struct rte_crypto_sym_xform aead_xform;
struct rte_cryptodev_sym_session *sess = NULL;
-
+   struct rte_crypto_asym_xform xform = {0};
+   int rc;
+
+   if (options->op_type == CPERF_ASYM_MODEX) {
+   xform.next = NULL;
+   xform.xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX;
+   xform.modex.modulus.data = perf_mod_p;
+   xform.modex.modulus.length = sizeof(perf_mod_p);
+   xform.modex.exponent.data = perf_mod_e;
+   xform.modex.exponent.length = sizeof(perf_mod_e);
+
+   sess = (void *)rte_cryptodev_asym_session_create(sess_mp);
+   if (sess == NULL)
+   return NULL;
+   rc = rte_cryptodev_asym_session_init(dev_id, (void *)sess,
+&xform, priv_mp);
+   if (rc < 0) {
+   if (sess != NULL) {
+   rte_cryptodev_asym_session_clear(dev_id,
+(void *)sess);
+   rte_cryptodev_asym_session_free((void *)sess);
+   }
+   return NULL;
+   }
+   return sess;
+   }
 #ifdef RTE_LIB_SECURITY
/*
 * security only
@@ -820,6 +872,11 @@ cperf_get_op_functions(const struct cperf_options *options,
 
op_fns->sess_create = cperf_create_session;
 
+   if (options->op_type == CPERF_ASYM_MODEX) {
+   op_fns->populate_ops = cperf_set_ops_asym;
+   return 0;
+   }
+
if (options->op_type == CPERF_AEAD) {
op_fns->populate_ops = cperf_set_ops_aead;
return 0;
diff --git a/app/test-crypto-perf/cperf_options.h 
b/app/test-crypto-perf/cperf_options.h
index 9664a4b343..f5ea2b90a5 100644
--- a/app/test-crypto-perf/cperf_options.h
+++ b/app/test-crypto-perf/cperf_options.h
@@ -79,7 +79,8 @@ enum cperf_op_type {
CPERF_AUTH_THEN_CIPHER,
CPERF_AEAD,
CPERF_PDCP,
-   CPERF_DOCSIS
+   CPERF_DOCSIS,
+   CPERF_ASYM_MODEX
 };
 
 extern const char *cperf_op_type_strs[];
diff --git a/app/test-crypto-perf/cperf_options_parsing.c 
b/app/test-crypto-perf/cperf_options_parsing.c
index 0348972c85..2a7acb0111 100644
--- a/app/test-crypto-perf/cperf_options_parsing.c
+++ b/app/test-crypto-perf/cperf_op

[dpdk-dev] [PATCH] crypto/cnxk: add null check for rsa param key data

[kirankumark]

From: Kiran Kumar K 

Coverity is reporting FORWARD_NULL issue when qt data is NULL.
Adding NULL check for this.

Coverity issue: 371893
Fixes: 5a3513caeb455 ("crypto/cnxk: add asymmetric session ops")

Signed-off-by: Kiran Kumar K 
---
 drivers/crypto/cnxk/cnxk_ae.h | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h
index c752e62ea5..a71e7ee8a2 100644
--- a/drivers/crypto/cnxk/cnxk_ae.h
+++ b/drivers/crypto/cnxk/cnxk_ae.h
@@ -85,6 +85,9 @@ cnxk_ae_fill_rsa_params(struct cnxk_ae_sess *sess,
size_t len = (mod_len / 2);
uint64_t total_size;
 
+   if (qt.p.length != 0 && qt.p.data == NULL)
+   return -EINVAL;
+
/* Make sure key length used is not more than mod_len/2 */
if (qt.p.data != NULL)
len = RTE_MIN(len, qt.p.length);
@@ -109,7 +112,8 @@ cnxk_ae_fill_rsa_params(struct cnxk_ae_sess *sess,
rsa->qt.dQ.data = rsa->qt.q.data + qt.q.length;
memcpy(rsa->qt.dQ.data, qt.dQ.data, qt.dQ.length);
rsa->qt.p.data = rsa->qt.dQ.data + qt.dQ.length;
-   memcpy(rsa->qt.p.data, qt.p.data, qt.p.length);
+   if (qt.p.data != NULL)
+   memcpy(rsa->qt.p.data, qt.p.data, qt.p.length);
rsa->qt.dP.data = rsa->qt.p.data + qt.p.length;
memcpy(rsa->qt.dP.data, qt.dP.data, qt.dP.length);
rsa->qt.qInv.data = rsa->qt.dP.data + qt.dP.length;
-- 
2.25.1

[dpdk-dev] [PATCH 1/3] common/cnxk: add const values to ec groups

[kirankumark]

From: Kiran Kumar K 

New ucode expects const values A and B for asymmetric ECDSA
messages. Adding roc support for this.

Signed-off-by: Kiran Kumar K 
---
 drivers/common/cnxk/roc_ae.c | 70 ++--
 drivers/common/cnxk/roc_ae.h | 17 -
 2 files changed, 84 insertions(+), 3 deletions(-)

diff --git a/drivers/common/cnxk/roc_ae.c b/drivers/common/cnxk/roc_ae.c
index cf3f7fc5f2..929da05983 100644
--- a/drivers/common/cnxk/roc_ae.c
+++ b/drivers/common/cnxk/roc_ae.c
@@ -23,6 +23,16 @@ const struct roc_ae_ec_group ae_ec_grp[ROC_AE_EC_ID_PMAX] = {
   0x99, 0xDE, 0xF8, 0x36, 0x14, 0x6B,
   0xC9, 0xB1, 0xB4, 0xD2, 0x28, 0x31},
  .length = 24},
+   .consta = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+   0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF,
+   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC},
+  .length = 24},
+   .constb = {.data = {0x64, 0x21, 0x05, 0x19, 0xE5, 0x9C,
+   0x80, 0xE7, 0x0F, 0xA7, 0xE9, 0xAB,
+   0x72, 0x24, 0x30, 0x49, 0xFE, 0xB8,
+   0xDE, 0xEC, 0xC1, 0x46, 0xB9, 0xB1},
+  .length = 24},
},
{
.prime = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
@@ -35,6 +45,16 @@ const struct roc_ae_ec_group ae_ec_grp[ROC_AE_EC_ID_PMAX] = {
   0X16, 0XA2, 0XE0, 0XB8, 0XF0, 0X3E, 0X13,
   0XDD, 0X29, 0X45, 0X5C, 0X5C, 0X2A, 0X3D},
  .length = 28},
+   .consta = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+   0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE},
+  .length = 28},
+   .constb = {.data = {0xB4, 0x05, 0x0A, 0x85, 0x0C, 0x04, 0xB3,
+   0xAB, 0xF5, 0x41, 0x32, 0x56, 0x50, 0x44,
+   0xB0, 0xB7, 0xD7, 0xBF, 0xD8, 0xBA, 0x27,
+   0x0B, 0x39, 0x43, 0x23, 0x55, 0xFF, 0xB4},
+  .length = 28},
},
{
.prime = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00,
@@ -49,6 +69,18 @@ const struct roc_ae_ec_group ae_ec_grp[ROC_AE_EC_ID_PMAX] = {
   0x17, 0x9E, 0x84, 0xF3, 0xB9, 0xCA, 0xC2,
   0xFC, 0x63, 0x25, 0x51},
  .length = 32},
+   .consta = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00,
+   0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+   0xFF, 0xFF, 0xFF, 0xFC},
+  .length = 32},
+   .constb = {.data = {0x5A, 0xC6, 0x35, 0xD8, 0xAA, 0x3A, 0x93,
+   0xE7, 0xB3, 0xEB, 0xBD, 0x55, 0x76, 0x98,
+   0x86, 0xBC, 0x65, 0x1D, 0x06, 0xB0, 0xCC,
+   0x53, 0xB0, 0xF6, 0x3B, 0xCE, 0x3C, 0x3E,
+   0x27, 0xD2, 0x60, 0x4B},
+  .length = 32},
},
{.prime = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
@@ -63,7 +95,21 @@ const struct roc_ae_ec_group ae_ec_grp[ROC_AE_EC_ID_PMAX] = {
0xC7, 0x63, 0x4D, 0x81, 0xF4, 0x37, 0x2D, 0xDF,
0x58, 0x1A, 0x0D, 0xB2, 0x48, 0xB0, 0xA7, 0x7A,
0xEC, 0xEC, 0x19, 0x6A, 0xCC, 0xC5, 0x29, 0x73},
-  .length = 48}},
+  .length = 48},
+.consta = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE,
+0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFC},
+   .length = 48},
+.constb = {.data = {0xB3, 0x31, 0x2F, 0xA7, 0xE2, 0x3E, 0xE7, 0xE4,
+0x98, 0x8E, 0x05, 0x6B, 0xE3, 0xF8, 0x2D, 0x19,
+0x18, 0x1D, 0x9C, 0x6E, 0xFE, 0x81, 0x41, 0x12,
+

[dpdk-dev] [PATCH 3/3] common/cpt: update asym ECDSA messages in sync with ucode

[kirankumark]

From: Kiran Kumar K 

Adding changes to asymmetric ECDSA messages to align with
the new ucode for octeontx2 device.

Signed-off-by: Kiran Kumar K 
---
 drivers/common/cpt/cpt_mcode_defines.h |  17 +-
 drivers/common/cpt/cpt_ucode_asym.h| 267 +++--
 2 files changed, 176 insertions(+), 108 deletions(-)

diff --git a/drivers/common/cpt/cpt_mcode_defines.h 
b/drivers/common/cpt/cpt_mcode_defines.h
index f63fae6b59..f16ee44297 100644
--- a/drivers/common/cpt/cpt_mcode_defines.h
+++ b/drivers/common/cpt/cpt_mcode_defines.h
@@ -220,7 +220,10 @@ typedef enum {
CPT_EC_ID_P256 = 2,
CPT_EC_ID_P384 = 3,
CPT_EC_ID_P521 = 4,
-   CPT_EC_ID_PMAX = 5
+   CPT_EC_ID_P160 = 5,
+   CPT_EC_ID_P320 = 6,
+   CPT_EC_ID_P512 = 7,
+   CPT_EC_ID_PMAX = 8
 } cpt_ec_id_t;
 
 typedef struct sglist_comp {
@@ -344,6 +347,18 @@ struct cpt_ec_group {
uint8_t data[66];
unsigned int length;
} order;
+
+   struct {
+   /* P521 maximum length */
+   uint8_t data[66];
+   unsigned int length;
+   } consta;
+
+   struct {
+   /* P521 maximum length */
+   uint8_t data[66];
+   unsigned int length;
+   } constb;
 };
 
 struct cpt_asym_ec_ctx {
diff --git a/drivers/common/cpt/cpt_ucode_asym.h 
b/drivers/common/cpt/cpt_ucode_asym.h
index 50c6f58d3a..a67ded642a 100644
--- a/drivers/common/cpt/cpt_ucode_asym.h
+++ b/drivers/common/cpt/cpt_ucode_asym.h
@@ -486,117 +486,150 @@ cpt_enqueue_rsa_op(struct rte_crypto_op *op,
 static const struct cpt_ec_group ec_grp[CPT_EC_ID_PMAX] = {
{
.prime = {
-   .data = {
-   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE,
-   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
+   .data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF,
+0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF},
+   .length = 24,
},
-   .length = 24,
-   },
-   .order = {
-   .data = {
-   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-   0xFF, 0xFF, 0xFF, 0xFF, 0x99, 0xDE, 0xF8, 0x36,
-   0x14, 0x6B, 0xC9, 0xB1, 0xB4, 0xD2, 0x28, 0x31
-   },
-   .length = 24
-   },
+   .order = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+  0x99, 0xDE, 0xF8, 0x36, 0x14, 0x6B,
+  0xC9, 0xB1, 0xB4, 0xD2, 0x28, 0x31},
+ .length = 24},
+   .consta = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+   0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF,
+   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC},
+  .length = 24},
+   .constb = {.data = {0x64, 0x21, 0x05, 0x19, 0xE5, 0x9C,
+   0x80, 0xE7, 0x0F, 0xA7, 0xE9, 0xAB,
+   0x72, 0x24, 0x30, 0x49, 0xFE, 0xB8,
+   0xDE, 0xEC, 0xC1, 0x46, 0xB9, 0xB1},
+  .length = 24},
},
{
-   .prime = {
-   .data = {
-   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-   0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-   0x00, 0x00, 0x00, 0x01
-   },
-   .length = 28
-   },
-   .order = {
-   .data = {
-   0XFF, 0XFF, 0XFF, 0XFF, 0XFF, 0XFF, 0XFF, 0XFF,
-   0XFF, 0XFF, 0XFF, 0XFF, 0XFF, 0XFF, 0X16, 0XA2,
-   0XE0, 0XB8, 0XF0, 0X3E, 0X13, 0XDD, 0X29, 0X45,
-   0X5C, 0X5C, 0X2A, 0X3D
-   },
-   .length = 28
-   },
+   .prime = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+  0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
+

[dpdk-dev] [PATCH 2/3] crypto/cnxk: update asym ECDSA messages in sync with ucode

[kirankumark]

From: Kiran Kumar K 

Adding changes to asymmetric ECDSA messages to align with
the new ucode for cnxk device.

Signed-off-by: Kiran Kumar K 
---
 drivers/crypto/cnxk/cnxk_ae.h| 24 
 drivers/crypto/cnxk/cnxk_cryptodev.h |  2 +-
 2 files changed, 21 insertions(+), 5 deletions(-)

diff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h
index c752e62ea5..174a940ab8 100644
--- a/drivers/crypto/cnxk/cnxk_ae.h
+++ b/drivers/crypto/cnxk/cnxk_ae.h
@@ -439,7 +439,7 @@ cnxk_ae_ecdsa_sign_prep(struct rte_crypto_ecdsa_op_param 
*ecdsa,
 * Please note, private key, order cannot exceed prime
 * length i.e 3 * p_align.
 */
-   dlen = sizeof(fpm_table_iova) + k_align + m_align + p_align * 3;
+   dlen = sizeof(fpm_table_iova) + k_align + m_align + p_align * 5;
 
memset(dptr, 0, dlen);
 
@@ -461,12 +461,18 @@ cnxk_ae_ecdsa_sign_prep(struct rte_crypto_ecdsa_op_param 
*ecdsa,
memcpy(dptr, ecdsa->message.data, message_len);
dptr += m_align;
 
+   memcpy(dptr, ec_grp->consta.data, prime_len);
+   dptr += p_align;
+
+   memcpy(dptr, ec_grp->constb.data, prime_len);
+   dptr += p_align;
+
/* Setup opcodes */
w4.s.opcode_major = ROC_AE_MAJOR_OP_ECDSA;
w4.s.opcode_minor = ROC_AE_MINOR_OP_ECDSA_SIGN;
 
w4.s.param1 = curveid | (message_len << 8);
-   w4.s.param2 = k_len;
+   w4.s.param2 = (pkey_len << 8) | k_len;
w4.s.dlen = dlen;
 
inst->w4.u64 = w4.u64;
@@ -521,7 +527,7 @@ cnxk_ae_ecdsa_verify_prep(struct rte_crypto_ecdsa_op_param 
*ecdsa,
 * Please note sign, public key and order can not exceed prime length
 * i.e. 6 * p_align
 */
-   dlen = sizeof(fpm_table_iova) + m_align + (6 * p_align);
+   dlen = sizeof(fpm_table_iova) + m_align + (8 * p_align);
 
memset(dptr, 0, dlen);
 
@@ -549,6 +555,12 @@ cnxk_ae_ecdsa_verify_prep(struct rte_crypto_ecdsa_op_param 
*ecdsa,
memcpy(dptr + qy_offset, ecdsa->q.y.data, qy_len);
dptr += p_align;
 
+   memcpy(dptr, ec_grp->consta.data, prime_len);
+   dptr += p_align;
+
+   memcpy(dptr, ec_grp->constb.data, prime_len);
+   dptr += p_align;
+
/* Setup opcodes */
w4.s.opcode_major = ROC_AE_MAJOR_OP_ECDSA;
w4.s.opcode_minor = ROC_AE_MINOR_OP_ECDSA_VERIFY;
@@ -612,7 +624,7 @@ cnxk_ae_ecpm_prep(struct rte_crypto_ecpm_op_param *ecpm,
 * scalar length),
 * Please note point length is equivalent to prime of the curve
 */
-   dlen = 3 * p_align + scalar_align;
+   dlen = 5 * p_align + scalar_align;
 
x1_offset = prime_len - x1_len;
y1_offset = prime_len - y1_len;
@@ -628,6 +640,10 @@ cnxk_ae_ecpm_prep(struct rte_crypto_ecpm_op_param *ecpm,
dptr += scalar_align;
memcpy(dptr, ec_grp->prime.data, ec_grp->prime.length);
dptr += p_align;
+   memcpy(dptr, ec_grp->consta.data, ec_grp->consta.length);
+   dptr += p_align;
+   memcpy(dptr, ec_grp->constb.data, ec_grp->constb.length);
+   dptr += p_align;
 
/* Setup opcodes */
w4.s.opcode_major = ROC_AE_MAJOR_OP_ECC;
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h 
b/drivers/crypto/cnxk/cnxk_cryptodev.h
index ff46d16e58..b3856f7eaa 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev.h
@@ -13,7 +13,7 @@
 #define CNXK_CPT_MAX_CAPS   34
 #define CNXK_SEC_CRYPTO_MAX_CAPS 4
 #define CNXK_SEC_MAX_CAPS   3
-#define CNXK_AE_EC_ID_MAX   5
+#define CNXK_AE_EC_ID_MAX   8
 /**
  * Device private data
  */
-- 
2.25.1

[dpdk-dev] [PATCH] app/crypto-perf: add throughput test for asymmetric crypto

[kirankumark]

From: Kiran Kumar K 

Adding support for asymmetric crypto perf test.
Only modex is supported for now.

Signed-off-by: Kiran Kumar K 
---
 app/test-crypto-perf/cperf_ops.c |  59 ++-
 app/test-crypto-perf/cperf_options.h |   3 +-
 app/test-crypto-perf/cperf_options_parsing.c |   4 +
 app/test-crypto-perf/cperf_test_common.c |  16 +++
 app/test-crypto-perf/cperf_test_throughput.c |  24 +++--
 app/test-crypto-perf/cperf_test_vectors.c|  36 +++
 app/test-crypto-perf/cperf_test_vectors.h|  11 ++
 app/test-crypto-perf/main.c  | 105 +--
 8 files changed, 242 insertions(+), 16 deletions(-)

diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 0d7baf214b..4b7d66edb2 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -8,6 +8,33 @@
 #include "cperf_ops.h"
 #include "cperf_test_vectors.h"
 
+static int
+cperf_set_ops_asym(struct rte_crypto_op **ops,
+  uint32_t src_buf_offset __rte_unused,
+  uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
+  struct rte_cryptodev_sym_session *sess,
+  const struct cperf_options *options __rte_unused,
+  const struct cperf_test_vector *test_vector __rte_unused,
+  uint16_t iv_offset __rte_unused,
+  uint32_t *imix_idx __rte_unused)
+{
+   uint16_t i;
+   uint8_t result[sizeof(perf_mod_p)] = { 0 };
+   struct rte_cryptodev_asym_session *asym_sess = (void *)sess;
+
+   for (i = 0; i < nb_ops; i++) {
+   struct rte_crypto_asym_op *asym_op = ops[i]->asym;
+
+   ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+   asym_op->modex.base.data = perf_base;
+   asym_op->modex.base.length = sizeof(perf_base);
+   asym_op->modex.result.data = result;
+   asym_op->modex.result.length = sizeof(result);
+   rte_crypto_op_attach_asym_session(ops[i], asym_sess);
+   }
+   return 0;
+}
+
 #ifdef RTE_LIB_SECURITY
 static int
 cperf_set_ops_security(struct rte_crypto_op **ops,
@@ -550,7 +577,32 @@ cperf_create_session(struct rte_mempool *sess_mp,
struct rte_crypto_sym_xform auth_xform;
struct rte_crypto_sym_xform aead_xform;
struct rte_cryptodev_sym_session *sess = NULL;
-
+   struct rte_crypto_asym_xform xform = {0};
+   int rc;
+
+   if (options->op_type == CPERF_ASYM_MODEX) {
+   xform.next = NULL;
+   xform.xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX;
+   xform.modex.modulus.data = perf_mod_p;
+   xform.modex.modulus.length = sizeof(perf_mod_p);
+   xform.modex.exponent.data = perf_mod_e;
+   xform.modex.exponent.length = sizeof(perf_mod_e);
+
+   sess = (void *)rte_cryptodev_asym_session_create(sess_mp);
+   if (sess == NULL)
+   return NULL;
+   rc = rte_cryptodev_asym_session_init(dev_id, (void *)sess,
+&xform, priv_mp);
+   if (rc < 0) {
+   if (sess != NULL) {
+   rte_cryptodev_asym_session_clear(dev_id,
+(void *)sess);
+   rte_cryptodev_asym_session_free((void *)sess);
+   }
+   return NULL;
+   }
+   return sess;
+   }
 #ifdef RTE_LIB_SECURITY
/*
 * security only
@@ -820,6 +872,11 @@ cperf_get_op_functions(const struct cperf_options *options,
 
op_fns->sess_create = cperf_create_session;
 
+   if (options->op_type == CPERF_ASYM_MODEX) {
+   op_fns->populate_ops = cperf_set_ops_asym;
+   return 0;
+   }
+
if (options->op_type == CPERF_AEAD) {
op_fns->populate_ops = cperf_set_ops_aead;
return 0;
diff --git a/app/test-crypto-perf/cperf_options.h 
b/app/test-crypto-perf/cperf_options.h
index 9664a4b343..f5ea2b90a5 100644
--- a/app/test-crypto-perf/cperf_options.h
+++ b/app/test-crypto-perf/cperf_options.h
@@ -79,7 +79,8 @@ enum cperf_op_type {
CPERF_AUTH_THEN_CIPHER,
CPERF_AEAD,
CPERF_PDCP,
-   CPERF_DOCSIS
+   CPERF_DOCSIS,
+   CPERF_ASYM_MODEX
 };
 
 extern const char *cperf_op_type_strs[];
diff --git a/app/test-crypto-perf/cperf_options_parsing.c 
b/app/test-crypto-perf/cperf_options_parsing.c
index e84f56cfaa..fcff187257 100644
--- a/app/test-crypto-perf/cperf_options_parsing.c
+++ b/app/test-crypto-perf/cperf_options_parsing.c
@@ -457,6 +457,10 @@ parse_op_type(struct cperf_options *opts, const char *arg)
{
cperf_op_type_strs[CPERF_DOCSIS],
CPERF_DOCSIS
+   },
+   {
+

[PATCH v2] ethdev: add Tx queue flow matching item

[kirankumark]

From: Kiran Kumar K 

Adding support for Tx queue flow matching item.
This item is valid only for egress rules.
An example use case would be that application can
set different vlan insert rules with different PCP values
based on Tx queue number.

Signed-off-by: Kiran Kumar K 
---
 app/test-pmd/cmdline_flow.c | 28 +
 doc/guides/prog_guide/rte_flow.rst  |  7 ++
 doc/guides/rel_notes/release_23_07.rst  |  5 
 doc/guides/testpmd_app_ug/testpmd_funcs.rst |  4 +++
 lib/ethdev/rte_flow.c   |  1 +
 lib/ethdev/rte_flow.h   | 26 +++
 6 files changed, 71 insertions(+)

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index 58939ec321..a68a6080a8 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -496,6 +496,8 @@ enum index {
ITEM_QUOTA_STATE_NAME,
ITEM_AGGR_AFFINITY,
ITEM_AGGR_AFFINITY_VALUE,
+   ITEM_TX_QUEUE,
+   ITEM_TX_QUEUE_VALUE,
 
/* Validate/create actions. */
ACTIONS,
@@ -1452,6 +1454,7 @@ static const enum index next_item[] = {
ITEM_METER,
ITEM_QUOTA,
ITEM_AGGR_AFFINITY,
+   ITEM_TX_QUEUE,
END_SET,
ZERO,
 };
@@ -1953,6 +1956,12 @@ static const enum index item_aggr_affinity[] = {
ZERO,
 };
 
+static const enum index item_tx_queue[] = {
+   ITEM_TX_QUEUE_VALUE,
+   ITEM_NEXT,
+   ZERO,
+};
+
 static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -6945,6 +6954,22 @@ static const struct token token_list[] = {
.args = ARGS(ARGS_ENTRY(struct rte_flow_item_aggr_affinity,
affinity)),
},
+   [ITEM_TX_QUEUE] = {
+   .name = "tx_queue",
+   .help = "match on the tx queue of send packet",
+   .priv = PRIV_ITEM(TX_QUEUE,
+ sizeof(struct rte_flow_item_tx_queue)),
+   .next = NEXT(item_tx_queue),
+   .call = parse_vc,
+   },
+   [ITEM_TX_QUEUE_VALUE] = {
+   .name = "tx_queue_value",
+   .help = "tx queue value",
+   .next = NEXT(item_tx_queue, NEXT_ENTRY(COMMON_UNSIGNED),
+item_param),
+   .args = ARGS(ARGS_ENTRY(struct rte_flow_item_tx_queue,
+   tx_queue)),
+   },
 };
 
 /** Remove and return last entry from argument stack. */
@@ -11849,6 +11874,9 @@ flow_item_default_mask(const struct rte_flow_item *item)
case RTE_FLOW_ITEM_TYPE_AGGR_AFFINITY:
mask = &rte_flow_item_aggr_affinity_mask;
break;
+   case RTE_FLOW_ITEM_TYPE_TX_QUEUE:
+   mask = &rte_flow_item_tx_queue_mask;
+   break;
default:
break;
}
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 32fc45516a..ac5c65131f 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1486,6 +1486,13 @@ This item is meant to use the same structure as `Item: 
PORT_REPRESENTOR`_.
 
 See also `Action: REPRESENTED_PORT`_.
 
+Item: ``TX_QUEUE``
+^^^
+
+Matches on the Tx queue of send packet .
+
+- ``tx_queue``: Tx queue.
+
 Item: ``AGGR_AFFINITY``
 ^^^
 
diff --git a/doc/guides/rel_notes/release_23_07.rst 
b/doc/guides/rel_notes/release_23_07.rst
index a9b1293689..bb04d99125 100644
--- a/doc/guides/rel_notes/release_23_07.rst
+++ b/doc/guides/rel_notes/release_23_07.rst
@@ -55,6 +55,11 @@ New Features
  Also, make sure to start the actual text at the margin.
  ===
 
+   * **Added flow matching of tx queue.**
+
+ Added ``RTE_FLOW_ITEM_TYPE_TX_QUEUE`` rte_flow pattern to match tx queue 
of
+ send packet.
+
 
 Removed Items
 -
diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst 
b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
index 8f23847859..29f7dd4428 100644
--- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
+++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
@@ -3779,6 +3779,10 @@ This section lists supported pattern items and their 
attributes, if any.
 
   - ``affinity {value}``: aggregated port (starts from 1).
 
+- ``tx_queue``: match tx queue of send packet.
+
+  - ``tx_queue {value}``: send queue value (starts from 0).
+
 - ``send_to_kernel``: send packets to kernel.
 
 
diff --git a/lib/ethdev/rte_flow.c b/lib/ethdev/rte_flow.c
index 69e6e749f7..f0d7f868fa 100644
--- a/lib/ethdev/rte_flow.c
+++ b/lib/ethdev/rte_flow.c
@@ -164,6 +164,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] 
= {
MK_FLOW_ITEM(IPV6_ROUTING_EXT, sizeof(struct 
rte_flow_item_ipv6_routing_ext)),
MK_FLOW_ITEM(QUOTA, sizeof(struct rte_flow_item_quota)),
MK_FLOW_ITEM(AGGR_AFFINITY, sizeof(struct rte_

[PATCH v3] ethdev: add Tx queue flow matching item

[kirankumark]

From: Kiran Kumar K 

Adding support for Tx queue flow matching item.
This item is valid only for egress rules.
An example use case would be that application can
set different vlan insert rules with different PCP values
based on Tx queue number.

Signed-off-by: Kiran Kumar K 
---
 app/test-pmd/cmdline_flow.c | 28 +
 doc/guides/prog_guide/rte_flow.rst  |  7 ++
 doc/guides/rel_notes/release_23_07.rst  |  5 
 doc/guides/testpmd_app_ug/testpmd_funcs.rst |  4 +++
 lib/ethdev/rte_flow.c   |  1 +
 lib/ethdev/rte_flow.h   | 26 +++
 6 files changed, 71 insertions(+)

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index 58939ec321..a68a6080a8 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -496,6 +496,8 @@ enum index {
ITEM_QUOTA_STATE_NAME,
ITEM_AGGR_AFFINITY,
ITEM_AGGR_AFFINITY_VALUE,
+   ITEM_TX_QUEUE,
+   ITEM_TX_QUEUE_VALUE,
 
/* Validate/create actions. */
ACTIONS,
@@ -1452,6 +1454,7 @@ static const enum index next_item[] = {
ITEM_METER,
ITEM_QUOTA,
ITEM_AGGR_AFFINITY,
+   ITEM_TX_QUEUE,
END_SET,
ZERO,
 };
@@ -1953,6 +1956,12 @@ static const enum index item_aggr_affinity[] = {
ZERO,
 };
 
+static const enum index item_tx_queue[] = {
+   ITEM_TX_QUEUE_VALUE,
+   ITEM_NEXT,
+   ZERO,
+};
+
 static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -6945,6 +6954,22 @@ static const struct token token_list[] = {
.args = ARGS(ARGS_ENTRY(struct rte_flow_item_aggr_affinity,
affinity)),
},
+   [ITEM_TX_QUEUE] = {
+   .name = "tx_queue",
+   .help = "match on the tx queue of send packet",
+   .priv = PRIV_ITEM(TX_QUEUE,
+ sizeof(struct rte_flow_item_tx_queue)),
+   .next = NEXT(item_tx_queue),
+   .call = parse_vc,
+   },
+   [ITEM_TX_QUEUE_VALUE] = {
+   .name = "tx_queue_value",
+   .help = "tx queue value",
+   .next = NEXT(item_tx_queue, NEXT_ENTRY(COMMON_UNSIGNED),
+item_param),
+   .args = ARGS(ARGS_ENTRY(struct rte_flow_item_tx_queue,
+   tx_queue)),
+   },
 };
 
 /** Remove and return last entry from argument stack. */
@@ -11849,6 +11874,9 @@ flow_item_default_mask(const struct rte_flow_item *item)
case RTE_FLOW_ITEM_TYPE_AGGR_AFFINITY:
mask = &rte_flow_item_aggr_affinity_mask;
break;
+   case RTE_FLOW_ITEM_TYPE_TX_QUEUE:
+   mask = &rte_flow_item_tx_queue_mask;
+   break;
default:
break;
}
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 32fc45516a..ac5c65131f 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1486,6 +1486,13 @@ This item is meant to use the same structure as `Item: 
PORT_REPRESENTOR`_.
 
 See also `Action: REPRESENTED_PORT`_.
 
+Item: ``TX_QUEUE``
+^^^
+
+Matches on the Tx queue of send packet .
+
+- ``tx_queue``: Tx queue.
+
 Item: ``AGGR_AFFINITY``
 ^^^
 
diff --git a/doc/guides/rel_notes/release_23_07.rst 
b/doc/guides/rel_notes/release_23_07.rst
index a9b1293689..bb04d99125 100644
--- a/doc/guides/rel_notes/release_23_07.rst
+++ b/doc/guides/rel_notes/release_23_07.rst
@@ -55,6 +55,11 @@ New Features
  Also, make sure to start the actual text at the margin.
  ===
 
+   * **Added flow matching of tx queue.**
+
+ Added ``RTE_FLOW_ITEM_TYPE_TX_QUEUE`` rte_flow pattern to match tx queue 
of
+ send packet.
+
 
 Removed Items
 -
diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst 
b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
index 8f23847859..29f7dd4428 100644
--- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
+++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
@@ -3779,6 +3779,10 @@ This section lists supported pattern items and their 
attributes, if any.
 
   - ``affinity {value}``: aggregated port (starts from 1).
 
+- ``tx_queue``: match tx queue of send packet.
+
+  - ``tx_queue {value}``: send queue value (starts from 0).
+
 - ``send_to_kernel``: send packets to kernel.
 
 
diff --git a/lib/ethdev/rte_flow.c b/lib/ethdev/rte_flow.c
index 69e6e749f7..f0d7f868fa 100644
--- a/lib/ethdev/rte_flow.c
+++ b/lib/ethdev/rte_flow.c
@@ -164,6 +164,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] 
= {
MK_FLOW_ITEM(IPV6_ROUTING_EXT, sizeof(struct 
rte_flow_item_ipv6_routing_ext)),
MK_FLOW_ITEM(QUOTA, sizeof(struct rte_flow_item_quota)),
MK_FLOW_ITEM(AGGR_AFFINITY, sizeof(struct rte_

[dpdk-dev][PATCH] ethdev: add send queue flow matching item

[kirankumark]

From: Kiran Kumar K 

Adding support for send queue flow matching item.
This item is valid only for egress rules.
An example use case would be that application can
set different vlan insert rules with different PCP values
based on tx queue number.

Signed-off-by: Kiran Kumar K 
---
 app/test-pmd/cmdline_flow.c | 28 +++
 doc/guides/prog_guide/rte_flow.rst  |  7 +
 doc/guides/rel_notes/release_23_07.rst  | 31 ++---
 doc/guides/testpmd_app_ug/testpmd_funcs.rst |  4 +++
 lib/ethdev/rte_flow.c   |  1 +
 lib/ethdev/rte_flow.h   | 26 +
 6 files changed, 68 insertions(+), 29 deletions(-)

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index 58939ec321..a68a6080a8 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -496,6 +496,8 @@ enum index {
ITEM_QUOTA_STATE_NAME,
ITEM_AGGR_AFFINITY,
ITEM_AGGR_AFFINITY_VALUE,
+   ITEM_TX_QUEUE,
+   ITEM_TX_QUEUE_VALUE,
 
/* Validate/create actions. */
ACTIONS,
@@ -1452,6 +1454,7 @@ static const enum index next_item[] = {
ITEM_METER,
ITEM_QUOTA,
ITEM_AGGR_AFFINITY,
+   ITEM_TX_QUEUE,
END_SET,
ZERO,
 };
@@ -1953,6 +1956,12 @@ static const enum index item_aggr_affinity[] = {
ZERO,
 };
 
+static const enum index item_tx_queue[] = {
+   ITEM_TX_QUEUE_VALUE,
+   ITEM_NEXT,
+   ZERO,
+};
+
 static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -6945,6 +6954,22 @@ static const struct token token_list[] = {
.args = ARGS(ARGS_ENTRY(struct rte_flow_item_aggr_affinity,
affinity)),
},
+   [ITEM_TX_QUEUE] = {
+   .name = "tx_queue",
+   .help = "match on the tx queue of send packet",
+   .priv = PRIV_ITEM(TX_QUEUE,
+ sizeof(struct rte_flow_item_tx_queue)),
+   .next = NEXT(item_tx_queue),
+   .call = parse_vc,
+   },
+   [ITEM_TX_QUEUE_VALUE] = {
+   .name = "tx_queue_value",
+   .help = "tx queue value",
+   .next = NEXT(item_tx_queue, NEXT_ENTRY(COMMON_UNSIGNED),
+item_param),
+   .args = ARGS(ARGS_ENTRY(struct rte_flow_item_tx_queue,
+   tx_queue)),
+   },
 };
 
 /** Remove and return last entry from argument stack. */
@@ -11849,6 +11874,9 @@ flow_item_default_mask(const struct rte_flow_item *item)
case RTE_FLOW_ITEM_TYPE_AGGR_AFFINITY:
mask = &rte_flow_item_aggr_affinity_mask;
break;
+   case RTE_FLOW_ITEM_TYPE_TX_QUEUE:
+   mask = &rte_flow_item_tx_queue_mask;
+   break;
default:
break;
}
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 32fc45516a..7154b56330 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1486,6 +1486,13 @@ This item is meant to use the same structure as `Item: 
PORT_REPRESENTOR`_.
 
 See also `Action: REPRESENTED_PORT`_.
 
+Item: ``TX_QUEUE``
+^^^
+
+Matches on the tx queue of send packet .
+
+- ``tx_queue``: Tx queue.
+
 Item: ``AGGR_AFFINITY``
 ^^^
 
diff --git a/doc/guides/rel_notes/release_23_07.rst 
b/doc/guides/rel_notes/release_23_07.rst
index a9b1293689..631cbd2b58 100644
--- a/doc/guides/rel_notes/release_23_07.rst
+++ b/doc/guides/rel_notes/release_23_07.rst
@@ -24,36 +24,9 @@ DPDK Release 23.07
 New Features
 
 
-.. This section should contain new features added in this release.
-   Sample format:
+* **Added flow matching of tx queue.**
 
-   * **Add a title in the past tense with a full stop.**
-
- Add a short 1-2 sentence description in the past tense.
- The description should be enough to allow someone scanning
- the release notes to understand the new feature.
-
- If the feature adds a lot of sub-features you can use a bullet list
- like this:
-
- * Added feature foo to do something.
- * Enhanced feature bar to do something else.
-
- Refer to the previous release notes for examples.
-
- Suggested order in release notes items:
- * Core libs (EAL, mempool, ring, mbuf, buses)
- * Device abstraction libs and PMDs (ordered alphabetically by vendor name)
-   - ethdev (lib, PMDs)
-   - cryptodev (lib, PMDs)
-   - eventdev (lib, PMDs)
-   - etc
- * Other libs
- * Apps, Examples, Tools (if significant)
-
- This section is a comment. Do not overwrite or remove it.
- Also, make sure to start the actual text at the margin.
- ===
+  Added ``RTE_FLOW_ITEM_TYPE_TX_QUEUE`` to match tx queue of send packet.
 
 
 Removed

[dpdk-dev] [PATCH v2] app/crypto-perf: add throughput test for asymmetric crypto

[kirankumark]

From: Kiran Kumar K 

Adding support for asymmetric crypto perf test.
Only modex is supported for now.

Signed-off-by: Kiran Kumar K 
---
 app/test-crypto-perf/cperf_ops.c |  59 ++-
 app/test-crypto-perf/cperf_options.h |   3 +-
 app/test-crypto-perf/cperf_options_parsing.c |   4 +
 app/test-crypto-perf/cperf_test_common.c |  16 +++
 app/test-crypto-perf/cperf_test_throughput.c |  24 +++--
 app/test-crypto-perf/cperf_test_vectors.c|  36 +++
 app/test-crypto-perf/cperf_test_vectors.h|  11 ++
 app/test-crypto-perf/main.c  | 105 +--
 8 files changed, 242 insertions(+), 16 deletions(-)

diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 0d7baf214b..4b7d66edb2 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -8,6 +8,33 @@
 #include "cperf_ops.h"
 #include "cperf_test_vectors.h"
 
+static int
+cperf_set_ops_asym(struct rte_crypto_op **ops,
+  uint32_t src_buf_offset __rte_unused,
+  uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
+  struct rte_cryptodev_sym_session *sess,
+  const struct cperf_options *options __rte_unused,
+  const struct cperf_test_vector *test_vector __rte_unused,
+  uint16_t iv_offset __rte_unused,
+  uint32_t *imix_idx __rte_unused)
+{
+   uint16_t i;
+   uint8_t result[sizeof(perf_mod_p)] = { 0 };
+   struct rte_cryptodev_asym_session *asym_sess = (void *)sess;
+
+   for (i = 0; i < nb_ops; i++) {
+   struct rte_crypto_asym_op *asym_op = ops[i]->asym;
+
+   ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+   asym_op->modex.base.data = perf_base;
+   asym_op->modex.base.length = sizeof(perf_base);
+   asym_op->modex.result.data = result;
+   asym_op->modex.result.length = sizeof(result);
+   rte_crypto_op_attach_asym_session(ops[i], asym_sess);
+   }
+   return 0;
+}
+
 #ifdef RTE_LIB_SECURITY
 static int
 cperf_set_ops_security(struct rte_crypto_op **ops,
@@ -550,7 +577,32 @@ cperf_create_session(struct rte_mempool *sess_mp,
struct rte_crypto_sym_xform auth_xform;
struct rte_crypto_sym_xform aead_xform;
struct rte_cryptodev_sym_session *sess = NULL;
-
+   struct rte_crypto_asym_xform xform = {0};
+   int rc;
+
+   if (options->op_type == CPERF_ASYM_MODEX) {
+   xform.next = NULL;
+   xform.xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX;
+   xform.modex.modulus.data = perf_mod_p;
+   xform.modex.modulus.length = sizeof(perf_mod_p);
+   xform.modex.exponent.data = perf_mod_e;
+   xform.modex.exponent.length = sizeof(perf_mod_e);
+
+   sess = (void *)rte_cryptodev_asym_session_create(sess_mp);
+   if (sess == NULL)
+   return NULL;
+   rc = rte_cryptodev_asym_session_init(dev_id, (void *)sess,
+&xform, priv_mp);
+   if (rc < 0) {
+   if (sess != NULL) {
+   rte_cryptodev_asym_session_clear(dev_id,
+(void *)sess);
+   rte_cryptodev_asym_session_free((void *)sess);
+   }
+   return NULL;
+   }
+   return sess;
+   }
 #ifdef RTE_LIB_SECURITY
/*
 * security only
@@ -820,6 +872,11 @@ cperf_get_op_functions(const struct cperf_options *options,
 
op_fns->sess_create = cperf_create_session;
 
+   if (options->op_type == CPERF_ASYM_MODEX) {
+   op_fns->populate_ops = cperf_set_ops_asym;
+   return 0;
+   }
+
if (options->op_type == CPERF_AEAD) {
op_fns->populate_ops = cperf_set_ops_aead;
return 0;
diff --git a/app/test-crypto-perf/cperf_options.h 
b/app/test-crypto-perf/cperf_options.h
index 9664a4b343..f5ea2b90a5 100644
--- a/app/test-crypto-perf/cperf_options.h
+++ b/app/test-crypto-perf/cperf_options.h
@@ -79,7 +79,8 @@ enum cperf_op_type {
CPERF_AUTH_THEN_CIPHER,
CPERF_AEAD,
CPERF_PDCP,
-   CPERF_DOCSIS
+   CPERF_DOCSIS,
+   CPERF_ASYM_MODEX
 };
 
 extern const char *cperf_op_type_strs[];
diff --git a/app/test-crypto-perf/cperf_options_parsing.c 
b/app/test-crypto-perf/cperf_options_parsing.c
index e84f56cfaa..fcff187257 100644
--- a/app/test-crypto-perf/cperf_options_parsing.c
+++ b/app/test-crypto-perf/cperf_options_parsing.c
@@ -457,6 +457,10 @@ parse_op_type(struct cperf_options *opts, const char *arg)
{
cperf_op_type_strs[CPERF_DOCSIS],
CPERF_DOCSIS
+   },
+   {
+

[dpdk-dev][PATCH] drivers: optimize the build time for cnxk

[kirankumark]

From: Kiran Kumar K 

While building cnxk, if build platform is cn9k, cn10k files
are also being compiled and vice versa. This is causing more
build time. Adding changes to avoid this by checking the
platform and compile only platform specific files. If no
platform is provided, both cn9k and cn10k files will be compiled.

Signed-off-by: Kiran Kumar K 
---
 drivers/event/cnxk/cn9k_eventdev.c | 16 
 drivers/event/cnxk/cnxk_eventdev.c | 14 ++
 drivers/event/cnxk/cnxk_eventdev.h |  1 +
 drivers/event/cnxk/meson.build | 22 ++
 drivers/net/cnxk/meson.build   | 14 ++
 5 files changed, 47 insertions(+), 20 deletions(-)

diff --git a/drivers/event/cnxk/cn9k_eventdev.c 
b/drivers/event/cnxk/cn9k_eventdev.c
index f5a42a86f8..7b09f27644 100644
--- a/drivers/event/cnxk/cn9k_eventdev.c
+++ b/drivers/event/cnxk/cn9k_eventdev.c
@@ -6,7 +6,6 @@
 #include "cnxk_eventdev.h"
 #include "cnxk_worker.h"
 
-#define CN9K_DUAL_WS_NB_WS 2
 #define CN9K_DUAL_WS_PAIR_ID(x, id) (((x)*CN9K_DUAL_WS_NB_WS) + id)
 
 #define CN9K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops)
\
@@ -239,21 +238,6 @@ cn9k_sso_hws_reset(void *arg, void *hws)
ws->swtag_req = 0;
 }
 
-void
-cn9k_sso_set_rsrc(void *arg)
-{
-   struct cnxk_sso_evdev *dev = arg;
-
-   if (dev->dual_ws)
-   dev->max_event_ports = dev->sso.max_hws / CN9K_DUAL_WS_NB_WS;
-   else
-   dev->max_event_ports = dev->sso.max_hws;
-   dev->max_event_queues =
-   dev->sso.max_hwgrp > RTE_EVENT_MAX_QUEUES_PER_DEV ?
- RTE_EVENT_MAX_QUEUES_PER_DEV :
- dev->sso.max_hwgrp;
-}
-
 static int
 cn9k_sso_rsrc_init(void *arg, uint8_t hws, uint8_t hwgrp)
 {
diff --git a/drivers/event/cnxk/cnxk_eventdev.c 
b/drivers/event/cnxk/cnxk_eventdev.c
index db62d32a81..efa9359ce6 100644
--- a/drivers/event/cnxk/cnxk_eventdev.c
+++ b/drivers/event/cnxk/cnxk_eventdev.c
@@ -623,3 +623,17 @@ cnxk_sso_remove(struct rte_pci_device *pci_dev)
 {
return rte_event_pmd_pci_remove(pci_dev, cnxk_sso_fini);
 }
+
+void
+cn9k_sso_set_rsrc(void *arg)
+{
+   struct cnxk_sso_evdev *dev = arg;
+
+   if (dev->dual_ws)
+   dev->max_event_ports = dev->sso.max_hws / CN9K_DUAL_WS_NB_WS;
+   else
+   dev->max_event_ports = dev->sso.max_hws;
+   dev->max_event_queues = dev->sso.max_hwgrp > 
RTE_EVENT_MAX_QUEUES_PER_DEV ?
+   RTE_EVENT_MAX_QUEUES_PER_DEV :
+   dev->sso.max_hwgrp;
+}
diff --git a/drivers/event/cnxk/cnxk_eventdev.h 
b/drivers/event/cnxk/cnxk_eventdev.h
index 738e335ea4..fdbcfb4640 100644
--- a/drivers/event/cnxk/cnxk_eventdev.h
+++ b/drivers/event/cnxk/cnxk_eventdev.h
@@ -56,6 +56,7 @@
 #define CNXK_TAG_IS_HEAD(x)(BIT_ULL(35) & x)
 
 #define CN9K_SSOW_GET_BASE_ADDR(_GW) ((_GW)-SSOW_LF_GWS_OP_GET_WORK0)
+#define CN9K_DUAL_WS_NB_WS  2
 
 #define CN10K_GW_MODE_NONE 0
 #define CN10K_GW_MODE_PREF 1
diff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build
index aa42ab3a90..227c6ae7a8 100644
--- a/drivers/event/cnxk/meson.build
+++ b/drivers/event/cnxk/meson.build
@@ -8,11 +8,17 @@ if not is_linux or not dpdk_conf.get('RTE_ARCH_64')
 subdir_done()
 endif
 
+if meson.is_cross_build()
+soc_type = meson.get_cross_property('platform', '')
+else
+soc_type = platform
+endif
+
+if soc_type != 'cn9k' and soc_type != 'cn10k'
+soc_type = 'all'
+endif
+
 sources = files(
-'cn9k_eventdev.c',
-'cn9k_worker.c',
-'cn10k_eventdev.c',
-'cn10k_worker.c',
 'cnxk_eventdev.c',
 'cnxk_eventdev_adptr.c',
 'cnxk_eventdev_selftest.c',
@@ -21,7 +27,10 @@ sources = files(
 'cnxk_tim_worker.c',
 )
 
+if soc_type == 'cn9k' or soc_type == 'all'
 sources += files(
+'cn9k_eventdev.c',
+'cn9k_worker.c',
 'deq/cn9k/deq_0_15_burst.c',
 'deq/cn9k/deq_16_31_burst.c',
 'deq/cn9k/deq_32_47_burst.c',
@@ -320,8 +329,12 @@ sources += files(
 'tx/cn9k/tx_96_111_dual_seg.c',
 'tx/cn9k/tx_112_127_dual_seg.c',
 )
+endif
 
+if soc_type == 'cn10k' or soc_type == 'all'
 sources += files(
+'cn10k_eventdev.c',
+'cn10k_worker.c',
 'deq/cn10k/deq_0_15_burst.c',
 'deq/cn10k/deq_16_31_burst.c',
 'deq/cn10k/deq_32_47_burst.c',
@@ -470,6 +483,7 @@ sources += files(
 'tx/cn10k/tx_96_111_seg.c',
 'tx/cn10k/tx_112_127_seg.c',
 )
+endif
 
 extra_flags = ['-flax-vector-conversions', '-Wno-strict-aliasing']
 foreach flag: extra_flags
diff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build
index c7ca24d437..99531c1917 100644
--- a/drivers/net/cnxk/meson.build
+++ b/drivers/net/cnxk/meson.build
@@ -8,6 +8,16 @@ if not dpdk_conf.get('RTE_ARCH_64')
 subdir_done()
 endif
 
+if meson.is_cross_build()
+   

[dpdk-dev][PATCH] net/cnxk: add support for L2 ether ptype for cnxk

[kirankumark]

From: Kiran Kumar K 

Adding lookup support for RTE_PTYPE_L2_ETHER in cnxk driver.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/cnxk/cnxk_lookup.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/cnxk/cnxk_lookup.c b/drivers/net/cnxk/cnxk_lookup.c
index f36fb8f27a..5acf73fe17 100644
--- a/drivers/net/cnxk/cnxk_lookup.c
+++ b/drivers/net/cnxk/cnxk_lookup.c
@@ -15,6 +15,7 @@ cnxk_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev)
RTE_SET_USED(eth_dev);
 
static const uint32_t ptypes[] = {
+   RTE_PTYPE_L2_ETHER,   /* LA */
RTE_PTYPE_L2_ETHER_QINQ,  /* LB */
RTE_PTYPE_L2_ETHER_VLAN,  /* LB */
RTE_PTYPE_L2_ETHER_TIMESYNC,  /* LB */
@@ -88,19 +89,25 @@ nix_create_non_tunnel_ptype_array(uint16_t *ptype)
case NPC_LT_LB_CTAG:
val |= RTE_PTYPE_L2_ETHER_VLAN;
break;
+   default:
+   val |= RTE_PTYPE_L2_ETHER;
}
 
switch (lc) {
case NPC_LT_LC_ARP:
+   val = (val & ~RTE_PTYPE_L2_MASK);
val |= RTE_PTYPE_L2_ETHER_ARP;
break;
case NPC_LT_LC_NSH:
+   val = (val & ~RTE_PTYPE_L2_MASK);
val |= RTE_PTYPE_L2_ETHER_NSH;
break;
case NPC_LT_LC_FCOE:
+   val = (val & ~RTE_PTYPE_L2_MASK);
val |= RTE_PTYPE_L2_ETHER_FCOE;
break;
case NPC_LT_LC_MPLS:
+   val = (val & ~RTE_PTYPE_L2_MASK);
val |= RTE_PTYPE_L2_ETHER_MPLS;
break;
case NPC_LT_LC_IP:
@@ -116,6 +123,7 @@ nix_create_non_tunnel_ptype_array(uint16_t *ptype)
val |= RTE_PTYPE_L3_IPV6_EXT;
break;
case NPC_LT_LC_PTP:
+   val = (val & ~RTE_PTYPE_L2_MASK);
val |= RTE_PTYPE_L2_ETHER_TIMESYNC;
break;
}
-- 
2.34.1

[PATCH] test/crypto-perf: extend asymmetric crypto throughput test

[kirankumark]

From: Kiran Kumar K 

Extended support for asymmetric crypto perf throughput test.
Added support for new modulus lengths.
Added new parameter --modex-len.
Supported lengths are 60, 128, 255, 448. Default length is 128.

Signed-off-by: Kiran Kumar K 
---
 app/test-crypto-perf/cperf_ops.c |  18 +-
 app/test-crypto-perf/cperf_options.h |   3 +
 app/test-crypto-perf/cperf_options_parsing.c |  42 +++
 app/test-crypto-perf/cperf_test_vectors.c| 264 ---
 app/test-crypto-perf/cperf_test_vectors.h|  25 +-
 app/test-crypto-perf/main.c  |   2 +-
 6 files changed, 307 insertions(+), 47 deletions(-)

diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 8baee12e45..7bb7a2611d 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -14,7 +14,7 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
   uint32_t src_buf_offset __rte_unused,
   uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
   struct rte_cryptodev_sym_session *sess,
-  const struct cperf_options *options __rte_unused,
+  const struct cperf_options *options,
   const struct cperf_test_vector *test_vector __rte_unused,
   uint16_t iv_offset __rte_unused,
   uint32_t *imix_idx __rte_unused,
@@ -27,10 +27,10 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
struct rte_crypto_asym_op *asym_op = ops[i]->asym;
 
ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
-   asym_op->modex.base.data = perf_base;
-   asym_op->modex.base.length = sizeof(perf_base);
-   asym_op->modex.result.data = perf_mod_result;
-   asym_op->modex.result.length = sizeof(perf_mod_result);
+   asym_op->modex.base.data = options->modex_data->base.data;
+   asym_op->modex.base.length = options->modex_data->base.len;
+   asym_op->modex.result.data = options->modex_data->result.data;
+   asym_op->modex.result.length = options->modex_data->result.len;
rte_crypto_op_attach_asym_session(ops[i], asym_sess);
}
return 0;
@@ -787,10 +787,10 @@ cperf_create_session(struct rte_mempool *sess_mp,
if (options->op_type == CPERF_ASYM_MODEX) {
xform.next = NULL;
xform.xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX;
-   xform.modex.modulus.data = perf_mod_p;
-   xform.modex.modulus.length = sizeof(perf_mod_p);
-   xform.modex.exponent.data = perf_mod_e;
-   xform.modex.exponent.length = sizeof(perf_mod_e);
+   xform.modex.modulus.data = options->modex_data->modulus.data;
+   xform.modex.modulus.length = options->modex_data->modulus.len;
+   xform.modex.exponent.data = options->modex_data->exponent.data;
+   xform.modex.exponent.length = options->modex_data->exponent.len;
 
ret = rte_cryptodev_asym_session_create(dev_id, &xform,
sess_mp, &asym_sess);
diff --git a/app/test-crypto-perf/cperf_options.h 
b/app/test-crypto-perf/cperf_options.h
index 031b238b20..09caefde22 100644
--- a/app/test-crypto-perf/cperf_options.h
+++ b/app/test-crypto-perf/cperf_options.h
@@ -12,6 +12,7 @@
 #endif
 
 #define CPERF_PTEST_TYPE   ("ptest")
+#define CPERF_MODEX_LEN("modex-len")
 #define CPERF_SILENT   ("silent")
 
 #define CPERF_POOL_SIZE("pool-sz")
@@ -153,6 +154,8 @@ struct cperf_options {
uint32_t pmdcc_delay;
uint32_t imix_distribution_list[MAX_LIST];
uint8_t imix_distribution_count;
+   struct cperf_modex_test_data *modex_data;
+   uint16_t modex_len;
 };
 
 void
diff --git a/app/test-crypto-perf/cperf_options_parsing.c 
b/app/test-crypto-perf/cperf_options_parsing.c
index 59a9dc596a..09c98121c8 100644
--- a/app/test-crypto-perf/cperf_options_parsing.c
+++ b/app/test-crypto-perf/cperf_options_parsing.c
@@ -10,6 +10,7 @@
 #include 
 
 #include "cperf_options.h"
+#include "cperf_test_vectors.h"
 
 #define AES_BLOCK_SIZE 16
 #define DES_BLOCK_SIZE 8
@@ -57,6 +58,8 @@ usage(char *progname)
" --pmd-cyclecount-delay-ms N: set delay between enqueue\n"
"   and dequeue in pmd-cyclecount benchmarking mode\n"
" --csv-friendly: enable test result output CSV friendly\n"
+   " --modex-len N: modex length, supported lengths are "
+   "60, 128, 255, 448. Default: 128\n"
 #ifdef RTE_LIB_SECURITY
" --pdcp-sn-sz N: set PDCP SN size N <5/7/12/15/18>\n"
" --pdcp-domain DOMAIN: set PDCP domain \n"
@@ -313,6 +316,16 @@ parse_pool_sz(struct cperf_options *opts, const char *arg)
return ret;
 }
 
+static int
+parse_modex_len(struct cperf_options *opts, const char *arg)
+{
+

[dpdk-dev][PATCH 1/3] common/cnxk: add ROC support to parse cnxk custom sa action

[kirankumark]

From: Kiran Kumar K 

Adding ROC Flow changes to parse custom SA action for cnxk device.
When custom sa action is enabled, VTAG actions are not allowed.
And custom SA index will be calculated based on SA_HI and SA_LO
values. This allows the potential for a MCAM entry to match
many SAs, rather than only match a single SA.

Signed-off-by: Kiran Kumar K 
---
 drivers/common/cnxk/roc_nix.h |  1 +
 drivers/common/cnxk/roc_nix_inl.c | 13 ---
 drivers/common/cnxk/roc_npc.c | 58 +++
 drivers/common/cnxk/roc_npc.h | 19 ++
 4 files changed, 86 insertions(+), 5 deletions(-)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index dbb816d961..7313cc4d36 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -405,6 +405,7 @@ struct roc_nix {
bool io_enabled;
bool rx_ptp_ena;
uint16_t cints;
+   bool custom_sa_action;
 
 #define ROC_NIX_MEM_SZ (6 * 1024)
uint8_t reserved[ROC_NIX_MEM_SZ] __plt_cache_aligned;
diff --git a/drivers/common/cnxk/roc_nix_inl.c 
b/drivers/common/cnxk/roc_nix_inl.c
index 826c6e99c1..e14f8a1f32 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -217,6 +217,14 @@ roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix, bool 
inb_inl_dev, uint32_t spi)
if (!sa_base)
return 0;
 
+   /* Get SA size */
+   sz = roc_nix_inl_inb_sa_sz(roc_nix, inb_inl_dev);
+   if (!sz)
+   return 0;
+
+   if (roc_nix->custom_sa_action)
+   return (sa_base + (spi * sz));
+
/* Check if SPI is in range */
mask = roc_nix_inl_inb_spi_range(roc_nix, inb_inl_dev, &min_spi,
 &max_spi);
@@ -224,11 +232,6 @@ roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix, bool 
inb_inl_dev, uint32_t spi)
plt_warn("Inbound SA SPI %u not in range (%u..%u)", spi,
 min_spi, max_spi);
 
-   /* Get SA size */
-   sz = roc_nix_inl_inb_sa_sz(roc_nix, inb_inl_dev);
-   if (!sz)
-   return 0;
-
/* Basic logic of SPI->SA for now */
return (sa_base + ((spi & mask) * sz));
 }
diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c
index fc88fd58bc..784f63d92a 100644
--- a/drivers/common/cnxk/roc_npc.c
+++ b/drivers/common/cnxk/roc_npc.c
@@ -293,6 +293,48 @@ roc_npc_validate_portid_action(struct roc_npc *roc_npc_src,
return 0;
 }
 
+static int
+npc_parse_msns_action(struct roc_npc *roc_npc, const struct roc_npc_action 
*act,
+ struct roc_npc_flow *flow, uint8_t *has_msns_action)
+{
+   const struct roc_npc_sec_action *sec_action;
+   union {
+   uint64_t reg;
+   union nix_rx_vtag_action_u act;
+   } vtag_act;
+
+   if (roc_npc->roc_nix->custom_sa_action == 0 ||
+   roc_model_is_cn9k() == 1 || act->conf == NULL)
+   return 0;
+
+   *has_msns_action = true;
+   sec_action = act->conf;
+
+   vtag_act.reg = 0;
+   vtag_act.act.sa_xor = sec_action->sa_xor;
+   vtag_act.act.sa_hi = sec_action->sa_hi;
+   vtag_act.act.sa_lo = sec_action->sa_lo;
+
+   switch (sec_action->alg) {
+   case ROC_NPC_SEC_ACTION_ALG0:
+   break;
+   case ROC_NPC_SEC_ACTION_ALG1:
+   vtag_act.act.vtag1_valid = false;
+   vtag_act.act.vtag1_lid = ROC_NPC_SEC_ACTION_ALG1;
+   break;
+   case ROC_NPC_SEC_ACTION_ALG2:
+   vtag_act.act.vtag1_valid = false;
+   vtag_act.act.vtag1_lid = ROC_NPC_SEC_ACTION_ALG2;
+   break;
+   default:
+   return -1;
+   }
+
+   flow->vtag_action = vtag_act.reg;
+
+   return 0;
+}
+
 static int
 npc_parse_actions(struct roc_npc *roc_npc, const struct roc_npc_attr *attr,
  const struct roc_npc_action actions[],
@@ -305,11 +347,13 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct 
roc_npc_attr *attr,
const struct roc_npc_action_queue *act_q;
const struct roc_npc_action_vf *vf_act;
bool vlan_insert_action = false;
+   uint8_t has_msns_act = 0;
int sel_act, req_act = 0;
uint16_t pf_func, vf_id;
int errcode = 0;
int mark = 0;
int rq = 0;
+   int rc = 0;
 
/* Initialize actions */
flow->ctr_id = NPC_COUNTER_NONE;
@@ -399,6 +443,12 @@ npc_parse_actions(struct roc_npc *roc_npc, const struct 
roc_npc_attr *attr,
rq = 0;
pf_func = nix_inl_dev_pffunc_get();
}
+   rc = npc_parse_msns_action(roc_npc, actions, flow,
+  &has_msns_act);
+   if (rc) {
+   errcode = NPC_ERR_ACTION_NOTSUP;
+   goto err_exit;
+   

[dpdk-dev][PATCH 2/3] net/cnxk: add devargs support to parse custom SA action

[kirankumark]

From: Kiran Kumar K 

Adding devargs support to parse custom sa action.
Devargs can be specified in the following way.
-a 0002:02:00.0,custom_sa_act=1

Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/cnxk.rst   | 20 
 drivers/net/cnxk/cnxk_ethdev_devargs.c | 10 --
 2 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst
index 31c801fa04..e5087343ed 100644
--- a/doc/guides/nics/cnxk.rst
+++ b/doc/guides/nics/cnxk.rst
@@ -251,6 +251,26 @@ Runtime Config Options
With the above configuration, application can enable inline IPsec processing
for 128 outbound SAs.
 
+- ``Enable custom SA action`` (default ``0``)
+
+   Custom SA action can be enabled by specifying ``custom_sa_act`` ``devargs`` 
parameter.
+
+   For example::
+
+  -a 0002:02:00.0,custom_sa_act=1
+
+   With the above configuration, application can enable custom SA action. This
+   configuration allows the potential for a MCAM entry to match many SAs,
+   rather than only match a single SA.
+   For cnxk device sa_index will be calculated based on SPI value. So, it will
+   be 1 to 1 mapping. By enabling this devargs and setting a MCAM rule, will
+   allow application to configure the sa_index as part of session create. And
+   later original SPI value can be updated using session update.
+   For example, application can set sa_index as 0 using session create as SPI 
value
+   and later can update the original SPI value (for example 0x1001) using
+   session update. And create a flow rule with security action and algorithm as
+   RTE_PMD_CNXK_SEC_ACTION_ALG0 and sa_hi as 0x1000 and sa_lo as 0x0001.
+
 - ``Outbound CPT LF queue size`` (default ``8200``)
 
Size of Outbound CPT LF queue in number of descriptors can be specified by
diff --git a/drivers/net/cnxk/cnxk_ethdev_devargs.c 
b/drivers/net/cnxk/cnxk_ethdev_devargs.c
index 9b2beb6743..248582e1f6 100644
--- a/drivers/net/cnxk/cnxk_ethdev_devargs.c
+++ b/drivers/net/cnxk/cnxk_ethdev_devargs.c
@@ -245,6 +245,7 @@ parse_sdp_channel_mask(const char *key, const char *value, 
void *extra_args)
 #define CNXK_OUTB_NB_CRYPTO_QS "outb_nb_crypto_qs"
 #define CNXK_SDP_CHANNEL_MASK  "sdp_channel_mask"
 #define CNXK_FLOW_PRE_L2_INFO  "flow_pre_l2_info"
+#define CNXK_CUSTOM_SA_ACT "custom_sa_act"
 
 int
 cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev 
*dev)
@@ -263,9 +264,10 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, 
struct cnxk_eth_dev *dev)
struct sdp_channel sdp_chan;
uint16_t rss_tag_as_xor = 0;
uint16_t scalar_enable = 0;
-   uint8_t lock_rx_ctx = 0;
+   uint16_t custom_sa_act = 0;
struct rte_kvargs *kvlist;
uint16_t no_inl_dev = 0;
+   uint8_t lock_rx_ctx = 0;
 
memset(&sdp_chan, 0, sizeof(sdp_chan));
memset(&pre_l2_info, 0, sizeof(struct flow_pre_l2_size_info));
@@ -307,6 +309,8 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, 
struct cnxk_eth_dev *dev)
   &parse_sdp_channel_mask, &sdp_chan);
rte_kvargs_process(kvlist, CNXK_FLOW_PRE_L2_INFO,
   &parse_pre_l2_hdr_info, &pre_l2_info);
+   rte_kvargs_process(kvlist, CNXK_CUSTOM_SA_ACT, &parse_flag,
+  &custom_sa_act);
rte_kvargs_free(kvlist);
 
 null_devargs:
@@ -323,6 +327,7 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, 
struct cnxk_eth_dev *dev)
dev->nix.max_sqb_count = sqb_count;
dev->nix.reta_sz = reta_sz;
dev->nix.lock_rx_ctx = lock_rx_ctx;
+   dev->nix.custom_sa_action = custom_sa_act;
dev->npc.flow_prealloc_size = flow_prealloc_size;
dev->npc.flow_max_priority = flow_max_priority;
dev->npc.switch_header_type = switch_header_type;
@@ -350,4 +355,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_cnxk,
  CNXK_FLOW_PRE_L2_INFO "=<0-255>/<1-255>/<0-1>"
  CNXK_OUTB_NB_CRYPTO_QS "=<1-64>"
  CNXK_NO_INL_DEV "=0"
- CNXK_SDP_CHANNEL_MASK "=<1-4095>/<1-4095>");
+ CNXK_SDP_CHANNEL_MASK "=<1-4095>/<1-4095>"
+ CNXK_CUSTOM_SA_ACT "=1");
-- 
2.25.1

[dpdk-dev][PATCH 3/3] net/cnxk: adding cnxk support to configure custom sa index

[kirankumark]

From: Kiran Kumar K 

Adding cnxk device driver support to configure custom sa index.
Custom sa index can be configured as part of the session create
as SPI, and later original SPI can be updated using session update.

Signed-off-by: Kiran Kumar K 
---
 doc/api/doxy-api-index.md   |   3 +-
 doc/api/doxy-api.conf.in|   1 +
 drivers/net/cnxk/cn10k_ethdev_sec.c | 107 +++-
 drivers/net/cnxk/cn9k_ethdev.c  |   6 ++
 drivers/net/cnxk/cn9k_ethdev_sec.c  |   2 +-
 drivers/net/cnxk/cnxk_ethdev.h  |   3 +-
 drivers/net/cnxk/cnxk_ethdev_sec.c  |  30 +---
 drivers/net/cnxk/cnxk_flow.c|   1 +
 drivers/net/cnxk/meson.build|   2 +
 drivers/net/cnxk/rte_pmd_cnxk.h |  94 
 drivers/net/cnxk/version.map|   6 ++
 11 files changed, 240 insertions(+), 15 deletions(-)
 create mode 100644 drivers/net/cnxk/rte_pmd_cnxk.h

diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md
index 4245b9635c..8f9564ee84 100644
--- a/doc/api/doxy-api-index.md
+++ b/doc/api/doxy-api-index.md
@@ -56,7 +56,8 @@ The public API headers are grouped by topics:
   [dpaa2_qdma] (@ref rte_pmd_dpaa2_qdma.h),
   [crypto_scheduler]   (@ref rte_cryptodev_scheduler.h),
   [dlb2]   (@ref rte_pmd_dlb2.h),
-  [ifpga]  (@ref rte_pmd_ifpga.h)
+  [ifpga]  (@ref rte_pmd_ifpga.h),
+  [cnxk]   (@ref rte_pmd_cnxk.h)
 
 - **memory**:
   [memseg] (@ref rte_memory.h),
diff --git a/doc/api/doxy-api.conf.in b/doc/api/doxy-api.conf.in
index db2ca9b6ed..b49942412d 100644
--- a/doc/api/doxy-api.conf.in
+++ b/doc/api/doxy-api.conf.in
@@ -12,6 +12,7 @@ INPUT   = @TOPDIR@/doc/api/doxy-api-index.md \
   @TOPDIR@/drivers/net/ark \
   @TOPDIR@/drivers/net/bnxt \
   @TOPDIR@/drivers/net/bonding \
+  @TOPDIR@/drivers/net/cnxk \
   @TOPDIR@/drivers/net/dpaa \
   @TOPDIR@/drivers/net/dpaa2 \
   @TOPDIR@/drivers/net/i40e \
diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c 
b/drivers/net/cnxk/cn10k_ethdev_sec.c
index 87bb691ab4..60ae5d7d99 100644
--- a/drivers/net/cnxk/cn10k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -502,7 +503,7 @@ cn10k_eth_sec_session_create(void *device,
  ROC_NIX_INL_OT_IPSEC_OUTB_SW_RSVD);
 
/* Alloc an sa index */
-   rc = cnxk_eth_outb_sa_idx_get(dev, &sa_idx);
+   rc = cnxk_eth_outb_sa_idx_get(dev, &sa_idx, ipsec->spi);
if (rc)
goto mempool_put;
 
@@ -657,6 +658,109 @@ cn10k_eth_sec_capabilities_get(void *device __rte_unused)
return cn10k_eth_sec_capabilities;
 }
 
+static int
+cn10k_eth_sec_session_update(void *device, struct rte_security_session *sess,
+struct rte_security_session_conf *conf)
+{
+   struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)device;
+   struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+   struct roc_ot_ipsec_inb_sa *inb_sa_dptr;
+   struct rte_security_ipsec_xform *ipsec;
+   struct rte_crypto_sym_xform *crypto;
+   struct cnxk_eth_sec_sess *eth_sec;
+   bool inbound;
+   int rc;
+
+   if (conf->action_type != RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL ||
+   conf->protocol != RTE_SECURITY_PROTOCOL_IPSEC)
+   return -ENOENT;
+
+   ipsec = &conf->ipsec;
+   crypto = conf->crypto_xform;
+   inbound = !!(ipsec->direction == RTE_SECURITY_IPSEC_SA_DIR_INGRESS);
+
+   eth_sec = cnxk_eth_sec_sess_get_by_sess(dev, sess);
+   if (!eth_sec)
+   return -ENOENT;
+
+   eth_sec->spi = conf->ipsec.spi;
+
+   if (inbound) {
+   inb_sa_dptr = (struct roc_ot_ipsec_inb_sa *)dev->inb.sa_dptr;
+   memset(inb_sa_dptr, 0, sizeof(struct roc_ot_ipsec_inb_sa));
+
+   rc = cnxk_ot_ipsec_inb_sa_fill(inb_sa_dptr, ipsec, crypto,
+  true);
+   if (rc)
+   return -EINVAL;
+
+   rc = roc_nix_inl_ctx_write(&dev->nix, inb_sa_dptr, eth_sec->sa,
+  eth_sec->inb,
+  sizeof(struct roc_ot_ipsec_inb_sa));
+   if (rc)
+   return -EINVAL;
+   } else {
+   struct roc_ot_ipsec_outb_sa *outb_sa_dptr;
+
+   outb_sa_dptr = (struct roc_ot_ipsec_outb_sa *)dev->outb.sa_dptr;
+   memset(outb_sa_dptr, 0, sizeof(struct roc_ot_ipsec_outb_sa));
+
+   rc = cnxk_ot_ipsec_outb_sa_fill(outb_sa_dptr, ipsec, crypto);
+   if (rc)
+   return -EINVAL;
+   rc = roc_nix_inl

[dpdk-dev][PATCH] test/crypto-perf: extend asymmetric crypto throughput test

[kirankumark]

From: Kiran Kumar K 

Extended support for asymmetric crypto perf throughput test.
Added support for new modulus lengths.
Added new parameter --modex-len.
Supported lengths are 60, 128, 255, 448. Default length is 128.

Signed-off-by: Kiran Kumar K 
---
 app/test-crypto-perf/cperf_ops.c |  18 +-
 app/test-crypto-perf/cperf_options.h |   3 +
 app/test-crypto-perf/cperf_options_parsing.c |  42 +++
 app/test-crypto-perf/cperf_test_vectors.c| 264 ---
 app/test-crypto-perf/cperf_test_vectors.h|  25 +-
 app/test-crypto-perf/main.c  |   2 +-
 doc/guides/tools/cryptoperf.rst  |   5 +
 7 files changed, 312 insertions(+), 47 deletions(-)

diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 8baee12e45..7bb7a2611d 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -14,7 +14,7 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
   uint32_t src_buf_offset __rte_unused,
   uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
   struct rte_cryptodev_sym_session *sess,
-  const struct cperf_options *options __rte_unused,
+  const struct cperf_options *options,
   const struct cperf_test_vector *test_vector __rte_unused,
   uint16_t iv_offset __rte_unused,
   uint32_t *imix_idx __rte_unused,
@@ -27,10 +27,10 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
struct rte_crypto_asym_op *asym_op = ops[i]->asym;
 
ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
-   asym_op->modex.base.data = perf_base;
-   asym_op->modex.base.length = sizeof(perf_base);
-   asym_op->modex.result.data = perf_mod_result;
-   asym_op->modex.result.length = sizeof(perf_mod_result);
+   asym_op->modex.base.data = options->modex_data->base.data;
+   asym_op->modex.base.length = options->modex_data->base.len;
+   asym_op->modex.result.data = options->modex_data->result.data;
+   asym_op->modex.result.length = options->modex_data->result.len;
rte_crypto_op_attach_asym_session(ops[i], asym_sess);
}
return 0;
@@ -787,10 +787,10 @@ cperf_create_session(struct rte_mempool *sess_mp,
if (options->op_type == CPERF_ASYM_MODEX) {
xform.next = NULL;
xform.xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX;
-   xform.modex.modulus.data = perf_mod_p;
-   xform.modex.modulus.length = sizeof(perf_mod_p);
-   xform.modex.exponent.data = perf_mod_e;
-   xform.modex.exponent.length = sizeof(perf_mod_e);
+   xform.modex.modulus.data = options->modex_data->modulus.data;
+   xform.modex.modulus.length = options->modex_data->modulus.len;
+   xform.modex.exponent.data = options->modex_data->exponent.data;
+   xform.modex.exponent.length = options->modex_data->exponent.len;
 
ret = rte_cryptodev_asym_session_create(dev_id, &xform,
sess_mp, &asym_sess);
diff --git a/app/test-crypto-perf/cperf_options.h 
b/app/test-crypto-perf/cperf_options.h
index 031b238b20..09caefde22 100644
--- a/app/test-crypto-perf/cperf_options.h
+++ b/app/test-crypto-perf/cperf_options.h
@@ -12,6 +12,7 @@
 #endif
 
 #define CPERF_PTEST_TYPE   ("ptest")
+#define CPERF_MODEX_LEN("modex-len")
 #define CPERF_SILENT   ("silent")
 
 #define CPERF_POOL_SIZE("pool-sz")
@@ -153,6 +154,8 @@ struct cperf_options {
uint32_t pmdcc_delay;
uint32_t imix_distribution_list[MAX_LIST];
uint8_t imix_distribution_count;
+   struct cperf_modex_test_data *modex_data;
+   uint16_t modex_len;
 };
 
 void
diff --git a/app/test-crypto-perf/cperf_options_parsing.c 
b/app/test-crypto-perf/cperf_options_parsing.c
index 59a9dc596a..09c98121c8 100644
--- a/app/test-crypto-perf/cperf_options_parsing.c
+++ b/app/test-crypto-perf/cperf_options_parsing.c
@@ -10,6 +10,7 @@
 #include 
 
 #include "cperf_options.h"
+#include "cperf_test_vectors.h"
 
 #define AES_BLOCK_SIZE 16
 #define DES_BLOCK_SIZE 8
@@ -57,6 +58,8 @@ usage(char *progname)
" --pmd-cyclecount-delay-ms N: set delay between enqueue\n"
"   and dequeue in pmd-cyclecount benchmarking mode\n"
" --csv-friendly: enable test result output CSV friendly\n"
+   " --modex-len N: modex length, supported lengths are "
+   "60, 128, 255, 448. Default: 128\n"
 #ifdef RTE_LIB_SECURITY
" --pdcp-sn-sz N: set PDCP SN size N <5/7/12/15/18>\n"
" --pdcp-domain DOMAIN: set PDCP domain \n"
@@ -313,6 +316,16 @@ parse_pool_sz(struct cperf_options *opts, const char *arg)
return ret;
 }
 
+static int
+parse_modex

[dpdk-dev] [PATCH] net/octeontx2: add check for PTP and HIGIG2

[kirankumark]

From: Kiran Kumar K 

For octeontx2 we won't support both PTP and HIGIG2 together.
Added a check to verify this.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_ethdev.c | 9 -
 drivers/net/octeontx2/otx2_ptp.c| 5 +
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index ed329273d..b4c68191d 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev)
 {
uint64_t capa = NIX_RX_OFFLOAD_CAPA;
 
-   if (otx2_dev_is_vf(dev))
+   if (otx2_dev_is_vf(dev) ||
+   dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG)
capa &= ~DEV_RX_OFFLOAD_TIMESTAMP;
 
return capa;
@@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto fail_offloads;
}
 
+   if (dev->ptp_en &&
+   dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+   otx2_err(" Both PTP and switch header enabled");
+   goto free_nix_lf;
+   }
+
rc = nix_lf_switch_header_type_enable(dev);
if (rc) {
otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
index f34b9339c..74cb007a0 100644
--- a/drivers/net/octeontx2/otx2_ptp.c
+++ b/drivers/net/octeontx2/otx2_ptp.c
@@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
return -EINVAL;
}
 
+   if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+   otx2_err("PTP mode not supported in HIGIG mode");
+   return -EINVAL;
+   }
+
/* Allocating a iova address for tx tstamp */
const struct rte_memzone *ts;
ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",
-- 
2.17.1

[dpdk-dev] [PATCH v2] net/octeontx2: add check for PTP and HIGIG2

[kirankumark]

From: Kiran Kumar K 

For octeontx2 we won't support both PTP and HIGIG2 together.
Added a check to verify this.

Signed-off-by: Kiran Kumar K 
---
V2 Changes:
*Changed error message

 drivers/net/octeontx2/otx2_ethdev.c | 9 -
 drivers/net/octeontx2/otx2_ptp.c| 5 +
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index ed329273d..2e91a5ab7 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev)
 {
uint64_t capa = NIX_RX_OFFLOAD_CAPA;

-   if (otx2_dev_is_vf(dev))
+   if (otx2_dev_is_vf(dev) ||
+   dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG)
capa &= ~DEV_RX_OFFLOAD_TIMESTAMP;

return capa;
@@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto fail_offloads;
}

+   if (dev->ptp_en &&
+   dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+   otx2_err("Both PTP and switch header enabled");
+   goto free_nix_lf;
+   }
+
rc = nix_lf_switch_header_type_enable(dev);
if (rc) {
otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
index f34b9339c..ae5a2b7cd 100644
--- a/drivers/net/octeontx2/otx2_ptp.c
+++ b/drivers/net/octeontx2/otx2_ptp.c
@@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
return -EINVAL;
}

+   if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+   otx2_err("Both PTP and switch header enabled");
+   return -EINVAL;
+   }
+
/* Allocating a iova address for tx tstamp */
const struct rte_memzone *ts;
ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",
--
2.17.1

[dpdk-dev] [PATCH v3] net/octeontx2: fix PTP and HIGIG2 coexistence

[kirankumark]

From: Kiran Kumar K 

octeontx2 PMD does not support both PTP and HIGIG2 together.
added a check to enforce this and updated the Rx offload capabilities when
Higig2 mode enabled

fixes: 602009ee2dfb (net/octeontx2: support HIGIG2)

Signed-off-by: Kiran Kumar K 
---
V3 Changes:
* Fixed commit log

V2 Chanhes:
* Fixed error message

 drivers/net/octeontx2/otx2_ethdev.c | 9 -
 drivers/net/octeontx2/otx2_ptp.c| 5 +
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index ed329273d..2e91a5ab7 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev)
 {
uint64_t capa = NIX_RX_OFFLOAD_CAPA;

-   if (otx2_dev_is_vf(dev))
+   if (otx2_dev_is_vf(dev) ||
+   dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG)
capa &= ~DEV_RX_OFFLOAD_TIMESTAMP;

return capa;
@@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto fail_offloads;
}

+   if (dev->ptp_en &&
+   dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+   otx2_err("Both PTP and switch header enabled");
+   goto free_nix_lf;
+   }
+
rc = nix_lf_switch_header_type_enable(dev);
if (rc) {
otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
index f34b9339c..ae5a2b7cd 100644
--- a/drivers/net/octeontx2/otx2_ptp.c
+++ b/drivers/net/octeontx2/otx2_ptp.c
@@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
return -EINVAL;
}

+   if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+   otx2_err("Both PTP and switch header enabled");
+   return -EINVAL;
+   }
+
/* Allocating a iova address for tx tstamp */
const struct rte_memzone *ts;
ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",
--
2.17.1

[dpdk-dev] [PATCH] net/octeontx2: extend RSS supported offload types

[kirankumark]

From: Kiran Kumar K 

Extend RSS offload types for octeontx2. Add support to select
L3 SRC, L3 DST, L4 SRC and L4 DST for RSS calculation.

Add support to select L3 SRC or DST only, L4 SRC or DST only for RSS
calculation.

With this requirement there will be following combinations,
IPV[4,6]_SRC_ONLY, IPV[4,6]_DST_ONLY, [TCP,UDP,SCTP]_SRC_ONLY,
[TCP,UDP,SCTP]_DST_ONLY. So, instead of creating a bit for each
combination, we are using upper 4 bits (31:28) in the flow_key_cfg
to represent the SRC, DST selection. 31 => L3_SRC, 30 => L3_DST,
29 => L4_SRC, 28 => L4_DST. These won't be part of flow_cfg, so that
we don't need to change the existing ABI.

Signed-off-by: Kiran Kumar K 
---
 drivers/common/octeontx2/otx2_mbox.h |  6 +-
 drivers/net/octeontx2/otx2_rss.c | 12 
 2 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/common/octeontx2/otx2_mbox.h 
b/drivers/common/octeontx2/otx2_mbox.h
index e0e4e2f63..4972b8a6e 100644
--- a/drivers/common/octeontx2/otx2_mbox.h
+++ b/drivers/common/octeontx2/otx2_mbox.h
@@ -918,7 +918,11 @@ struct nix_rss_flowkey_cfg {
 #define FLOW_KEY_TYPE_INNR_UDP  BIT(15)
 #define FLOW_KEY_TYPE_INNR_SCTP BIT(16)
 #define FLOW_KEY_TYPE_INNR_ETH_DMAC BIT(17)
-   uint8_t group;   /* RSS context or group */
+#define FLOW_KEY_TYPE_L4_DST BIT(28)
+#define FLOW_KEY_TYPE_L4_SRC BIT(29)
+#define FLOW_KEY_TYPE_L3_DST BIT(30)
+#define FLOW_KEY_TYPE_L3_SRC BIT(31)
+   uint8_t __otx2_io group;   /* RSS context or group */
 };
 
 struct nix_rss_flowkey_cfg_rsp {
diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c
index bc7b64387..7a8c8f3de 100644
--- a/drivers/net/octeontx2/otx2_rss.c
+++ b/drivers/net/octeontx2/otx2_rss.c
@@ -210,6 +210,18 @@ otx2_rss_ethdev_to_nix(struct otx2_eth_dev *dev, uint64_t 
ethdev_rss,
 
dev->rss_info.nix_rss = ethdev_rss;
 
+   if (ethdev_rss & ETH_RSS_L3_SRC_ONLY)
+   flowkey_cfg |= FLOW_KEY_TYPE_L3_SRC;
+
+   if (ethdev_rss & ETH_RSS_L3_DST_ONLY)
+   flowkey_cfg |= FLOW_KEY_TYPE_L3_DST;
+
+   if (ethdev_rss & ETH_RSS_L4_SRC_ONLY)
+   flowkey_cfg |= FLOW_KEY_TYPE_L4_SRC;
+
+   if (ethdev_rss & ETH_RSS_L4_DST_ONLY)
+   flowkey_cfg |= FLOW_KEY_TYPE_L4_DST;
+
if (ethdev_rss & RSS_IPV4_ENABLE)
flowkey_cfg |= flow_key_type[rss_level][RSS_IPV4_INDEX];
 
-- 
2.17.1

[dpdk-dev] [PATCH v2] net/octeontx2: extend RSS supported offload types

[kirankumark]

From: Kiran Kumar K 

Extend RSS offload types for octeontx2. Add support to select
L3 SRC, L3 DST, L4 SRC and L4 DST for RSS calculation.

Add support to select L3 SRC or DST only, L4 SRC or DST only for RSS
calculation.

With this requirement there will be following combinations,
IPV[4,6]_SRC_ONLY, IPV[4,6]_DST_ONLY, [TCP,UDP,SCTP]_SRC_ONLY,
[TCP,UDP,SCTP]_DST_ONLY. So, instead of creating a bit for each
combination, we are using upper 4 bits (31:28) in the flow_key_cfg
to represent the SRC, DST selection. 31 => L3_SRC, 30 => L3_DST,
29 => L4_SRC, 28 => L4_DST. These won't be part of flow_cfg, so that
we don't need to change the existing ABI.

Signed-off-by: Kiran Kumar K 
---
V2 Changes:
* Updated supported offloads

 drivers/common/octeontx2/otx2_mbox.h |  6 +-
 drivers/net/octeontx2/otx2_ethdev.h  |  6 +-
 drivers/net/octeontx2/otx2_rss.c | 12 
 3 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/drivers/common/octeontx2/otx2_mbox.h 
b/drivers/common/octeontx2/otx2_mbox.h
index e0e4e2f63..4972b8a6e 100644
--- a/drivers/common/octeontx2/otx2_mbox.h
+++ b/drivers/common/octeontx2/otx2_mbox.h
@@ -918,7 +918,11 @@ struct nix_rss_flowkey_cfg {
 #define FLOW_KEY_TYPE_INNR_UDP  BIT(15)
 #define FLOW_KEY_TYPE_INNR_SCTP BIT(16)
 #define FLOW_KEY_TYPE_INNR_ETH_DMAC BIT(17)
-   uint8_t group;   /* RSS context or group */
+#define FLOW_KEY_TYPE_L4_DST BIT(28)
+#define FLOW_KEY_TYPE_L4_SRC BIT(29)
+#define FLOW_KEY_TYPE_L3_DST BIT(30)
+#define FLOW_KEY_TYPE_L3_SRC BIT(31)
+   uint8_t __otx2_io group;   /* RSS context or group */
 };

 struct nix_rss_flowkey_cfg_rsp {
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 3f3fdecc4..c075b8d1a 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -113,9 +113,13 @@
 #define CQ_TIMER_THRESH_DEFAULT0xAULL /* ~1usec i.e (0xA * 100nsec) */
 #define CQ_TIMER_THRESH_MAX 255

+#define NIX_RSS_L3_L4_SRC_DST  (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY \
+   | ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)
+
 #define NIX_RSS_OFFLOAD(ETH_RSS_PORT | ETH_RSS_IP | 
ETH_RSS_UDP |\
 ETH_RSS_TCP | ETH_RSS_SCTP | \
-ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD)
+ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD | \
+NIX_RSS_L3_L4_SRC_DST)

 #define NIX_TX_OFFLOAD_CAPA ( \
DEV_TX_OFFLOAD_MBUF_FAST_FREE   | \
diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c
index bc7b64387..7a8c8f3de 100644
--- a/drivers/net/octeontx2/otx2_rss.c
+++ b/drivers/net/octeontx2/otx2_rss.c
@@ -210,6 +210,18 @@ otx2_rss_ethdev_to_nix(struct otx2_eth_dev *dev, uint64_t 
ethdev_rss,

dev->rss_info.nix_rss = ethdev_rss;

+   if (ethdev_rss & ETH_RSS_L3_SRC_ONLY)
+   flowkey_cfg |= FLOW_KEY_TYPE_L3_SRC;
+
+   if (ethdev_rss & ETH_RSS_L3_DST_ONLY)
+   flowkey_cfg |= FLOW_KEY_TYPE_L3_DST;
+
+   if (ethdev_rss & ETH_RSS_L4_SRC_ONLY)
+   flowkey_cfg |= FLOW_KEY_TYPE_L4_SRC;
+
+   if (ethdev_rss & ETH_RSS_L4_DST_ONLY)
+   flowkey_cfg |= FLOW_KEY_TYPE_L4_DST;
+
if (ethdev_rss & RSS_IPV4_ENABLE)
flowkey_cfg |= flow_key_type[rss_level][RSS_IPV4_INDEX];

--
2.17.1

[dpdk-dev] [PATCH] net/octeontx2: disable HIGIG on port stop

[kirankumark]

From: Kiran Kumar K 

If HIGIG mode is enabled on configure, This needs to be disabled
on port stop. Adding support to send mbox message on port stop
to configure the port to default.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_ethdev.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 268b383db..11f8c786b 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -93,7 +93,7 @@ nix_lf_alloc(struct otx2_eth_dev *dev, uint32_t nb_rxq, 
uint32_t nb_txq)
 }
 
 static int
-nix_lf_switch_header_type_enable(struct otx2_eth_dev *dev)
+nix_lf_switch_header_type_enable(struct otx2_eth_dev *dev, bool enable)
 {
struct otx2_mbox *mbox = dev->mbox;
struct npc_set_pkind *req;
@@ -106,12 +106,16 @@ nix_lf_switch_header_type_enable(struct otx2_eth_dev *dev)
/* Notify AF about higig2 config */
req = otx2_mbox_alloc_msg_npc_set_pkind(mbox);
req->mode = dev->npc_flow.switch_header_type;
+   if (enable == 0)
+   req->mode = OTX2_PRIV_FLAGS_DEFAULT;
req->dir = PKIND_RX;
rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
if (rc)
return rc;
req = otx2_mbox_alloc_msg_npc_set_pkind(mbox);
req->mode = dev->npc_flow.switch_header_type;
+   if (enable == 0)
+   req->mode = OTX2_PRIV_FLAGS_DEFAULT;
req->dir = PKIND_TX;
return otx2_mbox_process_msg(mbox, (void *)&rsp);
 }
@@ -1648,7 +1652,7 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto free_nix_lf;
}
 
-   rc = nix_lf_switch_header_type_enable(dev);
+   rc = nix_lf_switch_header_type_enable(dev, true);
if (rc) {
otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
goto free_nix_lf;
@@ -1882,6 +1886,7 @@ otx2_nix_dev_stop(struct rte_eth_dev *eth_dev)
struct otx2_eth_rxq *rxq;
int count, i, j, rc;
 
+   nix_lf_switch_header_type_enable(dev, false);
nix_cgx_stop_link_event(dev);
npc_rx_disable(dev);
 
-- 
2.17.1

[dpdk-dev] [PATCH] test/graph: fix memory leak

[kirankumark]

From: Kiran Kumar K 

Fix memory leaks reported by coverity.

Signed-off-by: Kiran Kumar K 
---
 app/test/test_graph.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/app/test/test_graph.c b/app/test/test_graph.c
index cf6df0744..ed69eda99 100644
--- a/app/test/test_graph.c
+++ b/app/test/test_graph.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "test.h"
 
@@ -145,7 +146,7 @@ uint16_t
 test_node_worker_source(struct rte_graph *graph, struct rte_node *node,
void **objs, uint16_t nb_objs)
 {
-   uint32_t obj_node0 = rand() % 100, obj_node1;
+   uint32_t obj_node0 = rte_rand() % 100, obj_node1;
test_main_t *tm = &test_main;
struct rte_mbuf *data;
void **next_stream;
@@ -193,7 +194,7 @@ test_node0_worker(struct rte_graph *graph, struct rte_node 
*node, void **objs,
test_main_t *tm = &test_main;
 
if (*(uint32_t *)node->ctx == test_node0.id) {
-   uint32_t obj_node0 = rand() % 100, obj_node1;
+   uint32_t obj_node0 = rte_rand() % 100, obj_node1;
struct rte_mbuf *data;
uint8_t second_pass = 0;
uint32_t count = 0;
@@ -496,6 +497,7 @@ test_lookup_functions(void)
printf("Test number of edges for node = %s failed 
Expected = %d, got %d\n",
   tm->test_node[i].node.name,
   tm->test_node[i].node.nb_edges, count);
+   free(next_edges);
return -1;
}
 
@@ -505,6 +507,7 @@ test_lookup_functions(void)
printf("Edge name miss match, expected = %s got 
= %s\n",
   tm->test_node[i].node.next_nodes[j],
   next_edges[j]);
+   free(next_edges);
return -1;
}
}
-- 
2.17.1

[dpdk-dev] [PATCH v2] test/graph: fix memory leak

[kirankumark]

From: Kiran Kumar K 

Fix memory leaks reported by coverity.

Coverity issue: 358439, 358451, 358448.
Fixes: 6b89650418("test/graph: add functional tests")

Signed-off-by: Kiran Kumar K 
---
V2 changes:
* Added Coverity issue and Fixes info.

 app/test/test_graph.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/app/test/test_graph.c b/app/test/test_graph.c
index cf6df0744..ed69eda99 100644
--- a/app/test/test_graph.c
+++ b/app/test/test_graph.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 

 #include "test.h"

@@ -145,7 +146,7 @@ uint16_t
 test_node_worker_source(struct rte_graph *graph, struct rte_node *node,
void **objs, uint16_t nb_objs)
 {
-   uint32_t obj_node0 = rand() % 100, obj_node1;
+   uint32_t obj_node0 = rte_rand() % 100, obj_node1;
test_main_t *tm = &test_main;
struct rte_mbuf *data;
void **next_stream;
@@ -193,7 +194,7 @@ test_node0_worker(struct rte_graph *graph, struct rte_node 
*node, void **objs,
test_main_t *tm = &test_main;

if (*(uint32_t *)node->ctx == test_node0.id) {
-   uint32_t obj_node0 = rand() % 100, obj_node1;
+   uint32_t obj_node0 = rte_rand() % 100, obj_node1;
struct rte_mbuf *data;
uint8_t second_pass = 0;
uint32_t count = 0;
@@ -496,6 +497,7 @@ test_lookup_functions(void)
printf("Test number of edges for node = %s failed 
Expected = %d, got %d\n",
   tm->test_node[i].node.name,
   tm->test_node[i].node.nb_edges, count);
+   free(next_edges);
return -1;
}

@@ -505,6 +507,7 @@ test_lookup_functions(void)
printf("Edge name miss match, expected = %s got 
= %s\n",
   tm->test_node[i].node.next_nodes[j],
   next_edges[j]);
+   free(next_edges);
return -1;
}
}
--
2.17.1

[dpdk-dev] [PATCH v2] test/graph: fix memory leak

[kirankumark]

From: Kiran Kumar K 

Fix memory leaks reported by coverity.

Coverity issue: 358439, 358451, 358448.
Fixes: 6b89650418("test/graph: add functional tests")

Signed-off-by: Kiran Kumar K 
---
V2 changes:
* Added Coverity issue and Fixes info.

 app/test/test_graph.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/app/test/test_graph.c b/app/test/test_graph.c
index cf6df0744..ed69eda99 100644
--- a/app/test/test_graph.c
+++ b/app/test/test_graph.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 

 #include "test.h"

@@ -145,7 +146,7 @@ uint16_t
 test_node_worker_source(struct rte_graph *graph, struct rte_node *node,
void **objs, uint16_t nb_objs)
 {
-   uint32_t obj_node0 = rand() % 100, obj_node1;
+   uint32_t obj_node0 = rte_rand() % 100, obj_node1;
test_main_t *tm = &test_main;
struct rte_mbuf *data;
void **next_stream;
@@ -193,7 +194,7 @@ test_node0_worker(struct rte_graph *graph, struct rte_node 
*node, void **objs,
test_main_t *tm = &test_main;

if (*(uint32_t *)node->ctx == test_node0.id) {
-   uint32_t obj_node0 = rand() % 100, obj_node1;
+   uint32_t obj_node0 = rte_rand() % 100, obj_node1;
struct rte_mbuf *data;
uint8_t second_pass = 0;
uint32_t count = 0;
@@ -496,6 +497,7 @@ test_lookup_functions(void)
printf("Test number of edges for node = %s failed 
Expected = %d, got %d\n",
   tm->test_node[i].node.name,
   tm->test_node[i].node.nb_edges, count);
+   free(next_edges);
return -1;
}

@@ -505,6 +507,7 @@ test_lookup_functions(void)
printf("Edge name miss match, expected = %s got 
= %s\n",
   tm->test_node[i].node.next_nodes[j],
   next_edges[j]);
+   free(next_edges);
return -1;
}
}
--
2.17.1

[dpdk-dev] [PATCH v3] test/graph: fix coverity issues

[kirankumark]

From: Kiran Kumar K 

Fix memory leak and weak crypto issues reported by coverity.

Coverity issue: 358439, 358448, 358451
Fixes: 6b89650418("test/graph: add functional tests")

Signed-off-by: Kiran Kumar K 
---
 app/test/test_graph.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/app/test/test_graph.c b/app/test/test_graph.c
index cf6df0744..ed69eda99 100644
--- a/app/test/test_graph.c
+++ b/app/test/test_graph.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "test.h"
 
@@ -145,7 +146,7 @@ uint16_t
 test_node_worker_source(struct rte_graph *graph, struct rte_node *node,
void **objs, uint16_t nb_objs)
 {
-   uint32_t obj_node0 = rand() % 100, obj_node1;
+   uint32_t obj_node0 = rte_rand() % 100, obj_node1;
test_main_t *tm = &test_main;
struct rte_mbuf *data;
void **next_stream;
@@ -193,7 +194,7 @@ test_node0_worker(struct rte_graph *graph, struct rte_node 
*node, void **objs,
test_main_t *tm = &test_main;
 
if (*(uint32_t *)node->ctx == test_node0.id) {
-   uint32_t obj_node0 = rand() % 100, obj_node1;
+   uint32_t obj_node0 = rte_rand() % 100, obj_node1;
struct rte_mbuf *data;
uint8_t second_pass = 0;
uint32_t count = 0;
@@ -496,6 +497,7 @@ test_lookup_functions(void)
printf("Test number of edges for node = %s failed 
Expected = %d, got %d\n",
   tm->test_node[i].node.name,
   tm->test_node[i].node.nb_edges, count);
+   free(next_edges);
return -1;
}
 
@@ -505,6 +507,7 @@ test_lookup_functions(void)
printf("Edge name miss match, expected = %s got 
= %s\n",
   tm->test_node[i].node.next_nodes[j],
   next_edges[j]);
+   free(next_edges);
return -1;
}
}
-- 
2.17.1

[dpdk-dev] [PATCH v4] test/graph: fix coverity issues

[kirankumark]

From: Kiran Kumar K 

Fix memory leak and weak crypto issues reported by coverity.

Coverity issue: 358439, 358448, 358451
Fixes: 6b89650418 ("test/graph: add functional tests")

Signed-off-by: Kiran Kumar K 
Acked-by: Jerin Jacob 
---
V4 Changes:
* Added space before bracket in Fixes.

 app/test/test_graph.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/app/test/test_graph.c b/app/test/test_graph.c
index cf6df0744..ed69eda99 100644
--- a/app/test/test_graph.c
+++ b/app/test/test_graph.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 

 #include "test.h"

@@ -145,7 +146,7 @@ uint16_t
 test_node_worker_source(struct rte_graph *graph, struct rte_node *node,
void **objs, uint16_t nb_objs)
 {
-   uint32_t obj_node0 = rand() % 100, obj_node1;
+   uint32_t obj_node0 = rte_rand() % 100, obj_node1;
test_main_t *tm = &test_main;
struct rte_mbuf *data;
void **next_stream;
@@ -193,7 +194,7 @@ test_node0_worker(struct rte_graph *graph, struct rte_node 
*node, void **objs,
test_main_t *tm = &test_main;

if (*(uint32_t *)node->ctx == test_node0.id) {
-   uint32_t obj_node0 = rand() % 100, obj_node1;
+   uint32_t obj_node0 = rte_rand() % 100, obj_node1;
struct rte_mbuf *data;
uint8_t second_pass = 0;
uint32_t count = 0;
@@ -496,6 +497,7 @@ test_lookup_functions(void)
printf("Test number of edges for node = %s failed 
Expected = %d, got %d\n",
   tm->test_node[i].node.name,
   tm->test_node[i].node.nb_edges, count);
+   free(next_edges);
return -1;
}

@@ -505,6 +507,7 @@ test_lookup_functions(void)
printf("Edge name miss match, expected = %s got 
= %s\n",
   tm->test_node[i].node.next_nodes[j],
   next_edges[j]);
+   free(next_edges);
return -1;
}
}
--
2.17.1

[dpdk-dev] [PATCH] net/octeontx2: enable full flow control for HIGIG

[kirankumark]

From: Kiran Kumar K 

Due to following errata (NIX-35687) 2019-03-20 A0 CatA Link
credit deadlock, We disabled Tx flow control. Add check to enable
the full flow control in HIGIG mode.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_flow_ctrl.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/octeontx2/otx2_flow_ctrl.c 
b/drivers/net/octeontx2/otx2_flow_ctrl.c
index c6d7b1971..1c6929e76 100644
--- a/drivers/net/octeontx2/otx2_flow_ctrl.c
+++ b/drivers/net/octeontx2/otx2_flow_ctrl.c
@@ -213,6 +213,7 @@ otx2_nix_update_flow_ctrl_mode(struct rte_eth_dev *eth_dev)
 
/* To avoid Link credit deadlock on Ax, disable Tx FC if it's enabled */
if (otx2_dev_is_Ax(dev) &&
+   (dev->npc_flow.switch_header_type != OTX2_PRIV_FLAGS_HIGIG) &&
(fc_conf.mode == RTE_FC_FULL || fc_conf.mode == RTE_FC_RX_PAUSE)) {
fc_conf.mode =
(fc_conf.mode == RTE_FC_FULL ||
-- 
2.17.1

[dpdk-dev] [PATCH v2] net/octeontx2: enable full flow control for HIGIG

[kirankumark]

From: Kiran Kumar K 

When HIGIG flow control enabled with CGX, We are disabling Tx flow control.
Added check to enable the full flow control in HIGIG mode.

Signed-off-by: Kiran Kumar K 
---
V2 changes:
* Updated commit log

 drivers/net/octeontx2/otx2_flow_ctrl.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/octeontx2/otx2_flow_ctrl.c 
b/drivers/net/octeontx2/otx2_flow_ctrl.c
index c6d7b1971..1c6929e76 100644
--- a/drivers/net/octeontx2/otx2_flow_ctrl.c
+++ b/drivers/net/octeontx2/otx2_flow_ctrl.c
@@ -213,6 +213,7 @@ otx2_nix_update_flow_ctrl_mode(struct rte_eth_dev *eth_dev)

/* To avoid Link credit deadlock on Ax, disable Tx FC if it's enabled */
if (otx2_dev_is_Ax(dev) &&
+   (dev->npc_flow.switch_header_type != OTX2_PRIV_FLAGS_HIGIG) &&
(fc_conf.mode == RTE_FC_FULL || fc_conf.mode == RTE_FC_RX_PAUSE)) {
fc_conf.mode =
(fc_conf.mode == RTE_FC_FULL ||
--
2.17.1

[dpdk-dev] [PATCH] net/octeontx2: offload bad L2/L3/L4 UDP lengths detection

[kirankumark]

From: Kiran Kumar K 

Octeontx2 HW has support for detecting the bad L2/L3/L4 UDP lengths.
Since DPDK does not have specific error flag for this, exposing it
as bad checksum failure in mbuff:ol_flags to leverage this feature.

These errors will be propagated to the ol_flags as follows.

L2 length error ==> (PKT_RX_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD).
Both Outer and Inner L3 length error ==> PKT_RX_IP_CKSUM_BAD.
Outer L4 UDP length/port error ==> PKT_RX_OUTER_L4_CKSUM_BAD.
Inner L4 UDP length/port error ==> PKT_RX_L4_CKSUM_BAD.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_ethdev.c |  8 +++-
 drivers/net/octeontx2/otx2_lookup.c | 21 +++--
 2 files changed, 22 insertions(+), 7 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index e60f4901c..7202af625 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -70,7 +70,13 @@ nix_lf_alloc(struct otx2_eth_dev *dev, uint32_t nb_rxq, 
uint32_t nb_txq)
req->rx_cfg |= BIT_ULL(37 /* CSUM_OL4 */);
req->rx_cfg |= BIT_ULL(36 /* CSUM_IL4 */);
}
-   req->rx_cfg |= BIT_ULL(32 /* DROP_RE */);
+   req->rx_cfg |= (BIT_ULL(32 /* DROP_RE */) |
+   BIT_ULL(33 /* Outer L2 Length */) |
+   BIT_ULL(38 /* Inner L4 UDP Length */) |
+   BIT_ULL(39 /* Inner L3 Length */) |
+   BIT_ULL(40 /* Outer L4 UDP Length */) |
+   BIT_ULL(41 /* Outer L3 Length */));
+
if (dev->rss_tag_as_xor == 0)
req->flags = NIX_LF_RSS_TAG_LSB_AS_ADDER;
 
diff --git a/drivers/net/octeontx2/otx2_lookup.c 
b/drivers/net/octeontx2/otx2_lookup.c
index 89365ffad..9dcfc750d 100644
--- a/drivers/net/octeontx2/otx2_lookup.c
+++ b/drivers/net/octeontx2/otx2_lookup.c
@@ -270,7 +270,9 @@ nix_create_rx_ol_flags_array(void *mem)
 
switch (errlev) {
case NPC_ERRLEV_RE:
-   /* Mark all errors as BAD checksum errors */
+   /* Mark all errors as BAD checksum errors
+* including Outer L2 length mismatch error
+*/
if (errcode) {
val |= PKT_RX_IP_CKSUM_BAD;
val |= PKT_RX_L4_CKSUM_BAD;
@@ -295,18 +297,25 @@ nix_create_rx_ol_flags_array(void *mem)
val |= PKT_RX_IP_CKSUM_GOOD;
break;
case NPC_ERRLEV_NIX:
-   val |= PKT_RX_IP_CKSUM_GOOD;
-   if (errcode == NIX_RX_PERRCODE_OL4_CHK) {
+   if (errcode == NIX_RX_PERRCODE_OL4_CHK ||
+   errcode == NIX_RX_PERRCODE_OL4_LEN ||
+   errcode == NIX_RX_PERRCODE_OL4_PORT) {
+   val |= PKT_RX_IP_CKSUM_GOOD;
val |= PKT_RX_OUTER_L4_CKSUM_BAD;
+   } else if (errcode == NIX_RX_PERRCODE_IL4_CHK ||
+  errcode == NIX_RX_PERRCODE_IL4_LEN ||
+  errcode == NIX_RX_PERRCODE_IL4_PORT) {
+   val |= PKT_RX_IP_CKSUM_GOOD;
val |= PKT_RX_L4_CKSUM_BAD;
-   } else if (errcode == NIX_RX_PERRCODE_IL4_CHK) {
-   val |= PKT_RX_L4_CKSUM_BAD;
+   } else if (errcode == NIX_RX_PERRCODE_IL3_LEN ||
+  errcode == NIX_RX_PERRCODE_OL3_LEN) {
+   val |= PKT_RX_IP_CKSUM_BAD;
} else {
+   val |= PKT_RX_IP_CKSUM_GOOD;
val |= PKT_RX_L4_CKSUM_GOOD;
}
break;
}
-
ol_flags[idx] = val;
}
 }
-- 
2.17.1

[dpdk-dev] [PATCH] ethdev: add DBDF action to RTE Flow

[kirankumark]

From: Kiran Kumar K 

Adding suuport to DBDF action in the RTE Flow.
Application can specify the dbdf value using rte_flow_action_dbdf.
Matched traffic will be sent to specified PCI DBDF device.

Signed-off-by: Kiran Kumar K 
---
 app/test-pmd/cmdline_flow.c| 64 ++
 doc/guides/prog_guide/rte_flow.rst | 19 +
 lib/librte_ethdev/rte_flow.c   |  1 +
 lib/librte_ethdev/rte_flow.h   | 16 
 4 files changed, 100 insertions(+)

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index a78154502..c318b4a27 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -342,8 +342,17 @@ enum index {
ACTION_SET_IPV4_DSCP_VALUE,
ACTION_SET_IPV6_DSCP,
ACTION_SET_IPV6_DSCP_VALUE,
+   ACTION_DBDF,
 };
 
+#define DBDF_KEY_LENGTH 20
+
+struct action_dbdf_data {
+   struct rte_flow_action_dbdf conf;
+   uint8_t dbdf_value[DBDF_KEY_LENGTH];
+};
+
+
 /** Maximum size for pattern in struct rte_flow_item_raw. */
 #define ITEM_RAW_PATTERN_SIZE 40
 
@@ -1144,6 +1153,7 @@ static const enum index next_action[] = {
ACTION_SET_META,
ACTION_SET_IPV4_DSCP,
ACTION_SET_IPV6_DSCP,
+   ACTION_DBDF,
ZERO,
 };
 
@@ -1369,6 +1379,11 @@ static const enum index action_set_ipv6_dscp[] = {
ZERO,
 };
 
+static const enum index action_dbdf[] = {
+   ACTION_NEXT,
+   ZERO,
+};
+
 static int parse_set_raw_encap_decap(struct context *, const struct token *,
 const char *, unsigned int,
 void *, unsigned int);
@@ -1421,6 +1436,9 @@ static int parse_vc_action_mplsoudp_encap(struct context 
*,
 static int parse_vc_action_mplsoudp_decap(struct context *,
  const struct token *, const char *,
  unsigned int, void *, unsigned int);
+static int parse_vc_action_dbdf_value(struct context *,
+const struct token *, const char *,
+unsigned int, void *, unsigned int);
 static int parse_vc_action_raw_encap(struct context *,
 const struct token *, const char *,
 unsigned int, void *, unsigned int);
@@ -3684,6 +3702,18 @@ static const struct token token_list[] = {
 (struct rte_flow_action_set_dscp, dscp)),
.call = parse_vc_conf,
},
+   [ACTION_DBDF] = {
+   .name = "dbdf",
+   .help = "set DBDF value",
+   .next = NEXT(action_dbdf, NEXT_ENTRY(STRING)),
+   .priv = PRIV_ACTION(DBDF, sizeof(struct action_dbdf_data)),
+   .args = ARGS(ARGS_ENTRY_ARB(0, 0),
+ARGS_ENTRY_ARB(0, sizeof(uint8_t)),
+ARGS_ENTRY_ARB(
+   offsetof(struct action_dbdf_data, dbdf_value),
+   DBDF_KEY_LENGTH)),
+   .call = parse_vc_action_dbdf_value,
+   },
 };
 
 /** Remove and return last entry from argument stack. */
@@ -5064,6 +5094,40 @@ parse_vc_action_raw_encap_index(struct context *ctx, 
const struct token *token,
return len;
 }
 
+static int
+parse_vc_action_dbdf_value(struct context *ctx, const struct token *token,
+ const char *str, unsigned int len, void *buf,
+ unsigned int size)
+{
+   struct buffer *out = buf;
+   struct rte_flow_action *action;
+   struct action_dbdf_data *action_dbdf_data = NULL;
+   int ret;
+
+   ret = parse_vc(ctx, token, str, len, buf, size);
+   if (ret < 0)
+   return ret;
+   /* Nothing else to do if there is no buffer. */
+   if (!out)
+   return ret;
+   if (!out->args.vc.actions_n)
+   return -1;
+   action = &out->args.vc.actions[out->args.vc.actions_n - 1];
+   /* Point to selected object. */
+   ctx->object = out->args.vc.data;
+   ctx->objmask = NULL;
+   /* Copy the headers to the buffer. */
+   action_dbdf_data = ctx->object;
+   *action_dbdf_data = (struct action_dbdf_data) {
+   .conf = (struct rte_flow_action_dbdf){
+   .dbdf_value = action_dbdf_data->dbdf_value,
+   },
+   .dbdf_value = {},
+   };
+   action->conf = &action_dbdf_data->conf;
+   return ret;
+}
+
 static int
 parse_vc_action_raw_encap(struct context *ctx, const struct token *token,
  const char *str, unsigned int len, void *buf,
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 41c147913..b900e283c 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -2616,6 +2616,25 @@ Otherwise, RTE_FLOW_ERROR_TYPE_ACTION error will be 
returned.
| ``dscp

[dpdk-dev] [PATCH] net/octeontx2: add flags based extraction support

[kirankumark]

From: Kiran Kumar K 

Adding support for flags based extraction in octeontx2 Flow.
Patch supports extracting data greater than 32 bytes using lflags.
When flags based extraction is enabled, lower 4 bits will be
considered (16 flags) for indexing the flags, and will be used
for extraction.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_flow.c   |   1 +
 drivers/net/octeontx2/otx2_flow.h   |   1 +
 drivers/net/octeontx2/otx2_flow_utils.c | 237 ++--
 3 files changed, 145 insertions(+), 94 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_flow.c 
b/drivers/net/octeontx2/otx2_flow.c
index 982100df4..c463075cb 100644
--- a/drivers/net/octeontx2/otx2_flow.c
+++ b/drivers/net/octeontx2/otx2_flow.c
@@ -684,6 +684,7 @@ flow_update_kex_info(struct npc_xtract_info *xtract_info,
xtract_info->hdr_off = (val >> HDR_OFF_SHIFT) & 0xff;
xtract_info->key_off = val & 0x3f;
xtract_info->enable = ((val >> 7) & 0x1);
+   xtract_info->flags_enable = ((val >> 6) & 0x1);
 }
 
 static void
diff --git a/drivers/net/octeontx2/otx2_flow.h 
b/drivers/net/octeontx2/otx2_flow.h
index a27ceeb1a..ab068b088 100644
--- a/drivers/net/octeontx2/otx2_flow.h
+++ b/drivers/net/octeontx2/otx2_flow.h
@@ -89,6 +89,7 @@ struct npc_xtract_info {
uint8_t hdr_off; /* Byte offset of proto hdr: extract_src */
uint8_t key_off; /* Byte offset in MCAM key where data is placed */
uint8_t enable; /* Extraction enabled or disabled */
+   uint8_t flags_enable; /* Flags extraction enabled */
 };
 
 /* Information for a given {LAYER, LTYPE} */
diff --git a/drivers/net/octeontx2/otx2_flow_utils.c 
b/drivers/net/octeontx2/otx2_flow_utils.c
index 8a0fe7615..14625c9ad 100644
--- a/drivers/net/octeontx2/otx2_flow_utils.c
+++ b/drivers/net/octeontx2/otx2_flow_utils.c
@@ -124,13 +124,37 @@ flow_mem_is_zero(const void *mem, int len)
return 1;
 }
 
+static void
+flow_set_hw_mask(struct otx2_flow_item_info *info,
+struct npc_xtract_info *xinfo,
+char *hw_mask)
+{
+   int max_off, offset;
+   int j;
+
+   if (xinfo->enable == 0)
+   return;
+
+   if (xinfo->hdr_off < info->hw_hdr_len)
+   return;
+
+   max_off = xinfo->hdr_off + xinfo->len - info->hw_hdr_len;
+
+   if (max_off > info->len)
+   max_off = info->len;
+
+   offset = xinfo->hdr_off - info->hw_hdr_len;
+   for (j = offset; j < max_off; j++)
+   hw_mask[j] = 0xff;
+}
+
 void
 otx2_flow_get_hw_supp_mask(struct otx2_parse_state *pst,
   struct otx2_flow_item_info *info, int lid, int lt)
 {
-   struct npc_xtract_info *xinfo;
+   struct npc_xtract_info *xinfo, *lfinfo;
char *hw_mask = info->hw_mask;
-   int max_off, offset;
+   int lf_cfg;
int i, j;
int intf;
 
@@ -139,21 +163,106 @@ otx2_flow_get_hw_supp_mask(struct otx2_parse_state *pst,
memset(hw_mask, 0, info->len);
 
for (i = 0; i < NPC_MAX_LD; i++) {
-   if (xinfo[i].hdr_off < info->hw_hdr_len)
-   continue;
+   flow_set_hw_mask(info, &xinfo[i], hw_mask);
+   }
 
-   max_off = xinfo[i].hdr_off + xinfo[i].len - info->hw_hdr_len;
+   for (i = 0; i < NPC_MAX_LD; i++) {
 
-   if (xinfo[i].enable == 0)
+   if (xinfo[i].flags_enable == 0)
continue;
 
-   if (max_off > info->len)
-   max_off = info->len;
+   lf_cfg = pst->npc->prx_lfcfg[i].i;
+   if (lf_cfg == lid) {
+   for (j = 0; j < NPC_MAX_LFL; j++) {
+   lfinfo = pst->npc->prx_fxcfg[intf]
+   [i][j].xtract;
+   flow_set_hw_mask(info, &lfinfo[0], hw_mask);
+   }
+   }
+   }
+}
+
+static int
+flow_update_extraction_data(struct otx2_parse_state *pst,
+   struct otx2_flow_item_info *info,
+   struct npc_xtract_info *xinfo)
+{
+   uint8_t int_info_mask[NPC_MAX_EXTRACT_DATA_LEN];
+   uint8_t int_info[NPC_MAX_EXTRACT_DATA_LEN];
+   struct npc_xtract_info *x;
+   int k, idx, hdr_off;
+   int len = 0;
+
+   x = xinfo;
+   len = x->len;
+   hdr_off = x->hdr_off;
+
+   if (hdr_off < info->hw_hdr_len)
+   return 0;
+
+   if (x->enable == 0)
+   return 0;
+
+   otx2_npc_dbg("x->hdr_off = %d, len = %d, info->len = %d,"
+"x->key_off = %d", x->hdr_off, len, info->len,
+x->key_off);
+
+   hdr_off -= info->hw_hdr_len;
+
+   if (hdr_off + len > info->len)
+   len = info->len - hdr_off;
 
-   offset = xinfo[i].hdr_off - info->hw_hdr_len;
-   for (j = offset; j < max_off; j++)
-   hw_mask[j] = 0xff;
+   /* C

[dpdk-dev] [PATCH] net/octeontx2: add ipv6 ext parsing support

[kirankumark]

From: Kiran Kumar K 

Adding support for ipv6_ext header parsing in the octeontx2 flow.

Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/octeontx2.rst   | 6 --
 drivers/net/octeontx2/otx2_flow_parse.c | 7 +++
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
index fbf4c4726..5f511feb7 100644
--- a/doc/guides/nics/octeontx2.rst
+++ b/doc/guides/nics/octeontx2.rst
@@ -262,9 +262,11 @@ Patterns:
+++
| 19 | RTE_FLOW_ITEM_TYPE_VXLAN_GPE   |
+++
-   | 20 | RTE_FLOW_ITEM_TYPE_VOID|
+   | 20 | RTE_FLOW_ITEM_TYPE_IPV6_EXT|
+++
-   | 21 | RTE_FLOW_ITEM_TYPE_ANY |
+   | 21 | RTE_FLOW_ITEM_TYPE_VOID|
+   +++
+   | 22 | RTE_FLOW_ITEM_TYPE_ANY |
+++
 
 Actions:
diff --git a/drivers/net/octeontx2/otx2_flow_parse.c 
b/drivers/net/octeontx2/otx2_flow_parse.c
index 3e6f5b8df..6e65db8e4 100644
--- a/drivers/net/octeontx2/otx2_flow_parse.c
+++ b/drivers/net/octeontx2/otx2_flow_parse.c
@@ -517,6 +517,13 @@ otx2_flow_parse_lc(struct otx2_parse_state *pst)
info.def_mask = &rte_flow_item_arp_eth_ipv4_mask;
info.len = sizeof(struct rte_flow_item_arp_eth_ipv4);
break;
+   case RTE_FLOW_ITEM_TYPE_IPV6_EXT:
+   lid = NPC_LID_LC;
+   lt = NPC_LT_LC_IP6_EXT;
+   info.def_mask = &rte_flow_item_ipv6_ext_mask;
+   info.len = sizeof(struct rte_flow_item_ipv6_ext);
+   info.hw_hdr_len = 40;
+   break;
default:
/* No match at this layer */
return 0;
-- 
2.17.1

[dpdk-dev] [PATCH 1/3] ethdev: add NSH key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_nsh in order to match the network service header
based on RFC 8300.

Signed-off-by: Kiran Kumar K 
---
 lib/librte_ethdev/rte_flow.c |  1 +
 lib/librte_ethdev/rte_flow.h | 39 
 2 files changed, 40 insertions(+)

diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 18fcb018e..39646167c 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -75,6 +75,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(MARK, sizeof(struct rte_flow_item_mark)),
MK_FLOW_ITEM(META, sizeof(struct rte_flow_item_meta)),
MK_FLOW_ITEM(GRE_KEY, sizeof(rte_be32_t)),
+   MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
 };
 
 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index b66bf1495..f0e99fa3e 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -434,6 +434,13 @@ enum rte_flow_item_type {
 * @code rte_be32_t * @endcode
 */
RTE_FLOW_ITEM_TYPE_GRE_KEY,
+
+   /**
+* Matches Network service header (NSH).
+* See struct rte_flow_item_nsh.
+*
+*/
+   RTE_FLOW_ITEM_TYPE_NSH,
 };
 
 /**
@@ -1214,6 +1221,38 @@ struct rte_flow_item_mark {
uint32_t id; /**< Integer value to match against. */
 };
 
+/**
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ITEM_TYPE_NSH
+ *
+ * Match network service header (NSH), RFC 8300
+ *
+ */
+struct rte_flow_item_nsh {
+   uint32_t version:2;
+   uint32_t oam_pkt:1;
+   uint32_t reserved:1;
+   uint32_t ttl:6;
+   uint32_t length:6;
+   uint32_t reserved1:4;
+   uint32_t mdtype:4;
+   uint32_t next_proto:8;
+   uint32_t spi:24;
+   uint32_t sindex:8;
+};
+
+/** Default mask for RTE_FLOW_ITEM_TYPE_NSH. */
+#ifndef __cplusplus
+static const struct rte_flow_item_nsh rte_flow_item_nsh_mask = {
+   .mdtype = 0xf,
+   .next_proto = 0xff,
+   .spi = 0xff,
+   .sindex = 0xff,
+};
+#endif
+
 /**
  * Matching pattern item definition.
  *
-- 
2.17.1

[dpdk-dev] [PATCH 3/3] ethdev: add AH key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_ah in order to match the Authentication Header
based on RFC 2402.

Signed-off-by: Kiran Kumar K 
---
 lib/librte_ethdev/rte_flow.c |  1 +
 lib/librte_ethdev/rte_flow.h | 31 +++
 2 files changed, 32 insertions(+)

diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 4dee4f9c2..44aa9f973 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -77,6 +77,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(GRE_KEY, sizeof(rte_be32_t)),
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
+   MK_FLOW_ITEM(AH, sizeof(struct rte_flow_item_ah)),
 };
 
 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index ce8072613..4c137708e 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -449,6 +449,13 @@ enum rte_flow_item_type {
 */
RTE_FLOW_ITEM_TYPE_IGMP,
 
+   /**
+* Matches IP Authentication Header (AH).
+* See struct rte_flow_item_ah.
+*
+*/
+   RTE_FLOW_ITEM_TYPE_AH,
+
 };
 
 /**
@@ -1284,6 +1291,30 @@ static const struct rte_flow_item_igmp 
rte_flow_item_igmp_mask = {
 };
 #endif
 
+/**
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ITEM_TYPE_AH
+ *
+ * Match IP Authentication Header (AH), RFC 2402
+ *
+ */
+struct rte_flow_item_ah {
+   uint32_t next_hdr:8;
+   uint32_t payload_len:8;
+   uint32_t reserved:16;
+   uint32_t spi;
+   uint32_t seq_num;
+};
+
+/** Default mask for RTE_FLOW_ITEM_TYPE_AH. */
+#ifndef __cplusplus
+static const struct rte_flow_item_ah rte_flow_item_ah_mask = {
+   .spi = 0x,
+};
+#endif
+
 /**
  * Matching pattern item definition.
  *
-- 
2.17.1

[dpdk-dev] [PATCH 2/3] ethdev: add IGMP key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_igmp in order to match the Internet Group
Management Protocol based on RFC 2236.

Signed-off-by: Kiran Kumar K 
---
 lib/librte_ethdev/rte_flow.c |  1 +
 lib/librte_ethdev/rte_flow.h | 31 +++
 2 files changed, 32 insertions(+)

diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 39646167c..4dee4f9c2 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -76,6 +76,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(META, sizeof(struct rte_flow_item_meta)),
MK_FLOW_ITEM(GRE_KEY, sizeof(rte_be32_t)),
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
+   MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
 };
 
 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index f0e99fa3e..ce8072613 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -441,6 +441,14 @@ enum rte_flow_item_type {
 *
 */
RTE_FLOW_ITEM_TYPE_NSH,
+
+   /**
+* Matches Internet Group Management Protocol (IGMP).
+* See struct rte_flow_item_igmp.
+*
+*/
+   RTE_FLOW_ITEM_TYPE_IGMP,
+
 };
 
 /**
@@ -1253,6 +1261,29 @@ static const struct rte_flow_item_nsh 
rte_flow_item_nsh_mask = {
 };
 #endif
 
+/**
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ITEM_TYPE_IGMP
+ *
+ * Match Internet Group Management Protocol (IGMP), RFC 2236
+ *
+ */
+struct rte_flow_item_igmp {
+   uint32_t type:8;
+   uint32_t max_resp_time:8;
+   uint32_t checksum:16;
+   uint32_t group_addr;
+};
+
+/** Default mask for RTE_FLOW_ITEM_TYPE_IGMP. */
+#ifndef __cplusplus
+static const struct rte_flow_item_igmp rte_flow_item_igmp_mask = {
+   .group_addr = 0x,
+};
+#endif
+
 /**
  * Matching pattern item definition.
  *
-- 
2.17.1

[dpdk-dev] [PATCH v2 1/3] ethdev: add NSH key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_nsh in order to match the network service header
based on RFC 8300.

Signed-off-by: Kiran Kumar K 
---
V2 changes:
* updated supported items in doc

 doc/guides/prog_guide/rte_flow.rst | 18 ++
 lib/librte_ethdev/rte_flow.c   |  1 +
 lib/librte_ethdev/rte_flow.h   | 39 ++
 3 files changed, 58 insertions(+)

diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 821b524b3..c3cdf5be9 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1219,6 +1219,24 @@ Matches an application specific 32 bit metadata item.
| ``mask`` | ``data`` | bit-mask applies to "spec" and "last" |
+--+--+---+

+Item: ``NSH``
+^^^
+
+Matches a network service header (RFC 8300).
+
+- ``version``: normally 0x0 (2 bits).
+- ``oam_pkt``: indicate oam packet (1 bit).
+- ``reserved``: reserved bit (1 bit).
+- ``ttl``: maxium SFF hopes (6 bits).
+- ``length``: total length in 4 bytes words (6 bits).
+- ``reserved1``: reserved1 bits (4 bits).
+- ``mdtype``: ndicates format of NSH header (4 bits).
+- ``next_proto``: indicates protocol type of encap data (8 bits).
+- ``spi``: service path identifier (3 bytes).
+- ``sindex``: service index (1 byte).
+- Default ``mask`` matches mdtype, next_proto, spi, sindex.
+
+
 Actions
 ~~~

diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 18fcb018e..39646167c 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -75,6 +75,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(MARK, sizeof(struct rte_flow_item_mark)),
MK_FLOW_ITEM(META, sizeof(struct rte_flow_item_meta)),
MK_FLOW_ITEM(GRE_KEY, sizeof(rte_be32_t)),
+   MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
 };

 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index b66bf1495..f0e99fa3e 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -434,6 +434,13 @@ enum rte_flow_item_type {
 * @code rte_be32_t * @endcode
 */
RTE_FLOW_ITEM_TYPE_GRE_KEY,
+
+   /**
+* Matches Network service header (NSH).
+* See struct rte_flow_item_nsh.
+*
+*/
+   RTE_FLOW_ITEM_TYPE_NSH,
 };

 /**
@@ -1214,6 +1221,38 @@ struct rte_flow_item_mark {
uint32_t id; /**< Integer value to match against. */
 };

+/**
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ITEM_TYPE_NSH
+ *
+ * Match network service header (NSH), RFC 8300
+ *
+ */
+struct rte_flow_item_nsh {
+   uint32_t version:2;
+   uint32_t oam_pkt:1;
+   uint32_t reserved:1;
+   uint32_t ttl:6;
+   uint32_t length:6;
+   uint32_t reserved1:4;
+   uint32_t mdtype:4;
+   uint32_t next_proto:8;
+   uint32_t spi:24;
+   uint32_t sindex:8;
+};
+
+/** Default mask for RTE_FLOW_ITEM_TYPE_NSH. */
+#ifndef __cplusplus
+static const struct rte_flow_item_nsh rte_flow_item_nsh_mask = {
+   .mdtype = 0xf,
+   .next_proto = 0xff,
+   .spi = 0xff,
+   .sindex = 0xff,
+};
+#endif
+
 /**
  * Matching pattern item definition.
  *
--
2.17.1

[dpdk-dev] [PATCH v2 2/3] ethdev: add IGMP key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_igmp in order to match the Internet Group
Management Protocol based on RFC 2236.

Signed-off-by: Kiran Kumar K 
---
V2 changes:
* updated supported items in doc

 doc/guides/prog_guide/rte_flow.rst | 12 
 lib/librte_ethdev/rte_flow.c   |  1 +
 lib/librte_ethdev/rte_flow.h   | 31 ++
 3 files changed, 44 insertions(+)

diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index c3cdf5be9..d8b7765c4 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1237,6 +1237,18 @@ Matches a network service header (RFC 8300).
 - Default ``mask`` matches mdtype, next_proto, spi, sindex.


+Item: ``IGMP``
+^^^
+
+Matches a Internet Group Management Protocol (RFC 2236).
+
+- ``type``: IGMP message type (Query/Report).
+- ``max_resp_time``: max time allowed before sending report.
+- ``checksum``: checksum, 1s complement of whole IGMP message.
+- ``group_addr``: group address, for Query value will be 0.
+- Default ``mask`` matches group_addr.
+
+
 Actions
 ~~~

diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 39646167c..4dee4f9c2 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -76,6 +76,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(META, sizeof(struct rte_flow_item_meta)),
MK_FLOW_ITEM(GRE_KEY, sizeof(rte_be32_t)),
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
+   MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
 };

 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index f0e99fa3e..ce8072613 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -441,6 +441,14 @@ enum rte_flow_item_type {
 *
 */
RTE_FLOW_ITEM_TYPE_NSH,
+
+   /**
+* Matches Internet Group Management Protocol (IGMP).
+* See struct rte_flow_item_igmp.
+*
+*/
+   RTE_FLOW_ITEM_TYPE_IGMP,
+
 };

 /**
@@ -1253,6 +1261,29 @@ static const struct rte_flow_item_nsh 
rte_flow_item_nsh_mask = {
 };
 #endif

+/**
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ITEM_TYPE_IGMP
+ *
+ * Match Internet Group Management Protocol (IGMP), RFC 2236
+ *
+ */
+struct rte_flow_item_igmp {
+   uint32_t type:8;
+   uint32_t max_resp_time:8;
+   uint32_t checksum:16;
+   uint32_t group_addr;
+};
+
+/** Default mask for RTE_FLOW_ITEM_TYPE_IGMP. */
+#ifndef __cplusplus
+static const struct rte_flow_item_igmp rte_flow_item_igmp_mask = {
+   .group_addr = 0x,
+};
+#endif
+
 /**
  * Matching pattern item definition.
  *
--
2.17.1

[dpdk-dev] [PATCH v2 3/3] ethdev: add AH key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_ah in order to match the Authentication Header
based on RFC 2402.

Signed-off-by: Kiran Kumar K 
---
V2 changes:
* updated supported items in doc

 doc/guides/prog_guide/rte_flow.rst | 13 +
 lib/librte_ethdev/rte_flow.c   |  1 +
 lib/librte_ethdev/rte_flow.h   | 31 ++
 3 files changed, 45 insertions(+)

diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index d8b7765c4..abd46308a 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1249,6 +1249,19 @@ Matches a Internet Group Management Protocol (RFC 2236).
 - Default ``mask`` matches group_addr.


+Item: ``AH``
+^^^
+
+Matches a IP Authentication Header (RFC 4302).
+
+- ``next_hdr``: next payload after AH.
+- ``payload_len``: total length of AH in 4B words.
+- ``reserved``: reserved bits.
+- ``spi``: security parameters index.
+- ``seq_num``: counter value increased by 1 on each packet sent.
+- Default ``mask`` matches spi.
+
+
 Actions
 ~~~

diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 4dee4f9c2..44aa9f973 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -77,6 +77,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(GRE_KEY, sizeof(rte_be32_t)),
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
+   MK_FLOW_ITEM(AH, sizeof(struct rte_flow_item_ah)),
 };

 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index ce8072613..b3b8a6793 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -449,6 +449,13 @@ enum rte_flow_item_type {
 */
RTE_FLOW_ITEM_TYPE_IGMP,

+   /**
+* Matches IP Authentication Header (AH).
+* See struct rte_flow_item_ah.
+*
+*/
+   RTE_FLOW_ITEM_TYPE_AH,
+
 };

 /**
@@ -1284,6 +1291,30 @@ static const struct rte_flow_item_igmp 
rte_flow_item_igmp_mask = {
 };
 #endif

+/**
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ITEM_TYPE_AH
+ *
+ * Match IP Authentication Header (AH), RFC 4302
+ *
+ */
+struct rte_flow_item_ah {
+   uint32_t next_hdr:8;
+   uint32_t payload_len:8;
+   uint32_t reserved:16;
+   uint32_t spi;
+   uint32_t seq_num;
+};
+
+/** Default mask for RTE_FLOW_ITEM_TYPE_AH. */
+#ifndef __cplusplus
+static const struct rte_flow_item_ah rte_flow_item_ah_mask = {
+   .spi = 0x,
+};
+#endif
+
 /**
  * Matching pattern item definition.
  *
--
2.17.1

[dpdk-dev] [PATCH v3 3/3] ethdev: add AH key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_ah in order to match the Authentication Header
based on RFC 2402.

Signed-off-by: Kiran Kumar K 
---
V3 changes:
* Fixed checkpatch issue

V2 changes:
* updated supported items in doc

 doc/guides/prog_guide/rte_flow.rst | 13 +
 lib/librte_ethdev/rte_flow.c   |  1 +
 lib/librte_ethdev/rte_flow.h   | 31 ++
 3 files changed, 45 insertions(+)

diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index f786fa3c2..f696c5fc6 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1249,6 +1249,19 @@ Matches a Internet Group Management Protocol (RFC 2236).
 - Default ``mask`` matches group_addr.


+Item: ``AH``
+^^^
+
+Matches a IP Authentication Header (RFC 4302).
+
+- ``next_hdr``: next payload after AH.
+- ``payload_len``: total length of AH in 4B words.
+- ``reserved``: reserved bits.
+- ``spi``: security parameters index.
+- ``seq_num``: counter value increased by 1 on each packet sent.
+- Default ``mask`` matches spi.
+
+
 Actions
 ~~~

diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 4dee4f9c2..44aa9f973 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -77,6 +77,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(GRE_KEY, sizeof(rte_be32_t)),
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
+   MK_FLOW_ITEM(AH, sizeof(struct rte_flow_item_ah)),
 };

 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index ce8072613..b3b8a6793 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -449,6 +449,13 @@ enum rte_flow_item_type {
 */
RTE_FLOW_ITEM_TYPE_IGMP,

+   /**
+* Matches IP Authentication Header (AH).
+* See struct rte_flow_item_ah.
+*
+*/
+   RTE_FLOW_ITEM_TYPE_AH,
+
 };

 /**
@@ -1284,6 +1291,30 @@ static const struct rte_flow_item_igmp 
rte_flow_item_igmp_mask = {
 };
 #endif

+/**
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ITEM_TYPE_AH
+ *
+ * Match IP Authentication Header (AH), RFC 4302
+ *
+ */
+struct rte_flow_item_ah {
+   uint32_t next_hdr:8;
+   uint32_t payload_len:8;
+   uint32_t reserved:16;
+   uint32_t spi;
+   uint32_t seq_num;
+};
+
+/** Default mask for RTE_FLOW_ITEM_TYPE_AH. */
+#ifndef __cplusplus
+static const struct rte_flow_item_ah rte_flow_item_ah_mask = {
+   .spi = 0x,
+};
+#endif
+
 /**
  * Matching pattern item definition.
  *
--
2.17.1

[dpdk-dev] [PATCH v3 2/3] ethdev: add IGMP key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_igmp in order to match the Internet Group
Management Protocol based on RFC 2236.

Signed-off-by: Kiran Kumar K 
---
V3 changes:
* Fixed checkpatch issue

V2 changes:
* updated supported items in doc

 doc/guides/prog_guide/rte_flow.rst | 12 
 lib/librte_ethdev/rte_flow.c   |  1 +
 lib/librte_ethdev/rte_flow.h   | 31 ++
 3 files changed, 44 insertions(+)

diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 4109f199a..f786fa3c2 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1237,6 +1237,18 @@ Matches a network service header (RFC 8300).
 - Default ``mask`` matches mdtype, next_proto, spi, sindex.


+Item: ``IGMP``
+^^^
+
+Matches a Internet Group Management Protocol (RFC 2236).
+
+- ``type``: IGMP message type (Query/Report).
+- ``max_resp_time``: max time allowed before sending report.
+- ``checksum``: checksum, 1s complement of whole IGMP message.
+- ``group_addr``: group address, for Query value will be 0.
+- Default ``mask`` matches group_addr.
+
+
 Actions
 ~~~

diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 39646167c..4dee4f9c2 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -76,6 +76,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(META, sizeof(struct rte_flow_item_meta)),
MK_FLOW_ITEM(GRE_KEY, sizeof(rte_be32_t)),
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
+   MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
 };

 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index f0e99fa3e..ce8072613 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -441,6 +441,14 @@ enum rte_flow_item_type {
 *
 */
RTE_FLOW_ITEM_TYPE_NSH,
+
+   /**
+* Matches Internet Group Management Protocol (IGMP).
+* See struct rte_flow_item_igmp.
+*
+*/
+   RTE_FLOW_ITEM_TYPE_IGMP,
+
 };

 /**
@@ -1253,6 +1261,29 @@ static const struct rte_flow_item_nsh 
rte_flow_item_nsh_mask = {
 };
 #endif

+/**
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ITEM_TYPE_IGMP
+ *
+ * Match Internet Group Management Protocol (IGMP), RFC 2236
+ *
+ */
+struct rte_flow_item_igmp {
+   uint32_t type:8;
+   uint32_t max_resp_time:8;
+   uint32_t checksum:16;
+   uint32_t group_addr;
+};
+
+/** Default mask for RTE_FLOW_ITEM_TYPE_IGMP. */
+#ifndef __cplusplus
+static const struct rte_flow_item_igmp rte_flow_item_igmp_mask = {
+   .group_addr = 0x,
+};
+#endif
+
 /**
  * Matching pattern item definition.
  *
--
2.17.1

[dpdk-dev] [PATCH v3 1/3] ethdev: add NSH key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_nsh in order to match the network service header
based on RFC 8300.

Signed-off-by: Kiran Kumar K 
---
V3 changes:
* Fixed checkpatch issue

V2 changes:
* updated supported items in doc

 doc/guides/prog_guide/rte_flow.rst | 18 ++
 lib/librte_ethdev/rte_flow.c   |  1 +
 lib/librte_ethdev/rte_flow.h   | 39 ++
 3 files changed, 58 insertions(+)

diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 821b524b3..4109f199a 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1219,6 +1219,24 @@ Matches an application specific 32 bit metadata item.
| ``mask`` | ``data`` | bit-mask applies to "spec" and "last" |
+--+--+---+

+Item: ``NSH``
+^^^
+
+Matches a network service header (RFC 8300).
+
+- ``version``: normally 0x0 (2 bits).
+- ``oam_pkt``: indicate oam packet (1 bit).
+- ``reserved``: reserved bit (1 bit).
+- ``ttl``: maximum SFF hopes (6 bits).
+- ``length``: total length in 4 bytes words (6 bits).
+- ``reserved1``: reserved1 bits (4 bits).
+- ``mdtype``: ndicates format of NSH header (4 bits).
+- ``next_proto``: indicates protocol type of encap data (8 bits).
+- ``spi``: service path identifier (3 bytes).
+- ``sindex``: service index (1 byte).
+- Default ``mask`` matches mdtype, next_proto, spi, sindex.
+
+
 Actions
 ~~~

diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 18fcb018e..39646167c 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -75,6 +75,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(MARK, sizeof(struct rte_flow_item_mark)),
MK_FLOW_ITEM(META, sizeof(struct rte_flow_item_meta)),
MK_FLOW_ITEM(GRE_KEY, sizeof(rte_be32_t)),
+   MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
 };

 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index b66bf1495..f0e99fa3e 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -434,6 +434,13 @@ enum rte_flow_item_type {
 * @code rte_be32_t * @endcode
 */
RTE_FLOW_ITEM_TYPE_GRE_KEY,
+
+   /**
+* Matches Network service header (NSH).
+* See struct rte_flow_item_nsh.
+*
+*/
+   RTE_FLOW_ITEM_TYPE_NSH,
 };

 /**
@@ -1214,6 +1221,38 @@ struct rte_flow_item_mark {
uint32_t id; /**< Integer value to match against. */
 };

+/**
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ITEM_TYPE_NSH
+ *
+ * Match network service header (NSH), RFC 8300
+ *
+ */
+struct rte_flow_item_nsh {
+   uint32_t version:2;
+   uint32_t oam_pkt:1;
+   uint32_t reserved:1;
+   uint32_t ttl:6;
+   uint32_t length:6;
+   uint32_t reserved1:4;
+   uint32_t mdtype:4;
+   uint32_t next_proto:8;
+   uint32_t spi:24;
+   uint32_t sindex:8;
+};
+
+/** Default mask for RTE_FLOW_ITEM_TYPE_NSH. */
+#ifndef __cplusplus
+static const struct rte_flow_item_nsh rte_flow_item_nsh_mask = {
+   .mdtype = 0xf,
+   .next_proto = 0xff,
+   .spi = 0xff,
+   .sindex = 0xff,
+};
+#endif
+
 /**
  * Matching pattern item definition.
  *
--
2.17.1

[dpdk-dev] [PATCH] net/octeontx2: add gre key parsing support

[kirankumark]

From: Kiran Kumar K 

Adding support to parse GRE KEY for octeontx2 Flow.
Matching on GRE Key will only work, if checksum and routing
bits in the GRE header are equal to 0.

Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/octeontx2.rst   | 96 +
 drivers/net/octeontx2/otx2_flow_parse.c |  7 ++
 2 files changed, 56 insertions(+), 47 deletions(-)

diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
index 5f511feb7..ce54de478 100644
--- a/doc/guides/nics/octeontx2.rst
+++ b/doc/guides/nics/octeontx2.rst
@@ -221,53 +221,55 @@ Patterns:
 
 .. table:: Item types
 
-   +++
-   | #  | Pattern Type   |
-   +++
-   | 1  | RTE_FLOW_ITEM_TYPE_ETH |
-   +++
-   | 2  | RTE_FLOW_ITEM_TYPE_VLAN|
-   +++
-   | 3  | RTE_FLOW_ITEM_TYPE_E_TAG   |
-   +++
-   | 4  | RTE_FLOW_ITEM_TYPE_IPV4|
-   +++
-   | 5  | RTE_FLOW_ITEM_TYPE_IPV6|
-   +++
-   | 6  | RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4|
-   +++
-   | 7  | RTE_FLOW_ITEM_TYPE_MPLS|
-   +++
-   | 8  | RTE_FLOW_ITEM_TYPE_ICMP|
-   +++
-   | 9  | RTE_FLOW_ITEM_TYPE_UDP |
-   +++
-   | 10 | RTE_FLOW_ITEM_TYPE_TCP |
-   +++
-   | 11 | RTE_FLOW_ITEM_TYPE_SCTP|
-   +++
-   | 12 | RTE_FLOW_ITEM_TYPE_ESP |
-   +++
-   | 13 | RTE_FLOW_ITEM_TYPE_GRE |
-   +++
-   | 14 | RTE_FLOW_ITEM_TYPE_NVGRE   |
-   +++
-   | 15 | RTE_FLOW_ITEM_TYPE_VXLAN   |
-   +++
-   | 16 | RTE_FLOW_ITEM_TYPE_GTPC|
-   +++
-   | 17 | RTE_FLOW_ITEM_TYPE_GTPU|
-   +++
-   | 18 | RTE_FLOW_ITEM_TYPE_GENEVE  |
-   +++
-   | 19 | RTE_FLOW_ITEM_TYPE_VXLAN_GPE   |
-   +++
-   | 20 | RTE_FLOW_ITEM_TYPE_IPV6_EXT|
-   +++
-   | 21 | RTE_FLOW_ITEM_TYPE_VOID|
-   +++
-   | 22 | RTE_FLOW_ITEM_TYPE_ANY |
-   +++
+   +++---+
+   | #  | Pattern Type   | Comment   |
+   +++===+
+   | 1  | RTE_FLOW_ITEM_TYPE_ETH |   |
+   +++---+
+   | 2  | RTE_FLOW_ITEM_TYPE_VLAN|   |
+   +++---+
+   | 3  | RTE_FLOW_ITEM_TYPE_E_TAG   |   |
+   +++---+
+   | 4  | RTE_FLOW_ITEM_TYPE_IPV4|   |
+   +++---+
+   | 5  | RTE_FLOW_ITEM_TYPE_IPV6|   |
+   +++---+
+   | 6  | RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4|   |
+   +++---+
+   | 7  | RTE_FLOW_ITEM_TYPE_MPLS|   |
+   +++---+
+   | 8  | RTE_FLOW_ITEM_TYPE_ICMP|   |
+   +++---+
+   | 9  | RTE_FLOW_ITEM_TYPE_UDP |   |
+   +++---+
+   | 10 | RTE_FLOW_ITEM_TYPE_TCP |   |
+   +++---+
+   | 11 | RTE_FLOW_ITEM_TYPE_SCTP|   |
+   +++---+
+   | 12 | RTE_FLOW_ITEM_TYPE_ESP |   |
+   +++---+
+   | 13 | RTE_FLOW_ITEM_TYPE_GRE |   |
+   +++--

[dpdk-dev] [PATCH v5] ethdev: add HIGIG2 key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_higig2_hdr in order to match higig2 header.
It is a layer 2.5 protocol and used in Broadcom switches.
Header format is based on the following document.
http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf

Signed-off-by: Kiran Kumar K 
---
V5 changes:
* Changed broadcom to Broadcom
* Changed RTE_HIGIG2_H to RTE_HIGIG_H
* Fixed meson build

V4 Changes:
* Removed packed attribute

V3 Changes:
* Fixed Copyright header
* Fixed version info in the subject

V2 Changes:
* Added support in testpmd to parse the higig2 item
* Moved the higig2 header to new file
* Added indentation in doc

 app/test-pmd/cmdline_flow.c|  33 +++
 doc/guides/prog_guide/rte_flow.rst |   8 ++
 lib/librte_ethdev/rte_flow.c   |   1 +
 lib/librte_ethdev/rte_flow.h   |   7 ++
 lib/librte_net/Makefile|   2 +-
 lib/librte_net/meson.build |   3 +-
 lib/librte_net/rte_higig.h | 138 +
 7 files changed, 190 insertions(+), 2 deletions(-)
 create mode 100644 lib/librte_net/rte_higig.h

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index b26b8bfe2..8d6c354fa 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -203,6 +203,9 @@ enum index {
ITEM_PPPOED,
ITEM_PPPOE_SEID,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,

/* Validate/create actions. */
ACTIONS,
@@ -675,6 +678,7 @@ static const enum index next_item[] = {
ITEM_PPPOES,
ITEM_PPPOED,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
END_SET,
ZERO,
 };
@@ -939,6 +943,13 @@ static const enum index item_pppoe_proto_id[] = {
ZERO,
 };

+static const enum index item_higig2[] = {
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,
+   ITEM_NEXT,
+   ZERO,
+};
+
 static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -2419,6 +2430,28 @@ static const struct token token_list[] = {
.next = NEXT(item_pppoe_proto_id),
.call = parse_vc,
},
+   [ITEM_HIGIG2] = {
+   .name = "higig2",
+   .help = "matches higig2 header",
+   .priv = PRIV_ITEM(HIGIG2,
+   sizeof(struct rte_flow_item_higig2_hdr)),
+   .next = NEXT(item_higig2),
+   .call = parse_vc,
+   },
+   [ITEM_HIGIG2_CLASSIFICATION] = {
+   .name = "classification",
+   .help = "matches classification of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   ppt1.classification)),
+   },
+   [ITEM_HIGIG2_VID] = {
+   .name = "vid",
+   .help = "matches vid of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   ppt1.vid)),
+   },
/* Validate/create actions. */
[ACTIONS] = {
.name = "actions",
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 1c837ff13..6e6d44df2 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1289,6 +1289,14 @@ Matches a IP Authentication Header (RFC 4302).
 - ``seq_num``: counter value increased by 1 on each packet sent.
 - Default ``mask`` matches spi.

+Item: ``HIGIG2``
+^
+
+Matches a HIGIG2 header field. It is layer 2.5 protocol and used in
+Broadcom switches.
+
+- Default ``mask`` matches classification and vlan.
+

 Actions
 ~~~
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 81a85b995..ca0f68016 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -83,6 +83,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
MK_FLOW_ITEM(AH, sizeof(struct rte_flow_item_ah)),
+   MK_FLOW_ITEM(HIGIG2, sizeof(struct rte_flow_item_higig2_hdr)),
 };

 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index bcfc06cdc..79f160df0 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include 

 #ifdef __cplusplus
 extern "C" {
@@ -491,6 +492,12 @@ enum rte_flow_item_type {
 *
 */
RTE_FLOW_ITEM_TYPE_AH,
+
+   /**
+* Matches a HIGIG header.
+* see struct rte_flow_item_higig2_hdr.
+*/
+   RTE_FLOW_ITEM_TYPE_HIGIG2,
 };

 /**
diff --git a/lib/librte_net/Makefil

[dpdk-dev] [PATCH v6] ethdev: add HIGIG2 key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_higig2_hdr in order to match higig2 header.
It is a layer 2.5 protocol and used in Broadcom switches.
Header format is based on the following document.
http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf

Signed-off-by: Kiran Kumar K 
---
V6 changes:
* Updated doxy-api

V5 changes:
* Changed broadcom to Broadcom
* Changed RTE_HIGIG2_H to RTE_HIGIG_H
* Fixed meson build

V4 Changes:
* Removed packed attribute

V3 Changes:
* Fixed Copyright header
* Fixed version info in the subject

V2 Changes:
* Added support in testpmd to parse the higig2 item
* Moved the higig2 header to new file
* Added indentation in doc

 app/test-pmd/cmdline_flow.c|  33 +++
 doc/api/doxy-api-index.md  |   3 +-
 doc/guides/prog_guide/rte_flow.rst |   8 ++
 lib/librte_ethdev/rte_flow.c   |   1 +
 lib/librte_ethdev/rte_flow.h   |   7 ++
 lib/librte_net/Makefile|   2 +-
 lib/librte_net/meson.build |   3 +-
 lib/librte_net/rte_higig.h | 138 +
 8 files changed, 192 insertions(+), 3 deletions(-)
 create mode 100644 lib/librte_net/rte_higig.h

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index b26b8bfe2..8d6c354fa 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -203,6 +203,9 @@ enum index {
ITEM_PPPOED,
ITEM_PPPOE_SEID,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,

/* Validate/create actions. */
ACTIONS,
@@ -675,6 +678,7 @@ static const enum index next_item[] = {
ITEM_PPPOES,
ITEM_PPPOED,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
END_SET,
ZERO,
 };
@@ -939,6 +943,13 @@ static const enum index item_pppoe_proto_id[] = {
ZERO,
 };

+static const enum index item_higig2[] = {
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,
+   ITEM_NEXT,
+   ZERO,
+};
+
 static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -2419,6 +2430,28 @@ static const struct token token_list[] = {
.next = NEXT(item_pppoe_proto_id),
.call = parse_vc,
},
+   [ITEM_HIGIG2] = {
+   .name = "higig2",
+   .help = "matches higig2 header",
+   .priv = PRIV_ITEM(HIGIG2,
+   sizeof(struct rte_flow_item_higig2_hdr)),
+   .next = NEXT(item_higig2),
+   .call = parse_vc,
+   },
+   [ITEM_HIGIG2_CLASSIFICATION] = {
+   .name = "classification",
+   .help = "matches classification of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   ppt1.classification)),
+   },
+   [ITEM_HIGIG2_VID] = {
+   .name = "vid",
+   .help = "matches vid of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   ppt1.vid)),
+   },
/* Validate/create actions. */
[ACTIONS] = {
.name = "actions",
diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md
index 6c2d888ee..c52b54e55 100644
--- a/doc/api/doxy-api-index.md
+++ b/doc/api/doxy-api-index.md
@@ -101,7 +101,8 @@ The public API headers are grouped by topics:
   [GSO](@ref rte_gso.h),
   [frag/reass] (@ref rte_ip_frag.h),
   [LPM IPv4 route] (@ref rte_lpm.h),
-  [LPM IPv6 route] (@ref rte_lpm6.h)
+  [LPM IPv6 route] (@ref rte_lpm6.h),
+  [HIGIG]  (@ref rte_higig.h)

 - **QoS**:
   [metering]   (@ref rte_meter.h),
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 1c837ff13..6e6d44df2 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1289,6 +1289,14 @@ Matches a IP Authentication Header (RFC 4302).
 - ``seq_num``: counter value increased by 1 on each packet sent.
 - Default ``mask`` matches spi.

+Item: ``HIGIG2``
+^
+
+Matches a HIGIG2 header field. It is layer 2.5 protocol and used in
+Broadcom switches.
+
+- Default ``mask`` matches classification and vlan.
+

 Actions
 ~~~
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 81a85b995..ca0f68016 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -83,6 +83,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
MK_FLOW_ITEM(AH, sizeof(struct rte_flow_item_ah)),
+   MK_FLOW_ITEM(HIGIG2, sizeof(struct rte_flow_ite

[dpdk-dev] [PATCH v7] ethdev: add HIGIG2 key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_higig2_hdr in order to match higig2 header.
It is a layer 2.5 protocol and used in Broadcom switches.
Header format is based on the following document.
http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf

Signed-off-by: Kiran Kumar K 
Acked-by: Andrew Rybchenko 
---
V7 changes:
* Added doxygen comments
* Moved rte_flow specific code to rte_flow.h

V6 changes:
* Updated doxy-api

V5 changes:
* Changed broadcom to Broadcom
* Changed RTE_HIGIG2_H to RTE_HIGIG_H
* Fixed meson build

V4 Changes:
* Removed packed attribute

V3 Changes:
* Fixed Copyright header
* Fixed version info in the subject

V2 Changes:
* Added support in testpmd to parse the higig2 item
* Moved the higig2 header to new file
* Added indentation in doc

 app/test-pmd/cmdline_flow.c|  33 +++
 doc/api/doxy-api-index.md  |   3 +-
 doc/guides/prog_guide/rte_flow.rst |   8 ++
 lib/librte_ethdev/rte_flow.c   |   1 +
 lib/librte_ethdev/rte_flow.h   |  27 ++
 lib/librte_net/Makefile|   2 +-
 lib/librte_net/meson.build |   3 +-
 lib/librte_net/rte_higig.h | 144 +
 8 files changed, 218 insertions(+), 3 deletions(-)
 create mode 100644 lib/librte_net/rte_higig.h

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index b26b8bfe2..970bdef1d 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -203,6 +203,9 @@ enum index {
ITEM_PPPOED,
ITEM_PPPOE_SEID,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,

/* Validate/create actions. */
ACTIONS,
@@ -675,6 +678,7 @@ static const enum index next_item[] = {
ITEM_PPPOES,
ITEM_PPPOED,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
END_SET,
ZERO,
 };
@@ -939,6 +943,13 @@ static const enum index item_pppoe_proto_id[] = {
ZERO,
 };

+static const enum index item_higig2[] = {
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,
+   ITEM_NEXT,
+   ZERO,
+};
+
 static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -2419,6 +2430,28 @@ static const struct token token_list[] = {
.next = NEXT(item_pppoe_proto_id),
.call = parse_vc,
},
+   [ITEM_HIGIG2] = {
+   .name = "higig2",
+   .help = "matches higig2 header",
+   .priv = PRIV_ITEM(HIGIG2,
+   sizeof(struct rte_flow_item_higig2_hdr)),
+   .next = NEXT(item_higig2),
+   .call = parse_vc,
+   },
+   [ITEM_HIGIG2_CLASSIFICATION] = {
+   .name = "classification",
+   .help = "matches classification of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   hdr.ppt1.classification)),
+   },
+   [ITEM_HIGIG2_VID] = {
+   .name = "vid",
+   .help = "matches vid of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   hdr.ppt1.vid)),
+   },
/* Validate/create actions. */
[ACTIONS] = {
.name = "actions",
diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md
index 6c2d888ee..c52b54e55 100644
--- a/doc/api/doxy-api-index.md
+++ b/doc/api/doxy-api-index.md
@@ -101,7 +101,8 @@ The public API headers are grouped by topics:
   [GSO](@ref rte_gso.h),
   [frag/reass] (@ref rte_ip_frag.h),
   [LPM IPv4 route] (@ref rte_lpm.h),
-  [LPM IPv6 route] (@ref rte_lpm6.h)
+  [LPM IPv6 route] (@ref rte_lpm6.h),
+  [HIGIG]  (@ref rte_higig.h)

 - **QoS**:
   [metering]   (@ref rte_meter.h),
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 1c837ff13..6e6d44df2 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1289,6 +1289,14 @@ Matches a IP Authentication Header (RFC 4302).
 - ``seq_num``: counter value increased by 1 on each packet sent.
 - Default ``mask`` matches spi.

+Item: ``HIGIG2``
+^
+
+Matches a HIGIG2 header field. It is layer 2.5 protocol and used in
+Broadcom switches.
+
+- Default ``mask`` matches classification and vlan.
+

 Actions
 ~~~
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 81a85b995..ca0f68016 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -83,6 +83,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item

[dpdk-dev] [PATCH v8] ethdev: add HIGIG2 key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_higig2_hdr in order to match higig2 header.
It is a layer 2.5 protocol and used in Broadcom switches.
Header format is based on the following document.
http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf

Signed-off-by: Kiran Kumar K 
Acked-by: Andrew Rybchenko 
---
V8 Changes:
* Fixed gcc 4.8 compile issue

V7 changes:
* Added doxygen comments
* Moved rte_flow specific code to rte_flow.h

V6 changes:
* Updated doxy-api

V5 changes:
* Changed broadcom to Broadcom
* Changed RTE_HIGIG2_H to RTE_HIGIG_H
* Fixed meson build

V4 Changes:
* Removed packed attribute

V3 Changes:
* Fixed Copyright header
* Fixed version info in the subject

V2 Changes:
* Added support in testpmd to parse the higig2 item
* Moved the higig2 header to new file
* Added indentation in doc

 app/test-pmd/cmdline_flow.c|  33 +++
 doc/api/doxy-api-index.md  |   3 +-
 doc/guides/prog_guide/rte_flow.rst |   8 ++
 lib/librte_ethdev/rte_flow.c   |   1 +
 lib/librte_ethdev/rte_flow.h   |  27 ++
 lib/librte_net/Makefile|   2 +-
 lib/librte_net/meson.build |   3 +-
 lib/librte_net/rte_higig.h | 144 +
 8 files changed, 218 insertions(+), 3 deletions(-)
 create mode 100644 lib/librte_net/rte_higig.h

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index b26b8bfe2..970bdef1d 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -203,6 +203,9 @@ enum index {
ITEM_PPPOED,
ITEM_PPPOE_SEID,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,

/* Validate/create actions. */
ACTIONS,
@@ -675,6 +678,7 @@ static const enum index next_item[] = {
ITEM_PPPOES,
ITEM_PPPOED,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
END_SET,
ZERO,
 };
@@ -939,6 +943,13 @@ static const enum index item_pppoe_proto_id[] = {
ZERO,
 };

+static const enum index item_higig2[] = {
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,
+   ITEM_NEXT,
+   ZERO,
+};
+
 static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -2419,6 +2430,28 @@ static const struct token token_list[] = {
.next = NEXT(item_pppoe_proto_id),
.call = parse_vc,
},
+   [ITEM_HIGIG2] = {
+   .name = "higig2",
+   .help = "matches higig2 header",
+   .priv = PRIV_ITEM(HIGIG2,
+   sizeof(struct rte_flow_item_higig2_hdr)),
+   .next = NEXT(item_higig2),
+   .call = parse_vc,
+   },
+   [ITEM_HIGIG2_CLASSIFICATION] = {
+   .name = "classification",
+   .help = "matches classification of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   hdr.ppt1.classification)),
+   },
+   [ITEM_HIGIG2_VID] = {
+   .name = "vid",
+   .help = "matches vid of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   hdr.ppt1.vid)),
+   },
/* Validate/create actions. */
[ACTIONS] = {
.name = "actions",
diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md
index 6c2d888ee..c52b54e55 100644
--- a/doc/api/doxy-api-index.md
+++ b/doc/api/doxy-api-index.md
@@ -101,7 +101,8 @@ The public API headers are grouped by topics:
   [GSO](@ref rte_gso.h),
   [frag/reass] (@ref rte_ip_frag.h),
   [LPM IPv4 route] (@ref rte_lpm.h),
-  [LPM IPv6 route] (@ref rte_lpm6.h)
+  [LPM IPv6 route] (@ref rte_lpm6.h),
+  [HIGIG]  (@ref rte_higig.h)

 - **QoS**:
   [metering]   (@ref rte_meter.h),
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 1c837ff13..6e6d44df2 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1289,6 +1289,14 @@ Matches a IP Authentication Header (RFC 4302).
 - ``seq_num``: counter value increased by 1 on each packet sent.
 - Default ``mask`` matches spi.

+Item: ``HIGIG2``
+^
+
+Matches a HIGIG2 header field. It is layer 2.5 protocol and used in
+Broadcom switches.
+
+- Default ``mask`` matches classification and vlan.
+

 Actions
 ~~~
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 81a85b995..ca0f68016 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -83,6 +83,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
MK_

[dpdk-dev] [PATCH v9] ethdev: add HIGIG2 key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_higig2_hdr in order to match higig2 header.
It is a layer 2.5 protocol and used in Broadcom switches.
Header format is based on the following document.
http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf

Signed-off-by: Kiran Kumar K 
Acked-by: Andrew Rybchenko 
---
V9 Changes:
* Fix gcc 4.8 compile issue

V8 Changes:
* Fixed gcc 4.8 compile issue

V7 changes:
* Added doxygen comments
* Moved rte_flow specific code to rte_flow.h

V6 changes:
* Updated doxy-api

V5 changes:
* Changed broadcom to Broadcom
* Changed RTE_HIGIG2_H to RTE_HIGIG_H
* Fixed meson build

V4 Changes:
* Removed packed attribute

V3 Changes:
* Fixed Copyright header
* Fixed version info in the subject

V2 Changes:
* Added support in testpmd to parse the higig2 item
* Moved the higig2 header to new file
* Added indentation in doc

 app/test-pmd/cmdline_flow.c|  33 +++
 doc/api/doxy-api-index.md  |   3 +-
 doc/guides/prog_guide/rte_flow.rst |   8 ++
 lib/librte_ethdev/rte_flow.c   |   1 +
 lib/librte_ethdev/rte_flow.h   |  29 ++
 lib/librte_net/Makefile|   2 +-
 lib/librte_net/meson.build |   3 +-
 lib/librte_net/rte_higig.h | 144 +
 8 files changed, 220 insertions(+), 3 deletions(-)
 create mode 100644 lib/librte_net/rte_higig.h

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index b26b8bfe2..970bdef1d 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -203,6 +203,9 @@ enum index {
ITEM_PPPOED,
ITEM_PPPOE_SEID,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,

/* Validate/create actions. */
ACTIONS,
@@ -675,6 +678,7 @@ static const enum index next_item[] = {
ITEM_PPPOES,
ITEM_PPPOED,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
END_SET,
ZERO,
 };
@@ -939,6 +943,13 @@ static const enum index item_pppoe_proto_id[] = {
ZERO,
 };

+static const enum index item_higig2[] = {
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,
+   ITEM_NEXT,
+   ZERO,
+};
+
 static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -2419,6 +2430,28 @@ static const struct token token_list[] = {
.next = NEXT(item_pppoe_proto_id),
.call = parse_vc,
},
+   [ITEM_HIGIG2] = {
+   .name = "higig2",
+   .help = "matches higig2 header",
+   .priv = PRIV_ITEM(HIGIG2,
+   sizeof(struct rte_flow_item_higig2_hdr)),
+   .next = NEXT(item_higig2),
+   .call = parse_vc,
+   },
+   [ITEM_HIGIG2_CLASSIFICATION] = {
+   .name = "classification",
+   .help = "matches classification of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   hdr.ppt1.classification)),
+   },
+   [ITEM_HIGIG2_VID] = {
+   .name = "vid",
+   .help = "matches vid of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   hdr.ppt1.vid)),
+   },
/* Validate/create actions. */
[ACTIONS] = {
.name = "actions",
diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md
index 6c2d888ee..c52b54e55 100644
--- a/doc/api/doxy-api-index.md
+++ b/doc/api/doxy-api-index.md
@@ -101,7 +101,8 @@ The public API headers are grouped by topics:
   [GSO](@ref rte_gso.h),
   [frag/reass] (@ref rte_ip_frag.h),
   [LPM IPv4 route] (@ref rte_lpm.h),
-  [LPM IPv6 route] (@ref rte_lpm6.h)
+  [LPM IPv6 route] (@ref rte_lpm6.h),
+  [HIGIG]  (@ref rte_higig.h)

 - **QoS**:
   [metering]   (@ref rte_meter.h),
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 1c837ff13..6e6d44df2 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1289,6 +1289,14 @@ Matches a IP Authentication Header (RFC 4302).
 - ``seq_num``: counter value increased by 1 on each packet sent.
 - Default ``mask`` matches spi.

+Item: ``HIGIG2``
+^
+
+Matches a HIGIG2 header field. It is layer 2.5 protocol and used in
+Broadcom switches.
+
+- Default ``mask`` matches classification and vlan.
+

 Actions
 ~~~
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 81a85b995..ca0f68016 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -83,6 +83,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(NSH, sizeo

[dpdk-dev] [PATCH v10] ethdev: add HIGIG2 key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_higig2_hdr in order to match higig2 header.
It is a layer 2.5 protocol and used in Broadcom switches.
Header format is based on the following document.
http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf

Signed-off-by: Kiran Kumar K 
Acked-by: Andrew Rybchenko 
Acked-by: Olivier Matz 
---
V10 Changes:
* Avoid structure padding

V9 Changes:
* Fix gcc 4.8 compile issue

V8 Changes:
* Fixed gcc 4.8 compile issue

V7 changes:
* Added doxygen comments
* Moved rte_flow specific code to rte_flow.h

V6 changes:
* Updated doxy-api

V5 changes:
* Changed broadcom to Broadcom
* Changed RTE_HIGIG2_H to RTE_HIGIG_H
* Fixed meson build

V4 Changes:
* Removed packed attribute

V3 Changes:
* Fixed Copyright header
* Fixed version info in the subject

V2 Changes:
* Added support in testpmd to parse the higig2 item
* Moved the higig2 header to new file
* Added indentation in doc

 app/test-pmd/cmdline_flow.c|  33 +++
 doc/api/doxy-api-index.md  |   3 +-
 doc/guides/prog_guide/rte_flow.rst |   8 ++
 lib/librte_ethdev/rte_flow.c   |   1 +
 lib/librte_ethdev/rte_flow.h   |  29 ++
 lib/librte_net/Makefile|   2 +-
 lib/librte_net/meson.build |   3 +-
 lib/librte_net/rte_higig.h | 145 +
 8 files changed, 221 insertions(+), 3 deletions(-)
 create mode 100644 lib/librte_net/rte_higig.h

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index b26b8bfe2..970bdef1d 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -203,6 +203,9 @@ enum index {
ITEM_PPPOED,
ITEM_PPPOE_SEID,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,

/* Validate/create actions. */
ACTIONS,
@@ -675,6 +678,7 @@ static const enum index next_item[] = {
ITEM_PPPOES,
ITEM_PPPOED,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
END_SET,
ZERO,
 };
@@ -939,6 +943,13 @@ static const enum index item_pppoe_proto_id[] = {
ZERO,
 };

+static const enum index item_higig2[] = {
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,
+   ITEM_NEXT,
+   ZERO,
+};
+
 static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -2419,6 +2430,28 @@ static const struct token token_list[] = {
.next = NEXT(item_pppoe_proto_id),
.call = parse_vc,
},
+   [ITEM_HIGIG2] = {
+   .name = "higig2",
+   .help = "matches higig2 header",
+   .priv = PRIV_ITEM(HIGIG2,
+   sizeof(struct rte_flow_item_higig2_hdr)),
+   .next = NEXT(item_higig2),
+   .call = parse_vc,
+   },
+   [ITEM_HIGIG2_CLASSIFICATION] = {
+   .name = "classification",
+   .help = "matches classification of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   hdr.ppt1.classification)),
+   },
+   [ITEM_HIGIG2_VID] = {
+   .name = "vid",
+   .help = "matches vid of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   hdr.ppt1.vid)),
+   },
/* Validate/create actions. */
[ACTIONS] = {
.name = "actions",
diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md
index 6c2d888ee..c52b54e55 100644
--- a/doc/api/doxy-api-index.md
+++ b/doc/api/doxy-api-index.md
@@ -101,7 +101,8 @@ The public API headers are grouped by topics:
   [GSO](@ref rte_gso.h),
   [frag/reass] (@ref rte_ip_frag.h),
   [LPM IPv4 route] (@ref rte_lpm.h),
-  [LPM IPv6 route] (@ref rte_lpm6.h)
+  [LPM IPv6 route] (@ref rte_lpm6.h),
+  [HIGIG]  (@ref rte_higig.h)

 - **QoS**:
   [metering]   (@ref rte_meter.h),
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 1c837ff13..6e6d44df2 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1289,6 +1289,14 @@ Matches a IP Authentication Header (RFC 4302).
 - ``seq_num``: counter value increased by 1 on each packet sent.
 - Default ``mask`` matches spi.

+Item: ``HIGIG2``
+^
+
+Matches a HIGIG2 header field. It is layer 2.5 protocol and used in
+Broadcom switches.
+
+- Default ``mask`` matches classification and vlan.
+

 Actions
 ~~~
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 81a85b995..ca0f68016 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -83,6 +83,7 @@ static const struct rte_flow_des

[dpdk-dev] [PATCH 1/2] net/octeontx2: add support to enable switch type

[kirankumark]

From: Kiran Kumar K 

Adding support to configure specific switch types like high2 and dsa
on a port. When this switch type is configured, it is expected that
all the traffic on that port should be of specific type only.

Change-Id: I41c47c4f8d844666cd6afe20a60397b83908e2f4
Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/octeontx2.rst   | 12 +
 drivers/common/octeontx2/otx2_mbox.h| 19 -
 drivers/net/octeontx2/otx2_ethdev.c | 30 +
 drivers/net/octeontx2/otx2_ethdev_devargs.c | 22 ++-
 drivers/net/octeontx2/otx2_flow.h   |  1 +
 5 files changed, 82 insertions(+), 2 deletions(-)

diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
index fc8a130fb..adf7c7131 100644
--- a/doc/guides/nics/octeontx2.rst
+++ b/doc/guides/nics/octeontx2.rst
@@ -170,6 +170,18 @@ Runtime Config Options
With the above configuration, each send queue's decscriptor buffer count is
limited to a maximum of 64 buffers.
 
+- ``switch header enable`` (default ``none``)
+
+   A port can be configured to a specific switch header type by using
+   ``switch_header`` ``devargs`` parameter.
+
+   For example::
+
+  -w 0002:02:00.0,switch_header="higig2"
+
+   With the above configuration, higig2 will be enabled on that port and the
+   traffic on this port should be higig2 traffic only. Supported switch header
+   types are "higig2" and "dsa".
 
 .. note::
 
diff --git a/drivers/common/octeontx2/otx2_mbox.h 
b/drivers/common/octeontx2/otx2_mbox.h
index 445b03e26..c2a9e9fe6 100644
--- a/drivers/common/octeontx2/otx2_mbox.h
+++ b/drivers/common/octeontx2/otx2_mbox.h
@@ -89,7 +89,7 @@ struct mbox_msghdr {
 #define OTX2_MBOX_RSP_SIG (0xbeef)
/* Signature, for validating corrupted msgs */
uint16_t __otx2_io sig;
-#define OTX2_MBOX_VERSION (0x0002)
+#define OTX2_MBOX_VERSION (0x0003)
/* Version of msg's structure for this ID */
uint16_t __otx2_io ver;
/* Offset of next msg within mailbox region */
@@ -236,6 +236,9 @@ M(NPC_DELETE_FLOW,0x600e, npc_delete_flow,  
\
 M(NPC_MCAM_READ_ENTRY,   0x600f, npc_mcam_read_entry,  \
  npc_mcam_read_entry_req,  \
  npc_mcam_read_entry_rsp)  \
+M(NPC_SET_PKIND,  0x6010, npc_set_pkind,\
+ npc_set_pkind,\
+ msg_rsp)  \
 /* NIX mbox IDs (range 0x8000 - 0x) */ \
 M(NIX_LF_ALLOC,0x8000, nix_lf_alloc, nix_lf_alloc_req, 
\
nix_lf_alloc_rsp)   \
@@ -329,6 +332,20 @@ struct ready_msg_rsp {
uint16_t __otx2_io rclk_freq; /* RCLK frequency */
 };
 
+/* Struct to set pkind */
+struct npc_set_pkind {
+   struct mbox_msghdr hdr;
+#define OTX2_PRIV_FLAGS_DEFAULT  BIT_ULL(0)
+#define OTX2_PRIV_FLAGS_EDSA BIT_ULL(1)
+#define OTX2_PRIV_FLAGS_HIGIGBIT_ULL(2)
+#define OTX2_PRIV_FLAGS_CUSTOM   BIT_ULL(63)
+   uint64_t __otx2_io mode;
+#define PKIND_TX   BIT_ULL(0)
+#define PKIND_RX   BIT_ULL(1)
+   uint8_t __otx2_io dir;
+   uint8_t __otx2_io pkind; /* valid only in case custom flag */
+};
+
 /* Structure for requesting resource provisioning.
  * 'modify' flag to be used when either requesting more
  * or detach partial of a certain resource type.
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 62291c698..dfa8cd205 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -90,6 +90,30 @@ nix_lf_alloc(struct otx2_eth_dev *dev, uint32_t nb_rxq, 
uint32_t nb_txq)
return 0;
 }
 
+static int
+nix_lf_switch_header_type_enable(struct otx2_eth_dev *dev)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+   struct npc_set_pkind *req;
+   struct msg_resp *rsp;
+   int rc;
+
+   if (dev->npc_flow.switch_header_type == 0)
+   return 0;
+
+   /* Notify AF about higig2 config */
+   req = otx2_mbox_alloc_msg_npc_set_pkind(mbox);
+   req->mode = dev->npc_flow.switch_header_type;
+   req->dir = PKIND_RX;
+   rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
+   if (rc)
+   return rc;
+   req = otx2_mbox_alloc_msg_npc_set_pkind(mbox);
+   req->mode = dev->npc_flow.switch_header_type;
+   req->dir = PKIND_TX;
+   return otx2_mbox_process_msg(mbox, (void *)&rsp);
+}
+
 static int
 nix_lf_free(struct otx2_eth_dev *dev)
 {
@@ -1612,6 +1636,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto fail_offloads;
}
 
+   rc = nix_lf_switch_header_type_enable(dev);
+   if (rc) {
+   otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
+   goto fr

[dpdk-dev] [PATCH 2/2] net/octeontx2: add support to parse higig2 hdr

[kirankumark]

From: Kiran Kumar K 

Adding support to parse higig2 header in RTE flow for octeontx2.
And added devargs to configure port for higig2.

Change-Id: I6931c2905f90a841c2638251bdfa1e63c7d676e6
Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/octeontx2.rst   |  2 ++
 drivers/common/octeontx2/hw/otx2_npc.h  |  2 ++
 drivers/net/octeontx2/otx2_flow.c   |  1 +
 drivers/net/octeontx2/otx2_flow.h   |  3 ++
 drivers/net/octeontx2/otx2_flow_parse.c | 47 +
 5 files changed, 55 insertions(+)

diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
index adf7c7131..eb7aaa468 100644
--- a/doc/guides/nics/octeontx2.rst
+++ b/doc/guides/nics/octeontx2.rst
@@ -288,6 +288,8 @@ Patterns:
+++
| 23 | RTE_FLOW_ITEM_TYPE_GRE_KEY |
+++
+   | 24 | RTE_FLOW_ITEM_TYPE_HIGIG2  |
+   +++
 
 .. note::
 
diff --git a/drivers/common/octeontx2/hw/otx2_npc.h 
b/drivers/common/octeontx2/hw/otx2_npc.h
index 5b8d3ed8c..a0536e0ae 100644
--- a/drivers/common/octeontx2/hw/otx2_npc.h
+++ b/drivers/common/octeontx2/hw/otx2_npc.h
@@ -182,6 +182,8 @@ enum npc_kpu_la_ltype {
NPC_LT_LA_IH_8_ETHER,
NPC_LT_LA_IH_4_ETHER,
NPC_LT_LA_IH_2_ETHER,
+   NPC_LT_LA_HIGIG2_ETHER,
+   NPC_LT_LA_IH_NIX_HIGIG2_ETHER,
 };
 
 enum npc_kpu_lb_ltype {
diff --git a/drivers/net/octeontx2/otx2_flow.c 
b/drivers/net/octeontx2/otx2_flow.c
index bdbf123a9..f1fb9f988 100644
--- a/drivers/net/octeontx2/otx2_flow.c
+++ b/drivers/net/octeontx2/otx2_flow.c
@@ -325,6 +325,7 @@ flow_parse_pattern(struct rte_eth_dev *dev,
 {
flow_parse_stage_func_t parse_stage_funcs[] = {
flow_parse_meta_items,
+   otx2_flow_parse_higig2_hdr,
otx2_flow_parse_la,
otx2_flow_parse_lb,
otx2_flow_parse_lc,
diff --git a/drivers/net/octeontx2/otx2_flow.h 
b/drivers/net/octeontx2/otx2_flow.h
index 6bfd5afde..df78f41d3 100644
--- a/drivers/net/octeontx2/otx2_flow.h
+++ b/drivers/net/octeontx2/otx2_flow.h
@@ -29,6 +29,7 @@ enum {
 
 #define NPC_IH_LENGTH  8
 #define NPC_TPID_LENGTH2
+#define NPC_HIGIG2_LENGTH  16
 #define NPC_COUNTER_NONE   (-1)
 /* 32 bytes from LDATA_CFG & 32 bytes from FLAGS_CFG */
 #define NPC_MAX_EXTRACT_DATA_LEN   (64)
@@ -382,6 +383,8 @@ int otx2_flow_parse_lb(struct otx2_parse_state *pst);
 
 int otx2_flow_parse_la(struct otx2_parse_state *pst);
 
+int otx2_flow_parse_higig2_hdr(struct otx2_parse_state *pst);
+
 int otx2_flow_parse_actions(struct rte_eth_dev *dev,
const struct rte_flow_attr *attr,
const struct rte_flow_action actions[],
diff --git a/drivers/net/octeontx2/otx2_flow_parse.c 
b/drivers/net/octeontx2/otx2_flow_parse.c
index 2cba0a447..b7b7b6127 100644
--- a/drivers/net/octeontx2/otx2_flow_parse.c
+++ b/drivers/net/octeontx2/otx2_flow_parse.c
@@ -675,6 +675,15 @@ otx2_flow_parse_la(struct otx2_parse_state *pst)
if (pst->flow->nix_intf == NIX_INTF_TX) {
lt = NPC_LT_LA_IH_NIX_ETHER;
info.hw_hdr_len = NPC_IH_LENGTH;
+   if (pst->npc->switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+   lt = NPC_LT_LA_IH_NIX_HIGIG2_ETHER;
+   info.hw_hdr_len += NPC_HIGIG2_LENGTH;
+   }
+   } else {
+   if (pst->npc->switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+   lt = NPC_LT_LA_HIGIG2_ETHER;
+   info.hw_hdr_len = NPC_HIGIG2_LENGTH;
+   }
}
 
/* Prepare for parsing the item */
@@ -694,6 +703,44 @@ otx2_flow_parse_la(struct otx2_parse_state *pst)
return otx2_flow_update_parse_state(pst, &info, lid, lt, 0);
 }
 
+int
+otx2_flow_parse_higig2_hdr(struct otx2_parse_state *pst)
+{
+   struct rte_flow_item_higig2_hdr hw_mask;
+   struct otx2_flow_item_info info;
+   int lid, lt;
+   int rc;
+
+   /* Identify the pattern type into lid, lt */
+   if (pst->pattern->type != RTE_FLOW_ITEM_TYPE_HIGIG2)
+   return 0;
+
+   lid = NPC_LID_LA;
+   lt = NPC_LT_LA_HIGIG2_ETHER;
+   info.hw_hdr_len = 0;
+
+   if (pst->flow->nix_intf == NIX_INTF_TX) {
+   lt = NPC_LT_LA_IH_NIX_HIGIG2_ETHER;
+   info.hw_hdr_len = NPC_IH_LENGTH;
+   }
+
+   /* Prepare for parsing the item */
+   info.def_mask = &rte_flow_item_higig2_hdr_mask;
+   info.hw_mask = &hw_mask;
+   info.len = sizeof(struct rte_flow_item_higig2_hdr);
+   otx2_flow_get_hw_supp_mask(pst, &info, lid, lt);
+   info.spec = NULL;
+   info.mask = NULL;
+
+   /* Basic validation of item parameters */
+   rc = otx2_flow_parse_item_basic(pst->pattern, &info, pst->error);
+   if (rc)
+   return rc;
+
+   /* Update pst if not

[dpdk-dev] [PATCH v2 1/2] net/octeontx2: add support to enable switch type

[kirankumark]

From: Kiran Kumar K 

Adding support to configure specific switch types like high2 and dsa
on a port. When this switch type is configured, it is expected that
all the traffic on that port should be of specific type only.

Signed-off-by: Kiran Kumar K 
---
V2 Changes:
* Fixed checkpatch issue

 doc/guides/nics/octeontx2.rst   | 12 +
 drivers/common/octeontx2/otx2_mbox.h| 19 -
 drivers/net/octeontx2/otx2_ethdev.c | 30 +
 drivers/net/octeontx2/otx2_ethdev_devargs.c | 22 ++-
 drivers/net/octeontx2/otx2_flow.h   |  1 +
 5 files changed, 82 insertions(+), 2 deletions(-)

diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
index fc8a130fb..adf7c7131 100644
--- a/doc/guides/nics/octeontx2.rst
+++ b/doc/guides/nics/octeontx2.rst
@@ -170,6 +170,18 @@ Runtime Config Options
With the above configuration, each send queue's decscriptor buffer count is
limited to a maximum of 64 buffers.

+- ``switch header enable`` (default ``none``)
+
+   A port can be configured to a specific switch header type by using
+   ``switch_header`` ``devargs`` parameter.
+
+   For example::
+
+  -w 0002:02:00.0,switch_header="higig2"
+
+   With the above configuration, higig2 will be enabled on that port and the
+   traffic on this port should be higig2 traffic only. Supported switch header
+   types are "higig2" and "dsa".

 .. note::

diff --git a/drivers/common/octeontx2/otx2_mbox.h 
b/drivers/common/octeontx2/otx2_mbox.h
index 445b03e26..c2a9e9fe6 100644
--- a/drivers/common/octeontx2/otx2_mbox.h
+++ b/drivers/common/octeontx2/otx2_mbox.h
@@ -89,7 +89,7 @@ struct mbox_msghdr {
 #define OTX2_MBOX_RSP_SIG (0xbeef)
/* Signature, for validating corrupted msgs */
uint16_t __otx2_io sig;
-#define OTX2_MBOX_VERSION (0x0002)
+#define OTX2_MBOX_VERSION (0x0003)
/* Version of msg's structure for this ID */
uint16_t __otx2_io ver;
/* Offset of next msg within mailbox region */
@@ -236,6 +236,9 @@ M(NPC_DELETE_FLOW,0x600e, npc_delete_flow,  
\
 M(NPC_MCAM_READ_ENTRY,   0x600f, npc_mcam_read_entry,  \
  npc_mcam_read_entry_req,  \
  npc_mcam_read_entry_rsp)  \
+M(NPC_SET_PKIND,  0x6010, npc_set_pkind,\
+ npc_set_pkind,\
+ msg_rsp)  \
 /* NIX mbox IDs (range 0x8000 - 0x) */ \
 M(NIX_LF_ALLOC,0x8000, nix_lf_alloc, nix_lf_alloc_req, 
\
nix_lf_alloc_rsp)   \
@@ -329,6 +332,20 @@ struct ready_msg_rsp {
uint16_t __otx2_io rclk_freq; /* RCLK frequency */
 };

+/* Struct to set pkind */
+struct npc_set_pkind {
+   struct mbox_msghdr hdr;
+#define OTX2_PRIV_FLAGS_DEFAULT  BIT_ULL(0)
+#define OTX2_PRIV_FLAGS_EDSA BIT_ULL(1)
+#define OTX2_PRIV_FLAGS_HIGIGBIT_ULL(2)
+#define OTX2_PRIV_FLAGS_CUSTOM   BIT_ULL(63)
+   uint64_t __otx2_io mode;
+#define PKIND_TX   BIT_ULL(0)
+#define PKIND_RX   BIT_ULL(1)
+   uint8_t __otx2_io dir;
+   uint8_t __otx2_io pkind; /* valid only in case custom flag */
+};
+
 /* Structure for requesting resource provisioning.
  * 'modify' flag to be used when either requesting more
  * or detach partial of a certain resource type.
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 62291c698..dfa8cd205 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -90,6 +90,30 @@ nix_lf_alloc(struct otx2_eth_dev *dev, uint32_t nb_rxq, 
uint32_t nb_txq)
return 0;
 }

+static int
+nix_lf_switch_header_type_enable(struct otx2_eth_dev *dev)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+   struct npc_set_pkind *req;
+   struct msg_resp *rsp;
+   int rc;
+
+   if (dev->npc_flow.switch_header_type == 0)
+   return 0;
+
+   /* Notify AF about higig2 config */
+   req = otx2_mbox_alloc_msg_npc_set_pkind(mbox);
+   req->mode = dev->npc_flow.switch_header_type;
+   req->dir = PKIND_RX;
+   rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
+   if (rc)
+   return rc;
+   req = otx2_mbox_alloc_msg_npc_set_pkind(mbox);
+   req->mode = dev->npc_flow.switch_header_type;
+   req->dir = PKIND_TX;
+   return otx2_mbox_process_msg(mbox, (void *)&rsp);
+}
+
 static int
 nix_lf_free(struct otx2_eth_dev *dev)
 {
@@ -1612,6 +1636,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto fail_offloads;
}

+   rc = nix_lf_switch_header_type_enable(dev);
+   if (rc) {
+   otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
+   goto free_nix_lf;
+   }

[dpdk-dev] [PATCH v2 2/2] net/octeontx2: add support to parse higig2 hdr

[kirankumark]

From: Kiran Kumar K 

Adding support to parse higig2 header in RTE flow for octeontx2.
And added devargs to configure port for higig2.

Signed-off-by: Kiran Kumar K 
---
V2 Changes:
* Fixed checkpatch issue

 doc/guides/nics/octeontx2.rst   |  2 ++
 drivers/common/octeontx2/hw/otx2_npc.h  |  2 ++
 drivers/net/octeontx2/otx2_flow.c   |  1 +
 drivers/net/octeontx2/otx2_flow.h   |  3 ++
 drivers/net/octeontx2/otx2_flow_parse.c | 47 +
 5 files changed, 55 insertions(+)

diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
index adf7c7131..eb7aaa468 100644
--- a/doc/guides/nics/octeontx2.rst
+++ b/doc/guides/nics/octeontx2.rst
@@ -288,6 +288,8 @@ Patterns:
+++
| 23 | RTE_FLOW_ITEM_TYPE_GRE_KEY |
+++
+   | 24 | RTE_FLOW_ITEM_TYPE_HIGIG2  |
+   +++

 .. note::

diff --git a/drivers/common/octeontx2/hw/otx2_npc.h 
b/drivers/common/octeontx2/hw/otx2_npc.h
index 5b8d3ed8c..a0536e0ae 100644
--- a/drivers/common/octeontx2/hw/otx2_npc.h
+++ b/drivers/common/octeontx2/hw/otx2_npc.h
@@ -182,6 +182,8 @@ enum npc_kpu_la_ltype {
NPC_LT_LA_IH_8_ETHER,
NPC_LT_LA_IH_4_ETHER,
NPC_LT_LA_IH_2_ETHER,
+   NPC_LT_LA_HIGIG2_ETHER,
+   NPC_LT_LA_IH_NIX_HIGIG2_ETHER,
 };

 enum npc_kpu_lb_ltype {
diff --git a/drivers/net/octeontx2/otx2_flow.c 
b/drivers/net/octeontx2/otx2_flow.c
index bdbf123a9..f1fb9f988 100644
--- a/drivers/net/octeontx2/otx2_flow.c
+++ b/drivers/net/octeontx2/otx2_flow.c
@@ -325,6 +325,7 @@ flow_parse_pattern(struct rte_eth_dev *dev,
 {
flow_parse_stage_func_t parse_stage_funcs[] = {
flow_parse_meta_items,
+   otx2_flow_parse_higig2_hdr,
otx2_flow_parse_la,
otx2_flow_parse_lb,
otx2_flow_parse_lc,
diff --git a/drivers/net/octeontx2/otx2_flow.h 
b/drivers/net/octeontx2/otx2_flow.h
index 6bfd5afde..df78f41d3 100644
--- a/drivers/net/octeontx2/otx2_flow.h
+++ b/drivers/net/octeontx2/otx2_flow.h
@@ -29,6 +29,7 @@ enum {

 #define NPC_IH_LENGTH  8
 #define NPC_TPID_LENGTH2
+#define NPC_HIGIG2_LENGTH  16
 #define NPC_COUNTER_NONE   (-1)
 /* 32 bytes from LDATA_CFG & 32 bytes from FLAGS_CFG */
 #define NPC_MAX_EXTRACT_DATA_LEN   (64)
@@ -382,6 +383,8 @@ int otx2_flow_parse_lb(struct otx2_parse_state *pst);

 int otx2_flow_parse_la(struct otx2_parse_state *pst);

+int otx2_flow_parse_higig2_hdr(struct otx2_parse_state *pst);
+
 int otx2_flow_parse_actions(struct rte_eth_dev *dev,
const struct rte_flow_attr *attr,
const struct rte_flow_action actions[],
diff --git a/drivers/net/octeontx2/otx2_flow_parse.c 
b/drivers/net/octeontx2/otx2_flow_parse.c
index 2cba0a447..b7b7b6127 100644
--- a/drivers/net/octeontx2/otx2_flow_parse.c
+++ b/drivers/net/octeontx2/otx2_flow_parse.c
@@ -675,6 +675,15 @@ otx2_flow_parse_la(struct otx2_parse_state *pst)
if (pst->flow->nix_intf == NIX_INTF_TX) {
lt = NPC_LT_LA_IH_NIX_ETHER;
info.hw_hdr_len = NPC_IH_LENGTH;
+   if (pst->npc->switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+   lt = NPC_LT_LA_IH_NIX_HIGIG2_ETHER;
+   info.hw_hdr_len += NPC_HIGIG2_LENGTH;
+   }
+   } else {
+   if (pst->npc->switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+   lt = NPC_LT_LA_HIGIG2_ETHER;
+   info.hw_hdr_len = NPC_HIGIG2_LENGTH;
+   }
}

/* Prepare for parsing the item */
@@ -694,6 +703,44 @@ otx2_flow_parse_la(struct otx2_parse_state *pst)
return otx2_flow_update_parse_state(pst, &info, lid, lt, 0);
 }

+int
+otx2_flow_parse_higig2_hdr(struct otx2_parse_state *pst)
+{
+   struct rte_flow_item_higig2_hdr hw_mask;
+   struct otx2_flow_item_info info;
+   int lid, lt;
+   int rc;
+
+   /* Identify the pattern type into lid, lt */
+   if (pst->pattern->type != RTE_FLOW_ITEM_TYPE_HIGIG2)
+   return 0;
+
+   lid = NPC_LID_LA;
+   lt = NPC_LT_LA_HIGIG2_ETHER;
+   info.hw_hdr_len = 0;
+
+   if (pst->flow->nix_intf == NIX_INTF_TX) {
+   lt = NPC_LT_LA_IH_NIX_HIGIG2_ETHER;
+   info.hw_hdr_len = NPC_IH_LENGTH;
+   }
+
+   /* Prepare for parsing the item */
+   info.def_mask = &rte_flow_item_higig2_hdr_mask;
+   info.hw_mask = &hw_mask;
+   info.len = sizeof(struct rte_flow_item_higig2_hdr);
+   otx2_flow_get_hw_supp_mask(pst, &info, lid, lt);
+   info.spec = NULL;
+   info.mask = NULL;
+
+   /* Basic validation of item parameters */
+   rc = otx2_flow_parse_item_basic(pst->pattern, &info, pst->error);
+   if (rc)
+   return rc;
+
+   /* Update pst if not validate only? clash c

[dpdk-dev] [PATCH v2] app/test-pmd: add support for tx and rx desc statu

[kirankumark]

From: Kiran Kumar K 

Adding support to check TX and RX descriptor status.

Signed-off-by: Kiran Kumar K 
---
V2 Changes:
* Merged rx and tx command line tags
* added desc tag for descriptor id
* Added help string

 app/test-pmd/cmdline.c  | 100 
 doc/guides/testpmd_app_ug/testpmd_funcs.rst |   8 ++
 2 files changed, 108 insertions(+)

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 447806991..c82a1a79c 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -240,6 +240,9 @@ static void cmd_help_long_parsed(void *parsed_result,

"show device info (|all)"
"   Show general information about devices 
probed.\n\n"
+
+   "show port (port_id) rxq|txq (queue_id) desc (desc_id) 
status"
+   "   Show status of rx|tx descriptor.\n\n"
);
}

@@ -18915,6 +18918,102 @@ cmdline_parse_inst_t cmd_show_port_supported_ptypes = 
{
},
 };

+/* *** display rx/tx descriptor status *** */
+struct cmd_show_rx_tx_desc_status_result {
+   cmdline_fixed_string_t cmd_show;
+   cmdline_fixed_string_t cmd_port;
+   cmdline_fixed_string_t cmd_keyword;
+   cmdline_fixed_string_t cmd_desc;
+   cmdline_fixed_string_t cmd_status;
+   portid_t cmd_pid;
+   portid_t cmd_qid;
+   portid_t cmd_did;
+};
+
+static void
+cmd_show_rx_tx_desc_status_parsed(void *parsed_result,
+   __attribute__((unused)) struct cmdline *cl,
+   __attribute__((unused)) void *data)
+{
+   struct cmd_show_rx_tx_desc_status_result *res = parsed_result;
+   int rc;
+
+   if (!rte_eth_dev_is_valid_port(res->cmd_pid)) {
+   printf("invalid port id %u\n", res->cmd_pid);
+   return;
+   }
+
+   if (!strcmp(res->cmd_keyword, "rxq")) {
+   rc = rte_eth_rx_descriptor_status(res->cmd_pid, res->cmd_qid,
+res->cmd_did);
+   if (rc < 0) {
+   printf("Invalid queueid = %d\n", res->cmd_qid);
+   return;
+   }
+   if (rc == RTE_ETH_RX_DESC_AVAIL)
+   printf("Desc status = AVAILABLE\n");
+   else if (rc == RTE_ETH_RX_DESC_DONE)
+   printf("Desc status = DONE\n");
+   else
+   printf("Desc status = UNAVAILABLE\n");
+   } else if (!strcmp(res->cmd_keyword, "txq")) {
+   rc = rte_eth_tx_descriptor_status(res->cmd_pid, res->cmd_qid,
+res->cmd_did);
+   if (rc < 0) {
+   printf("Invalid queueid = %d\n", res->cmd_qid);
+   return;
+   }
+   if (rc == RTE_ETH_TX_DESC_FULL)
+   printf("Desc status = FULL\n");
+   else if (rc == RTE_ETH_TX_DESC_DONE)
+   printf("Desc status = DONE\n");
+   else
+   printf("Desc status = UNAVAILABLE\n");
+   }
+}
+
+cmdline_parse_token_string_t cmd_show_rx_tx_desc_status_show =
+   TOKEN_STRING_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_show, "show");
+cmdline_parse_token_string_t cmd_show_rx_tx_desc_status_port =
+   TOKEN_STRING_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_port, "port");
+cmdline_parse_token_num_t cmd_show_rx_tx_desc_status_pid =
+   TOKEN_NUM_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_pid, UINT16);
+cmdline_parse_token_string_t cmd_show_rx_tx_desc_status_keyword =
+   TOKEN_STRING_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_keyword, "rxq#txq");
+cmdline_parse_token_num_t cmd_show_rx_tx_desc_status_qid =
+   TOKEN_NUM_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_qid, UINT16);
+cmdline_parse_token_string_t cmd_show_rx_tx_desc_status_desc =
+   TOKEN_STRING_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_desc, "desc");
+cmdline_parse_token_num_t cmd_show_rx_tx_desc_status_did =
+   TOKEN_NUM_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_did, UINT16);
+cmdline_parse_token_string_t cmd_show_rx_tx_desc_status_status =
+   TOKEN_STRING_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_status, "status");
+cmdline_parse_inst_t cmd_show_rx_tx_desc_status = {
+   .f = cmd_show_rx_tx_desc_status_parsed,
+   .data = NULL,
+   .help_str = "show port  rxq|txq  desc  "
+   "status",
+   .tokens = {
+   (void *)&cmd_show_rx_tx_desc_status_show,
+   (void *)&cmd_show_rx_tx_desc_status_port,
+   (void *)&cmd_show_rx_tx_desc_status_pid,
+   (void

[dpdk-dev] [PATCH] net/octeontx2: add PF and VF action support

[kirankumark]

From: Kiran Kumar K 

Adding PF and VF action support for octeontx2 Flow.
If RTE_FLOW_ACTION_TYPE_PF action is set from VF, then the packet
will be sent to the parent PF.
If RTE_FLOW_ACTION_TYPE_VF action is set and original is specified,
then the packet will be sent to the original VF, otherwise the packet
will be sent to the VF specified in the vf_id.

Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/octeontx2.rst   |  4 
 drivers/net/octeontx2/otx2_flow.h   |  2 ++
 drivers/net/octeontx2/otx2_flow_parse.c | 32 ++---
 3 files changed, 35 insertions(+), 3 deletions(-)

diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
index a8ed3838f..fbf4c4726 100644
--- a/doc/guides/nics/octeontx2.rst
+++ b/doc/guides/nics/octeontx2.rst
@@ -292,6 +292,10 @@ Actions:
+++
| 8  | RTE_FLOW_ACTION_TYPE_SECURITY  |
+++
+   | 9  | RTE_FLOW_ACTION_TYPE_PF|
+   +++
+   | 10 | RTE_FLOW_ACTION_TYPE_VF|
+   +++
 
 .. _table_octeontx2_supported_egress_action_types:
 
diff --git a/drivers/net/octeontx2/otx2_flow.h 
b/drivers/net/octeontx2/otx2_flow.h
index f5cc3b983..a27ceeb1a 100644
--- a/drivers/net/octeontx2/otx2_flow.h
+++ b/drivers/net/octeontx2/otx2_flow.h
@@ -52,6 +52,8 @@ enum {
 #define OTX2_FLOW_ACT_DUP (1 << 5)
 #define OTX2_FLOW_ACT_SEC (1 << 6)
 #define OTX2_FLOW_ACT_COUNT   (1 << 7)
+#define OTX2_FLOW_ACT_PF  (1 << 8)
+#define OTX2_FLOW_ACT_VF  (1 << 9)
 
 /* terminating actions */
 #define OTX2_FLOW_ACT_TERM(OTX2_FLOW_ACT_DROP  | \
diff --git a/drivers/net/octeontx2/otx2_flow_parse.c 
b/drivers/net/octeontx2/otx2_flow_parse.c
index 1940cc636..3e6f5b8df 100644
--- a/drivers/net/octeontx2/otx2_flow_parse.c
+++ b/drivers/net/octeontx2/otx2_flow_parse.c
@@ -751,15 +751,17 @@ otx2_flow_parse_actions(struct rte_eth_dev *dev,
const struct rte_flow_action_count *act_count;
const struct rte_flow_action_mark *act_mark;
const struct rte_flow_action_queue *act_q;
+   const struct rte_flow_action_vf *vf_act;
const char *errmsg = NULL;
int sel_act, req_act = 0;
-   uint16_t pf_func;
+   uint16_t pf_func, vf_id;
int errcode = 0;
int mark = 0;
int rq = 0;
 
/* Initialize actions */
flow->ctr_id = NPC_COUNTER_NONE;
+   pf_func = otx2_pfvf_func(hw->pf, hw->vf);
 
for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
otx2_npc_dbg("Action type = %d", actions->type);
@@ -807,6 +809,27 @@ otx2_flow_parse_actions(struct rte_eth_dev *dev,
req_act |= OTX2_FLOW_ACT_DROP;
break;
 
+   case RTE_FLOW_ACTION_TYPE_PF:
+   req_act |= OTX2_FLOW_ACT_PF;
+   pf_func &= (0xfc00);
+   break;
+
+   case RTE_FLOW_ACTION_TYPE_VF:
+   vf_act = (const struct rte_flow_action_vf *)
+   actions->conf;
+   req_act |= OTX2_FLOW_ACT_VF;
+   if (vf_act->original == 0) {
+   vf_id = (vf_act->id & RVU_PFVF_FUNC_MASK) + 1;
+   if (vf_id  >= hw->maxvf) {
+   errmsg = "invalid vf specified";
+   errcode = EINVAL;
+   goto err_exit;
+   }
+   pf_func &= (0xfc00);
+   pf_func = (pf_func | vf_id);
+   }
+   break;
+
case RTE_FLOW_ACTION_TYPE_QUEUE:
/* Applicable only to ingress flow */
act_q = (const struct rte_flow_action_queue *)
@@ -902,7 +925,11 @@ otx2_flow_parse_actions(struct rte_eth_dev *dev,
}
 
/* Set NIX_RX_ACTIONOP */
-   if (req_act & OTX2_FLOW_ACT_DROP) {
+   if (req_act & (OTX2_FLOW_ACT_PF | OTX2_FLOW_ACT_VF)) {
+   flow->npc_action = NIX_RX_ACTIONOP_UCAST;
+   if (req_act & OTX2_FLOW_ACT_QUEUE)
+   flow->npc_action |= (uint64_t)rq << 20;
+   } else if (req_act & OTX2_FLOW_ACT_DROP) {
flow->npc_action = NIX_RX_ACTIONOP_DROP;
} else if (req_act & OTX2_FLOW_ACT_QUEUE) {
flow->npc_action = NIX_RX_ACTIONOP_UCAST;
@@ -946,7 +973,6 @@ otx2_flow_parse_actions(struct rte_eth_dev *dev,
 
 set_pf_func:
/* Ideally AF must ensure that correct pf_func is set */
-   pf_func = otx2_pfvf_func(hw->pf, hw->vf);
flow->npc_action |= (uint64_t)pf_func << 4;
 
return 0;
-- 
2.17.1

[dpdk-dev] [PATCH] ethdev: add HIGIG2 key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_higig2_hdr in order to match higig2 header.
It is a layer 2.5 protocol and used in broadcom switches.
Header format is based on the following document.
http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf

Signed-off-by: Kiran Kumar K 
---
 doc/guides/prog_guide/rte_flow.rst |  8 
 lib/librte_ethdev/rte_flow.c   |  1 +
 lib/librte_ethdev/rte_flow.h   | 77 ++
 3 files changed, 86 insertions(+)

diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 1c837ff13..71365b159 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1290,6 +1290,14 @@ Matches a IP Authentication Header (RFC 4302).
 - Default ``mask`` matches spi.
 
 
+Item: ``HIGIG2``
+^
+
+Matches a HIGIG2 header field. It is layer 2.5 protocol and used in
+broadcom switches.
+
+- Default ``mask`` matches classification and vlan.
+
 Actions
 ~~~
 
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 81a85b995..ca0f68016 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -83,6 +83,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
MK_FLOW_ITEM(AH, sizeof(struct rte_flow_item_ah)),
+   MK_FLOW_ITEM(HIGIG2, sizeof(struct rte_flow_item_higig2_hdr)),
 };
 
 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index bcfc06cdc..59e37f714 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -491,6 +491,12 @@ enum rte_flow_item_type {
 *
 */
RTE_FLOW_ITEM_TYPE_AH,
+
+   /**
+* Matches a HIGIG header.
+* see struct rte_flow_item_higig2_hdr.
+*/
+   RTE_FLOW_ITEM_TYPE_HIGIG2,
 };
 
 /**
@@ -515,6 +521,77 @@ static const struct rte_flow_item_any 
rte_flow_item_any_mask = {
 };
 #endif
 
+/**
+ * RTE_FLOW_ITEM_TYPE_HIGIG2
+ * Matches higig2 header.
+ */
+struct rte_higig2_frc {
+   uint32_t ksop:8;
+   uint32_t resv:3;
+   uint32_t mcst:1;
+   uint32_t tc:4;
+   uint32_t dst_modid:8;
+   uint32_t dst_pid:8;
+   uint32_t src_modid:8;
+   uint32_t src_pid:8;
+   uint32_t lbid:8;
+   uint32_t dp:2;
+   uint32_t resv1:3;
+   uint32_t ppd_type:3;
+} __attribute__((packed));
+
+struct rte_higig2_ppt_type0 {
+   uint32_t dst_t:1;
+   uint32_t dst_tgid:3;
+   uint32_t ingress_tagged:1;
+   uint32_t mirror_only:1;
+   uint32_t mirror_done:1;
+   uint32_t mirror:1;
+   uint32_t res:2;
+   uint32_t l3:1;
+   uint32_t label_present:1;
+   uint32_t vc_label2:4;
+   uint32_t vc_label1:8;
+   uint32_t vc_label0:8;
+   uint32_t vid_high:8;
+   uint32_t vid_low:8;
+   uint32_t pfm:2;
+   uint32_t src_t:1;
+   uint32_t res1:2;
+   uint32_t opcode:3;
+   uint32_t hdr_ext_len:3;
+   uint32_t res2:5;
+} __attribute__((packed));
+
+struct rte_higig2_ppt_type1 {
+   uint32_t classification:16;
+   uint32_t resv:16;
+   uint32_t vid:16;
+   uint32_t pfm:2;
+   uint32_t src_t:1;
+   uint32_t resv1:2;
+   uint32_t opcode:3;
+   uint32_t hdr_ext_len:3;
+   uint32_t resv2:5;
+} __attribute__((packed));
+
+RTE_STD_C11
+struct rte_flow_item_higig2_hdr {
+   struct rte_higig2_frc fcr;
+   union {
+   struct rte_higig2_ppt_type0 ppt0;
+   struct rte_higig2_ppt_type1 ppt1;
+   };
+} __attribute__((packed));
+
+/** Default mask for RTE_FLOW_ITEM_TYPE_HIGIG2. */
+#ifndef __cplusplus
+static const struct rte_flow_item_higig2_hdr rte_flow_item_higig2_hdr_mask = {
+   .ppt1.classification = 0x,
+   .ppt1.vid = 0xfff,
+};
+#endif
+
 /**
  * RTE_FLOW_ITEM_TYPE_VF
  *
-- 
2.17.1

[dpdk-dev] [PATCH] ethdev: add HIGIG2 key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_higig2_hdr in order to match higig2 header.
It is a layer 2.5 protocol and used in broadcom switches.
Header format is based on the following document.
http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf

Signed-off-by: Kiran Kumar K 
---

V2 Changes:
* Added support in testpmd to parse the higig2 item
* Moved the higig2 header to new file
* Added indentation in doc

 app/test-pmd/cmdline_flow.c|  33 +++
 doc/guides/prog_guide/rte_flow.rst |   8 ++
 lib/librte_ethdev/rte_flow.c   |   1 +
 lib/librte_ethdev/rte_flow.h   |   7 ++
 lib/librte_net/Makefile|   2 +-
 lib/librte_net/rte_higig.h | 138 +
 6 files changed, 188 insertions(+), 1 deletion(-)
 create mode 100644 lib/librte_net/rte_higig.h

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index b26b8bfe2..8d6c354fa 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -203,6 +203,9 @@ enum index {
ITEM_PPPOED,
ITEM_PPPOE_SEID,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,

/* Validate/create actions. */
ACTIONS,
@@ -675,6 +678,7 @@ static const enum index next_item[] = {
ITEM_PPPOES,
ITEM_PPPOED,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
END_SET,
ZERO,
 };
@@ -939,6 +943,13 @@ static const enum index item_pppoe_proto_id[] = {
ZERO,
 };

+static const enum index item_higig2[] = {
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,
+   ITEM_NEXT,
+   ZERO,
+};
+
 static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -2419,6 +2430,28 @@ static const struct token token_list[] = {
.next = NEXT(item_pppoe_proto_id),
.call = parse_vc,
},
+   [ITEM_HIGIG2] = {
+   .name = "higig2",
+   .help = "matches higig2 header",
+   .priv = PRIV_ITEM(HIGIG2,
+   sizeof(struct rte_flow_item_higig2_hdr)),
+   .next = NEXT(item_higig2),
+   .call = parse_vc,
+   },
+   [ITEM_HIGIG2_CLASSIFICATION] = {
+   .name = "classification",
+   .help = "matches classification of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   ppt1.classification)),
+   },
+   [ITEM_HIGIG2_VID] = {
+   .name = "vid",
+   .help = "matches vid of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   ppt1.vid)),
+   },
/* Validate/create actions. */
[ACTIONS] = {
.name = "actions",
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 1c837ff13..a47266c67 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1289,6 +1289,14 @@ Matches a IP Authentication Header (RFC 4302).
 - ``seq_num``: counter value increased by 1 on each packet sent.
 - Default ``mask`` matches spi.

+Item: ``HIGIG2``
+^
+
+Matches a HIGIG2 header field. It is layer 2.5 protocol and used in
+broadcom switches.
+
+- Default ``mask`` matches classification and vlan.
+

 Actions
 ~~~
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 81a85b995..ca0f68016 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -83,6 +83,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
MK_FLOW_ITEM(AH, sizeof(struct rte_flow_item_ah)),
+   MK_FLOW_ITEM(HIGIG2, sizeof(struct rte_flow_item_higig2_hdr)),
 };

 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index bcfc06cdc..79f160df0 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include 

 #ifdef __cplusplus
 extern "C" {
@@ -491,6 +492,12 @@ enum rte_flow_item_type {
 *
 */
RTE_FLOW_ITEM_TYPE_AH,
+
+   /**
+* Matches a HIGIG header.
+* see struct rte_flow_item_higig2_hdr.
+*/
+   RTE_FLOW_ITEM_TYPE_HIGIG2,
 };

 /**
diff --git a/lib/librte_net/Makefile b/lib/librte_net/Makefile
index 1244c9fd5..62735a5f9 100644
--- a/lib/librte_net/Makefile
+++ b/lib/librte_net/Makefile
@@ -21,6 +21,6 @@ SRCS-$(CONFIG_RTE_LIBRTE_NET) += rte_arp.c
 SYMLINK-$(CONFIG_RTE_LIBRTE_NET)-include := rte_ip.h rte_tcp.h rte_udp.h 
rte

[dpdk-dev] [PATCH v3] ethdev: add HIGIG2 key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_higig2_hdr in order to match higig2 header.
It is a layer 2.5 protocol and used in broadcom switches.
Header format is based on the following document.
http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf

Signed-off-by: Kiran Kumar K 
---
V3 Changes:
* Fixed Copyright header
* Fixed version info in the subject

V2 Changes:
* Added support in testpmd to parse the higig2 item
* Moved the higig2 header to new file
* Added indentation in doc

 app/test-pmd/cmdline_flow.c|  33 +++
 doc/guides/prog_guide/rte_flow.rst |   8 ++
 lib/librte_ethdev/rte_flow.c   |   1 +
 lib/librte_ethdev/rte_flow.h   |   7 ++
 lib/librte_net/Makefile|   2 +-
 lib/librte_net/rte_higig.h | 138 +
 6 files changed, 188 insertions(+), 1 deletion(-)
 create mode 100644 lib/librte_net/rte_higig.h

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index b26b8bfe2..8d6c354fa 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -203,6 +203,9 @@ enum index {
ITEM_PPPOED,
ITEM_PPPOE_SEID,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,

/* Validate/create actions. */
ACTIONS,
@@ -675,6 +678,7 @@ static const enum index next_item[] = {
ITEM_PPPOES,
ITEM_PPPOED,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
END_SET,
ZERO,
 };
@@ -939,6 +943,13 @@ static const enum index item_pppoe_proto_id[] = {
ZERO,
 };

+static const enum index item_higig2[] = {
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,
+   ITEM_NEXT,
+   ZERO,
+};
+
 static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -2419,6 +2430,28 @@ static const struct token token_list[] = {
.next = NEXT(item_pppoe_proto_id),
.call = parse_vc,
},
+   [ITEM_HIGIG2] = {
+   .name = "higig2",
+   .help = "matches higig2 header",
+   .priv = PRIV_ITEM(HIGIG2,
+   sizeof(struct rte_flow_item_higig2_hdr)),
+   .next = NEXT(item_higig2),
+   .call = parse_vc,
+   },
+   [ITEM_HIGIG2_CLASSIFICATION] = {
+   .name = "classification",
+   .help = "matches classification of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   ppt1.classification)),
+   },
+   [ITEM_HIGIG2_VID] = {
+   .name = "vid",
+   .help = "matches vid of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   ppt1.vid)),
+   },
/* Validate/create actions. */
[ACTIONS] = {
.name = "actions",
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 1c837ff13..a47266c67 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1289,6 +1289,14 @@ Matches a IP Authentication Header (RFC 4302).
 - ``seq_num``: counter value increased by 1 on each packet sent.
 - Default ``mask`` matches spi.

+Item: ``HIGIG2``
+^
+
+Matches a HIGIG2 header field. It is layer 2.5 protocol and used in
+broadcom switches.
+
+- Default ``mask`` matches classification and vlan.
+

 Actions
 ~~~
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 81a85b995..ca0f68016 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -83,6 +83,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
MK_FLOW_ITEM(AH, sizeof(struct rte_flow_item_ah)),
+   MK_FLOW_ITEM(HIGIG2, sizeof(struct rte_flow_item_higig2_hdr)),
 };

 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index bcfc06cdc..79f160df0 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include 

 #ifdef __cplusplus
 extern "C" {
@@ -491,6 +492,12 @@ enum rte_flow_item_type {
 *
 */
RTE_FLOW_ITEM_TYPE_AH,
+
+   /**
+* Matches a HIGIG header.
+* see struct rte_flow_item_higig2_hdr.
+*/
+   RTE_FLOW_ITEM_TYPE_HIGIG2,
 };

 /**
diff --git a/lib/librte_net/Makefile b/lib/librte_net/Makefile
index 1244c9fd5..62735a5f9 100644
--- a/lib/librte_net/Makefile
+++ b/lib/librte_net/Makefile
@@ -21,6 +21,6 @@ SRCS-$(CONFIG_RTE_LIBRTE_NET) += rte_arp.c
 SYML

[dpdk-dev] [PATCH v4] ethdev: add HIGIG2 key field to flow API

[kirankumark]

From: Kiran Kumar K 

Add new rte_flow_item_higig2_hdr in order to match higig2 header.
It is a layer 2.5 protocol and used in broadcom switches.
Header format is based on the following document.
http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf

Signed-off-by: Kiran Kumar K 
---
V4 Changes:
* Removed packed attribute

V3 Changes:
* Fixed Copyright header
* Fixed version info in the subject

V2 Changes:
* Added support in testpmd to parse the higig2 item
* Moved the higig2 header to new file
* Added indentation in doc

 app/test-pmd/cmdline_flow.c|  33 +++
 doc/guides/prog_guide/rte_flow.rst |   8 ++
 lib/librte_ethdev/rte_flow.c   |   1 +
 lib/librte_ethdev/rte_flow.h   |   7 ++
 lib/librte_net/Makefile|   2 +-
 lib/librte_net/rte_higig.h | 138 +
 6 files changed, 188 insertions(+), 1 deletion(-)
 create mode 100644 lib/librte_net/rte_higig.h

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index b26b8bfe2..8d6c354fa 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -203,6 +203,9 @@ enum index {
ITEM_PPPOED,
ITEM_PPPOE_SEID,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,

/* Validate/create actions. */
ACTIONS,
@@ -675,6 +678,7 @@ static const enum index next_item[] = {
ITEM_PPPOES,
ITEM_PPPOED,
ITEM_PPPOE_PROTO_ID,
+   ITEM_HIGIG2,
END_SET,
ZERO,
 };
@@ -939,6 +943,13 @@ static const enum index item_pppoe_proto_id[] = {
ZERO,
 };

+static const enum index item_higig2[] = {
+   ITEM_HIGIG2_CLASSIFICATION,
+   ITEM_HIGIG2_VID,
+   ITEM_NEXT,
+   ZERO,
+};
+
 static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -2419,6 +2430,28 @@ static const struct token token_list[] = {
.next = NEXT(item_pppoe_proto_id),
.call = parse_vc,
},
+   [ITEM_HIGIG2] = {
+   .name = "higig2",
+   .help = "matches higig2 header",
+   .priv = PRIV_ITEM(HIGIG2,
+   sizeof(struct rte_flow_item_higig2_hdr)),
+   .next = NEXT(item_higig2),
+   .call = parse_vc,
+   },
+   [ITEM_HIGIG2_CLASSIFICATION] = {
+   .name = "classification",
+   .help = "matches classification of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   ppt1.classification)),
+   },
+   [ITEM_HIGIG2_VID] = {
+   .name = "vid",
+   .help = "matches vid of higig2 header",
+   .next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+   .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+   ppt1.vid)),
+   },
/* Validate/create actions. */
[ACTIONS] = {
.name = "actions",
diff --git a/doc/guides/prog_guide/rte_flow.rst 
b/doc/guides/prog_guide/rte_flow.rst
index 1c837ff13..a47266c67 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1289,6 +1289,14 @@ Matches a IP Authentication Header (RFC 4302).
 - ``seq_num``: counter value increased by 1 on each packet sent.
 - Default ``mask`` matches spi.

+Item: ``HIGIG2``
+^
+
+Matches a HIGIG2 header field. It is layer 2.5 protocol and used in
+broadcom switches.
+
+- Default ``mask`` matches classification and vlan.
+

 Actions
 ~~~
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 81a85b995..ca0f68016 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -83,6 +83,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = 
{
MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
MK_FLOW_ITEM(AH, sizeof(struct rte_flow_item_ah)),
+   MK_FLOW_ITEM(HIGIG2, sizeof(struct rte_flow_item_higig2_hdr)),
 };

 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index bcfc06cdc..79f160df0 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include 

 #ifdef __cplusplus
 extern "C" {
@@ -491,6 +492,12 @@ enum rte_flow_item_type {
 *
 */
RTE_FLOW_ITEM_TYPE_AH,
+
+   /**
+* Matches a HIGIG header.
+* see struct rte_flow_item_higig2_hdr.
+*/
+   RTE_FLOW_ITEM_TYPE_HIGIG2,
 };

 /**
diff --git a/lib/librte_net/Makefile b/lib/librte_net/Makefile
index 1244c9fd5..62735a5f9 100644
--- a/lib/librte_net/Makefile
+++ b/lib/librte_net/Makefile
@@ -21,6 +21,6 @@ SRCS-$(C

[dpdk-dev] [PATCH v3] kni: add IOVA va support for kni

[kirankumark]

From: Kiran Kumar K 

With current KNI implementation kernel module will work only in
IOVA=PA mode. This patch will add support for kernel module to work
with IOVA=VA mode.

The idea is to get the physical address from iova address using
api iommu_iova_to_phys. Using this API, we will get the physical
address from iova address and later use phys_to_virt API to
convert the physical address to kernel virtual address.

With this approach we have compared the performance with IOVA=PA
and there is no difference observed. Seems like kernel is the
overhead.

Signed-off-by: Kiran Kumar K 
---

V3 Changes:
* Add new approach to work kni with IOVA=VA mode using
iommu_iova_to_phys API.

 kernel/linux/kni/kni_dev.h|  4 +
 kernel/linux/kni/kni_misc.c   | 57 +++---
 kernel/linux/kni/kni_net.c| 76 +++
 lib/librte_eal/linux/eal/eal.c|  9 ---
 .../linux/eal/include/rte_kni_common.h|  1 +
 lib/librte_kni/rte_kni.c  |  2 +
 6 files changed, 116 insertions(+), 33 deletions(-)

diff --git a/kernel/linux/kni/kni_dev.h b/kernel/linux/kni/kni_dev.h
index df46aa70e..9c4944921 100644
--- a/kernel/linux/kni/kni_dev.h
+++ b/kernel/linux/kni/kni_dev.h
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 

 #include 
 #define KNI_KTHREAD_RESCHEDULE_INTERVAL 5 /* us */
@@ -39,6 +40,9 @@ struct kni_dev {
/* kni list */
struct list_head list;

+   uint8_t iova_mode;
+   struct iommu_domain *domain;
+
struct net_device_stats stats;
int status;
uint16_t group_id;   /* Group ID of a group of KNI devices */
diff --git a/kernel/linux/kni/kni_misc.c b/kernel/linux/kni/kni_misc.c
index 31845e10f..de4f6ce41 100644
--- a/kernel/linux/kni/kni_misc.c
+++ b/kernel/linux/kni/kni_misc.c
@@ -306,10 +306,12 @@ kni_ioctl_create(struct net *net, uint32_t ioctl_num,
struct rte_kni_device_info dev_info;
struct net_device *net_dev = NULL;
struct kni_dev *kni, *dev, *n;
+   struct pci_dev *pci = NULL;
+   struct iommu_domain *domain = NULL;
+   phys_addr_t phys_addr;
 #ifdef RTE_KNI_KMOD_ETHTOOL
struct pci_dev *found_pci = NULL;
struct net_device *lad_dev = NULL;
-   struct pci_dev *pci = NULL;
 #endif

pr_info("Creating kni...\n");
@@ -368,15 +370,50 @@ kni_ioctl_create(struct net *net, uint32_t ioctl_num,
strncpy(kni->name, dev_info.name, RTE_KNI_NAMESIZE);

/* Translate user space info into kernel space info */
-   kni->tx_q = phys_to_virt(dev_info.tx_phys);
-   kni->rx_q = phys_to_virt(dev_info.rx_phys);
-   kni->alloc_q = phys_to_virt(dev_info.alloc_phys);
-   kni->free_q = phys_to_virt(dev_info.free_phys);
-
-   kni->req_q = phys_to_virt(dev_info.req_phys);
-   kni->resp_q = phys_to_virt(dev_info.resp_phys);
-   kni->sync_va = dev_info.sync_va;
-   kni->sync_kva = phys_to_virt(dev_info.sync_phys);
+
+   if (dev_info.iova_mode) {
+   pci = pci_get_device(dev_info.vendor_id,
+dev_info.device_id, NULL);
+   while (pci) {
+   if ((pci->bus->number == dev_info.bus) &&
+   (PCI_SLOT(pci->devfn) == dev_info.devid) &&
+   (PCI_FUNC(pci->devfn) == dev_info.function)) {
+   domain = iommu_get_domain_for_dev(&pci->dev);
+   break;
+   }
+   pci = pci_get_device(dev_info.vendor_id,
+dev_info.device_id, pci);
+   }
+   kni->domain = domain;
+   phys_addr = iommu_iova_to_phys(domain, dev_info.tx_phys);
+   kni->tx_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.rx_phys);
+   kni->rx_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.alloc_phys);
+   kni->alloc_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.free_phys);
+   kni->free_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.req_phys);
+   kni->req_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.resp_phys);
+   kni->resp_q = phys_to_virt(phys_addr);
+   kni->sync_va = dev_info.sync_va;
+   phys_addr = iommu_iova_to_phys(domain, dev_info.sync_phys);
+   kni->sync_kva = phys_to_virt(phys_addr);
+   kni->iova_mode = 1;
+
+   } else {
+   kni->tx_q = phys_to_virt(dev_info.tx_phys);
+   kni->rx_q = phys_to_virt(dev_info.rx_phys);
+   kni->alloc_q = phys_to_virt(dev_info.alloc_phys);
+   kni->free_q = phys_to_virt(dev_info.free_phys);
+

[dpdk-dev] [PATCH v4] kni: add IOVA va support for kni

[kirankumark]

From: Kiran Kumar K 

With current KNI implementation kernel module will work only in
IOVA=PA mode. This patch will add support for kernel module to work
with IOVA=VA mode.

The idea is to get the physical address from iova address using
api iommu_iova_to_phys. Using this API, we will get the physical
address from iova address and later use phys_to_virt API to
convert the physical address to kernel virtual address.

With this approach we have compared the performance with IOVA=PA
and there is no difference observed. Seems like kernel is the
overhead.

This approach will not work with the kernel versions less than 4.4.0
because of API compatibility issues.

Signed-off-by: Kiran Kumar K 
---
V4 changes:
* Fixed build issues with older kernel versions
* This approach will only work with kernel above 4.4.0


V3 Changes:
* Add new approach to work kni with IOVA=VA mode using
iommu_iova_to_phys API.

 kernel/linux/kni/kni_dev.h|  4 +
 kernel/linux/kni/kni_misc.c   | 63 ---
 kernel/linux/kni/kni_net.c| 76 +++
 lib/librte_eal/linux/eal/eal.c|  9 ---
 .../linux/eal/include/rte_kni_common.h|  1 +
 lib/librte_kni/rte_kni.c  |  2 +
 6 files changed, 122 insertions(+), 33 deletions(-)

diff --git a/kernel/linux/kni/kni_dev.h b/kernel/linux/kni/kni_dev.h
index df46aa70e..9c4944921 100644
--- a/kernel/linux/kni/kni_dev.h
+++ b/kernel/linux/kni/kni_dev.h
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 

 #include 
 #define KNI_KTHREAD_RESCHEDULE_INTERVAL 5 /* us */
@@ -39,6 +40,9 @@ struct kni_dev {
/* kni list */
struct list_head list;

+   uint8_t iova_mode;
+   struct iommu_domain *domain;
+
struct net_device_stats stats;
int status;
uint16_t group_id;   /* Group ID of a group of KNI devices */
diff --git a/kernel/linux/kni/kni_misc.c b/kernel/linux/kni/kni_misc.c
index 31845e10f..9e90af31b 100644
--- a/kernel/linux/kni/kni_misc.c
+++ b/kernel/linux/kni/kni_misc.c
@@ -306,10 +306,12 @@ kni_ioctl_create(struct net *net, uint32_t ioctl_num,
struct rte_kni_device_info dev_info;
struct net_device *net_dev = NULL;
struct kni_dev *kni, *dev, *n;
+   struct pci_dev *pci = NULL;
+   struct iommu_domain *domain = NULL;
+   phys_addr_t phys_addr;
 #ifdef RTE_KNI_KMOD_ETHTOOL
struct pci_dev *found_pci = NULL;
struct net_device *lad_dev = NULL;
-   struct pci_dev *pci = NULL;
 #endif

pr_info("Creating kni...\n");
@@ -368,15 +370,56 @@ kni_ioctl_create(struct net *net, uint32_t ioctl_num,
strncpy(kni->name, dev_info.name, RTE_KNI_NAMESIZE);

/* Translate user space info into kernel space info */
-   kni->tx_q = phys_to_virt(dev_info.tx_phys);
-   kni->rx_q = phys_to_virt(dev_info.rx_phys);
-   kni->alloc_q = phys_to_virt(dev_info.alloc_phys);
-   kni->free_q = phys_to_virt(dev_info.free_phys);
-
-   kni->req_q = phys_to_virt(dev_info.req_phys);
-   kni->resp_q = phys_to_virt(dev_info.resp_phys);
-   kni->sync_va = dev_info.sync_va;
-   kni->sync_kva = phys_to_virt(dev_info.sync_phys);
+
+   if (dev_info.iova_mode) {
+#if KERNEL_VERSION(4, 4, 0) > LINUX_VERSION_CODE
+   (void)pci;
+   pr_err("Kernel version is not supported\n");
+   return -EINVAL;
+#else
+   pci = pci_get_device(dev_info.vendor_id,
+dev_info.device_id, NULL);
+   while (pci) {
+   if ((pci->bus->number == dev_info.bus) &&
+   (PCI_SLOT(pci->devfn) == dev_info.devid) &&
+   (PCI_FUNC(pci->devfn) == dev_info.function)) {
+   domain = iommu_get_domain_for_dev(&pci->dev);
+   break;
+   }
+   pci = pci_get_device(dev_info.vendor_id,
+dev_info.device_id, pci);
+   }
+#endif
+   kni->domain = domain;
+   phys_addr = iommu_iova_to_phys(domain, dev_info.tx_phys);
+   kni->tx_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.rx_phys);
+   kni->rx_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.alloc_phys);
+   kni->alloc_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.free_phys);
+   kni->free_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.req_phys);
+   kni->req_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.resp_phys);
+   kni->resp_q = phys_to_virt(phys_addr);
+   kni->sync_va = dev_info.sync_va;
+   phys_addr = io

[dpdk-dev] [PATCH v5] kni: add IOVA va support for kni

[kirankumark]

From: Kiran Kumar K 

With current KNI implementation kernel module will work only in
IOVA=PA mode. This patch will add support for kernel module to work
with IOVA=VA mode.

The idea is to get the physical address from iova address using
api iommu_iova_to_phys. Using this API, we will get the physical
address from iova address and later use phys_to_virt API to
convert the physical address to kernel virtual address.

With this approach we have compared the performance with IOVA=PA
and there is no difference observed. Seems like kernel is the
overhead.

This approach will not work with the kernel versions less than 4.4.0
because of API compatibility issues.

Signed-off-by: Kiran Kumar K 
---
V5 changes:
* Fixed build issue with 32b build

V4 changes:
* Fixed build issues with older kernel versions
* This approach will only work with kernel above 4.4.0

V3 Changes:
* Add new approach to work kni with IOVA=VA mode using
iommu_iova_to_phys API.

 kernel/linux/kni/kni_dev.h|  4 +
 kernel/linux/kni/kni_misc.c   | 63 ---
 kernel/linux/kni/kni_net.c| 76 +++
 lib/librte_eal/linux/eal/eal.c|  9 ---
 .../linux/eal/include/rte_kni_common.h|  1 +
 lib/librte_kni/rte_kni.c  |  2 +
 6 files changed, 122 insertions(+), 33 deletions(-)

diff --git a/kernel/linux/kni/kni_dev.h b/kernel/linux/kni/kni_dev.h
index df46aa70e..9c4944921 100644
--- a/kernel/linux/kni/kni_dev.h
+++ b/kernel/linux/kni/kni_dev.h
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 

 #include 
 #define KNI_KTHREAD_RESCHEDULE_INTERVAL 5 /* us */
@@ -39,6 +40,9 @@ struct kni_dev {
/* kni list */
struct list_head list;

+   uint8_t iova_mode;
+   struct iommu_domain *domain;
+
struct net_device_stats stats;
int status;
uint16_t group_id;   /* Group ID of a group of KNI devices */
diff --git a/kernel/linux/kni/kni_misc.c b/kernel/linux/kni/kni_misc.c
index 31845e10f..9e90af31b 100644
--- a/kernel/linux/kni/kni_misc.c
+++ b/kernel/linux/kni/kni_misc.c
@@ -306,10 +306,12 @@ kni_ioctl_create(struct net *net, uint32_t ioctl_num,
struct rte_kni_device_info dev_info;
struct net_device *net_dev = NULL;
struct kni_dev *kni, *dev, *n;
+   struct pci_dev *pci = NULL;
+   struct iommu_domain *domain = NULL;
+   phys_addr_t phys_addr;
 #ifdef RTE_KNI_KMOD_ETHTOOL
struct pci_dev *found_pci = NULL;
struct net_device *lad_dev = NULL;
-   struct pci_dev *pci = NULL;
 #endif

pr_info("Creating kni...\n");
@@ -368,15 +370,56 @@ kni_ioctl_create(struct net *net, uint32_t ioctl_num,
strncpy(kni->name, dev_info.name, RTE_KNI_NAMESIZE);

/* Translate user space info into kernel space info */
-   kni->tx_q = phys_to_virt(dev_info.tx_phys);
-   kni->rx_q = phys_to_virt(dev_info.rx_phys);
-   kni->alloc_q = phys_to_virt(dev_info.alloc_phys);
-   kni->free_q = phys_to_virt(dev_info.free_phys);
-
-   kni->req_q = phys_to_virt(dev_info.req_phys);
-   kni->resp_q = phys_to_virt(dev_info.resp_phys);
-   kni->sync_va = dev_info.sync_va;
-   kni->sync_kva = phys_to_virt(dev_info.sync_phys);
+
+   if (dev_info.iova_mode) {
+#if KERNEL_VERSION(4, 4, 0) > LINUX_VERSION_CODE
+   (void)pci;
+   pr_err("Kernel version is not supported\n");
+   return -EINVAL;
+#else
+   pci = pci_get_device(dev_info.vendor_id,
+dev_info.device_id, NULL);
+   while (pci) {
+   if ((pci->bus->number == dev_info.bus) &&
+   (PCI_SLOT(pci->devfn) == dev_info.devid) &&
+   (PCI_FUNC(pci->devfn) == dev_info.function)) {
+   domain = iommu_get_domain_for_dev(&pci->dev);
+   break;
+   }
+   pci = pci_get_device(dev_info.vendor_id,
+dev_info.device_id, pci);
+   }
+#endif
+   kni->domain = domain;
+   phys_addr = iommu_iova_to_phys(domain, dev_info.tx_phys);
+   kni->tx_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.rx_phys);
+   kni->rx_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.alloc_phys);
+   kni->alloc_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.free_phys);
+   kni->free_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.req_phys);
+   kni->req_q = phys_to_virt(phys_addr);
+   phys_addr = iommu_iova_to_phys(domain, dev_info.resp_phys);
+   kni->resp_q = phys_to_virt(phys_addr);
+   kni->sync_va = d

[dpdk-dev] [PATCH] net/octeontx2: add tx desc status dev ops

[kirankumark]

From: Kiran Kumar K 

Adding support for tx descriptor status dev ops for octeontx2.

Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/features/octeontx2.ini  |  1 +
 drivers/net/octeontx2/otx2_ethdev.c |  1 +
 drivers/net/octeontx2/otx2_ethdev.h |  1 +
 drivers/net/octeontx2/otx2_ethdev_ops.c | 38 -
 4 files changed, 40 insertions(+), 1 deletion(-)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 66952328b..b89959994 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -39,6 +39,7 @@ Packet type parsing  = Y
 Timesync = Y
 Timestamp offload= Y
 Rx descriptor status = Y
+Tx descriptor status = Y
 Basic stats  = Y
 Stats per queue  = Y
 Extended stats   = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index b84128fef..696c85cb8 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1646,6 +1646,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.rx_queue_count   = otx2_nix_rx_queue_count,
.rx_descriptor_done   = otx2_nix_rx_descriptor_done,
.rx_descriptor_status = otx2_nix_rx_descriptor_status,
+   .tx_descriptor_status = otx2_nix_tx_descriptor_status,
.tx_done_cleanup  = otx2_nix_tx_done_cleanup,
.pool_ops_supported   = otx2_nix_pool_ops_supported,
.filter_ctrl  = otx2_nix_dev_filter_ctrl,
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 7b15d6bc8..1c660cb1e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -377,6 +377,7 @@ uint32_t otx2_nix_rx_queue_count(struct rte_eth_dev 
*eth_dev, uint16_t qidx);
 int otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt);
 int otx2_nix_rx_descriptor_done(void *rxq, uint16_t offset);
 int otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset);
+int otx2_nix_tx_descriptor_status(void *tx_queue, uint16_t offset);
 
 void otx2_nix_promisc_config(struct rte_eth_dev *eth_dev, int en);
 void otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev);
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c 
b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 7c6532b6f..064a1fe44 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -274,7 +274,7 @@ otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t 
offset)
struct otx2_eth_rxq *rxq = rx_queue;
uint32_t head, tail;
 
-   if (rxq->qlen >= offset)
+   if (rxq->qlen <= offset)
return -EINVAL;
 
nix_rx_head_tail_get(otx2_eth_pmd_priv(rxq->eth_dev),
@@ -286,6 +286,42 @@ otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t 
offset)
return RTE_ETH_RX_DESC_AVAIL;
 }
 
+static void
+nix_tx_head_tail_get(struct otx2_eth_dev *dev,
+uint32_t *head, uint32_t *tail, uint16_t queue_idx)
+{
+   uint64_t reg, val;
+
+   if (head == NULL || tail == NULL)
+   return;
+
+   reg = (((uint64_t)queue_idx) << 32);
+   val = otx2_atomic64_add_nosync(reg, (int64_t *)
+  (dev->base + NIX_LF_SQ_OP_STATUS));
+   if (val & OP_ERR)
+   val = 0;
+
+   *tail = (uint32_t)((val >> 28) & 0x3F);
+   *head = (uint32_t)((val >> 20) & 0x3F);
+}
+
+int
+otx2_nix_tx_descriptor_status(void *tx_queue, uint16_t offset)
+{
+   struct otx2_eth_txq *txq = tx_queue;
+   uint32_t head, tail;
+
+   if (txq->nb_sqb_bufs <= offset)
+   return -EINVAL;
+
+   nix_tx_head_tail_get(txq->dev, &head, &tail, txq->sq);
+
+   if (nix_offset_has_packet(head, tail, offset))
+   return RTE_ETH_TX_DESC_DONE;
+   else
+   return RTE_ETH_TX_DESC_FULL;
+}
+
 /* It is a NOP for octeontx2 as HW frees the buffer on xmit */
 int
 otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt)
-- 
2.17.1

[dpdk-dev] [PATCH] app/test-pmd: add support for tx and rx desc statu

[kirankumark]

From: Kiran Kumar K 

Adding support to check TX and RX descriptor status.

Signed-off-by: Kiran Kumar K 
---
 app/test-pmd/cmdline.c  | 111 
 doc/guides/testpmd_app_ug/testpmd_funcs.rst |   8 ++
 2 files changed, 119 insertions(+)

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index b6bc34b4d..c22d041c3 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -18728,6 +18728,115 @@ cmdline_parse_inst_t cmd_show_tx_metadata = {
},
 };
 
+/* *** display rx/tx descriptor status *** */
+struct cmd_show_rx_tx_desc_status_result {
+   cmdline_fixed_string_t cmd_show;
+   cmdline_fixed_string_t cmd_port;
+   cmdline_fixed_string_t cmd_keyword;
+   cmdline_fixed_string_t cmd_status;
+   portid_t cmd_pid;
+   portid_t cmd_qid;
+   portid_t cmd_did;
+};
+
+static void
+cmd_show_rx_tx_desc_status_parsed(void *parsed_result,
+   __attribute__((unused)) struct cmdline *cl,
+   __attribute__((unused)) void *data)
+{
+   struct cmd_show_rx_tx_desc_status_result *res = parsed_result;
+   int rc;
+
+   if (!rte_eth_dev_is_valid_port(res->cmd_pid)) {
+   printf("invalid port id %u\n", res->cmd_pid);
+   return;
+   }
+
+   if (!strcmp(res->cmd_keyword, "rx")) {
+   rc = rte_eth_rx_descriptor_status(res->cmd_pid, res->cmd_qid,
+res->cmd_did);
+   if (rc < 0) {
+   printf("Invalid queueid = %d\n", res->cmd_qid);
+   return;
+   }
+   if (rc == RTE_ETH_RX_DESC_AVAIL)
+   printf("Desc status = AVAILABLE\n");
+   else if (rc == RTE_ETH_RX_DESC_DONE)
+   printf("Desc status = DONE\n");
+   else
+   printf("Desc status = UNAVAILABLE\n");
+   } else if (!strcmp(res->cmd_keyword, "tx")) {
+   rc = rte_eth_tx_descriptor_status(res->cmd_pid, res->cmd_qid,
+res->cmd_did);
+   if (rc < 0) {
+   printf("Invalid queueid = %d\n", res->cmd_qid);
+   return;
+   }
+   if (rc == RTE_ETH_TX_DESC_FULL)
+   printf("Desc status = FULL\n");
+   else if (rc == RTE_ETH_TX_DESC_DONE)
+   printf("Desc status = DONE\n");
+   else
+   printf("Desc status = UNAVAILABLE\n");
+   }
+}
+
+cmdline_parse_token_string_t cmd_show_rx_tx_desc_status_show =
+   TOKEN_STRING_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_show, "show");
+cmdline_parse_token_string_t cmd_show_rx_tx_desc_status_port =
+   TOKEN_STRING_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_port, "port");
+cmdline_parse_token_num_t cmd_show_rx_tx_desc_status_pid =
+   TOKEN_NUM_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_pid, UINT16);
+cmdline_parse_token_string_t cmd_show_rx_desc_status_keyword =
+   TOKEN_STRING_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_keyword, "rx");
+cmdline_parse_token_string_t cmd_show_tx_desc_status_keyword =
+   TOKEN_STRING_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_keyword, "tx");
+cmdline_parse_token_string_t cmd_show_rx_tx_desc_status_status =
+   TOKEN_STRING_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_status, "status");
+cmdline_parse_token_num_t cmd_show_rx_tx_desc_status_qid =
+   TOKEN_NUM_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_qid, UINT16);
+cmdline_parse_token_num_t cmd_show_rx_tx_desc_status_did =
+   TOKEN_NUM_INITIALIZER(struct cmd_show_rx_tx_desc_status_result,
+   cmd_did, UINT16);
+cmdline_parse_inst_t cmd_show_rx_desc_status = {
+   .f = cmd_show_rx_tx_desc_status_parsed,
+   .data = NULL,
+   .help_str = "show port  rx   status",
+   .tokens = {
+   (void *)&cmd_show_rx_tx_desc_status_show,
+   (void *)&cmd_show_rx_tx_desc_status_port,
+   (void *)&cmd_show_rx_tx_desc_status_pid,
+   (void *)&cmd_show_rx_desc_status_keyword,
+   (void *)&cmd_show_rx_tx_desc_status_qid,
+   (void *)&cmd_show_rx_tx_desc_status_did,
+   (void *)&cmd_show_rx_tx_desc_status_status,
+   NULL,
+   },
+};
+
+cmdline_parse_inst_t cmd_show_tx_desc_status = {
+   .f = cmd_show_rx_tx_desc_status_parsed,
+   .data = NULL,
+   .help_str = "show port  tx   status",
+   .tokens = {
+   (void *)&cmd_show_rx_tx_desc_status_show,
+   (void *)&cmd_show_rx_tx_desc_status_port,
+   (void *)&cmd_show_rx_tx_desc_

[dpdk-dev] [PATCH 1/2] ethdev: enable support for GTPU eth flow type

[kirankumark]

From: Kiran Kumar K 

Adding support to enable GTPU eth flow type for RSS hash
index calculation.

Signed-off-by: Kiran Kumar K 
---
 lib/librte_ethdev/rte_ethdev.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index 8fa89bf76..774906d77 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -479,7 +479,8 @@ struct rte_eth_rss_conf {
 #define RTE_ETH_FLOW_GENEVE 20 /**< GENEVE protocol based flow */
 #define RTE_ETH_FLOW_NVGRE  21 /**< NVGRE protocol based flow */
 #define RTE_ETH_FLOW_VXLAN_GPE  22 /**< VXLAN-GPE protocol based flow 
*/
-#define RTE_ETH_FLOW_MAX23
+#define RTE_ETH_FLOW_GTPU   23 /**< GTPU protocol based flow */
+#define RTE_ETH_FLOW_MAX24
 
 /*
  * The RSS offload types are defined based on flow types.
@@ -507,6 +508,7 @@ struct rte_eth_rss_conf {
 #define ETH_RSS_VXLAN  (1ULL << RTE_ETH_FLOW_VXLAN)
 #define ETH_RSS_GENEVE (1ULL << RTE_ETH_FLOW_GENEVE)
 #define ETH_RSS_NVGRE  (1ULL << RTE_ETH_FLOW_NVGRE)
+#define ETH_RSS_GTPU   (1ULL << RTE_ETH_FLOW_GTPU)
 
 #define ETH_RSS_IP ( \
ETH_RSS_IPV4 | \
-- 
2.17.1

[dpdk-dev] [PATCH 2/2] net/octeontx2: enable GTPU for RSS hash index

[kirankumark]

From: Kiran Kumar K 

Adding support to parse GTPU flag for RSS hash index calculation in
octeontx2.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_rss.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c
index 5afa21490..bc7b64387 100644
--- a/drivers/net/octeontx2/otx2_rss.c
+++ b/drivers/net/octeontx2/otx2_rss.c
@@ -243,6 +243,9 @@ otx2_rss_ethdev_to_nix(struct otx2_eth_dev *dev, uint64_t 
ethdev_rss,
if (ethdev_rss & ETH_RSS_GENEVE)
flowkey_cfg |= FLOW_KEY_TYPE_GENEVE;
 
+   if (ethdev_rss & ETH_RSS_GTPU)
+   flowkey_cfg |= FLOW_KEY_TYPE_GTPU;
+
return flowkey_cfg;
 }
 
-- 
2.17.1

[dpdk-dev] [PATCH] net/octeontx2: add tx desc status dev ops

[kirankumark]

From: Kiran Kumar K 

Adding support for tx descriptor status dev ops for octeontx2.

Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/features/octeontx2.ini  |  1 +
 drivers/net/octeontx2/otx2_ethdev.c |  1 +
 drivers/net/octeontx2/otx2_ethdev.h |  1 +
 drivers/net/octeontx2/otx2_ethdev_ops.c | 38 -
 4 files changed, 40 insertions(+), 1 deletion(-)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 66952328b..b89959994 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -39,6 +39,7 @@ Packet type parsing  = Y
 Timesync = Y
 Timestamp offload= Y
 Rx descriptor status = Y
+Tx descriptor status = Y
 Basic stats  = Y
 Stats per queue  = Y
 Extended stats   = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index b84128fef..696c85cb8 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1646,6 +1646,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.rx_queue_count   = otx2_nix_rx_queue_count,
.rx_descriptor_done   = otx2_nix_rx_descriptor_done,
.rx_descriptor_status = otx2_nix_rx_descriptor_status,
+   .tx_descriptor_status = otx2_nix_tx_descriptor_status,
.tx_done_cleanup  = otx2_nix_tx_done_cleanup,
.pool_ops_supported   = otx2_nix_pool_ops_supported,
.filter_ctrl  = otx2_nix_dev_filter_ctrl,
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 7b15d6bc8..1c660cb1e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -377,6 +377,7 @@ uint32_t otx2_nix_rx_queue_count(struct rte_eth_dev 
*eth_dev, uint16_t qidx);
 int otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt);
 int otx2_nix_rx_descriptor_done(void *rxq, uint16_t offset);
 int otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset);
+int otx2_nix_tx_descriptor_status(void *tx_queue, uint16_t offset);
 
 void otx2_nix_promisc_config(struct rte_eth_dev *eth_dev, int en);
 void otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev);
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c 
b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 7c6532b6f..ab07e4bc0 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -274,7 +274,7 @@ otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t 
offset)
struct otx2_eth_rxq *rxq = rx_queue;
uint32_t head, tail;
 
-   if (rxq->qlen >= offset)
+   if (rxq->qlen <= offset)
return -EINVAL;
 
nix_rx_head_tail_get(otx2_eth_pmd_priv(rxq->eth_dev),
@@ -286,6 +286,42 @@ otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t 
offset)
return RTE_ETH_RX_DESC_AVAIL;
 }
 
+static void
+nix_tx_head_tail_get(struct otx2_eth_dev *dev,
+uint32_t *head, uint32_t *tail, uint16_t queue_idx)
+{
+   uint64_t reg, val;
+
+   if (head == NULL || tail == NULL)
+   return;
+
+   reg = (((uint64_t)queue_idx) << 32);
+   val = otx2_atomic64_add_nosync(reg, (int64_t *)
+  (dev->base + NIX_LF_SQ_OP_STATUS));
+   if (val & OP_ERR)
+   val = 0;
+
+   *tail = (uint32_t)((val >> 28) & 0x3F);
+   *head = (uint32_t)((val >> 20) & 0x3F);
+}
+
+int
+otx2_nix_tx_descriptor_status(void *tx_queue, uint16_t offset)
+{
+   struct otx2_eth_txq *txq = tx_queue;
+   uint32_t head, tail;
+
+   if (txq->qconf.nb_desc <= offset)
+   return -EINVAL;
+
+   nix_tx_head_tail_get(txq->dev, &head, &tail, txq->sq);
+
+   if (nix_offset_has_packet(head, tail, offset))
+   return RTE_ETH_TX_DESC_DONE;
+   else
+   return RTE_ETH_TX_DESC_FULL;
+}
+
 /* It is a NOP for octeontx2 as HW frees the buffer on xmit */
 int
 otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt)
-- 
2.17.1

[dpdk-dev] [PATCH v3] net/octeontx2: add tx desc status dev ops

[kirankumark]

From: Kiran Kumar K 

Adding support for tx descriptor status dev ops for octeontx2.

Signed-off-by: Kiran Kumar K 
---
V3 Changes:
* Added version info in subject

V2 Changes:
* Fixed check for num of tx desc

 doc/guides/nics/features/octeontx2.ini  |  1 +
 drivers/net/octeontx2/otx2_ethdev.c |  1 +
 drivers/net/octeontx2/otx2_ethdev.h |  1 +
 drivers/net/octeontx2/otx2_ethdev_ops.c | 38 -
 4 files changed, 40 insertions(+), 1 deletion(-)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 66952328b..b89959994 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -39,6 +39,7 @@ Packet type parsing  = Y
 Timesync = Y
 Timestamp offload= Y
 Rx descriptor status = Y
+Tx descriptor status = Y
 Basic stats  = Y
 Stats per queue  = Y
 Extended stats   = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index b84128fef..696c85cb8 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1646,6 +1646,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.rx_queue_count   = otx2_nix_rx_queue_count,
.rx_descriptor_done   = otx2_nix_rx_descriptor_done,
.rx_descriptor_status = otx2_nix_rx_descriptor_status,
+   .tx_descriptor_status = otx2_nix_tx_descriptor_status,
.tx_done_cleanup  = otx2_nix_tx_done_cleanup,
.pool_ops_supported   = otx2_nix_pool_ops_supported,
.filter_ctrl  = otx2_nix_dev_filter_ctrl,
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 7b15d6bc8..1c660cb1e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -377,6 +377,7 @@ uint32_t otx2_nix_rx_queue_count(struct rte_eth_dev 
*eth_dev, uint16_t qidx);
 int otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt);
 int otx2_nix_rx_descriptor_done(void *rxq, uint16_t offset);
 int otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset);
+int otx2_nix_tx_descriptor_status(void *tx_queue, uint16_t offset);

 void otx2_nix_promisc_config(struct rte_eth_dev *eth_dev, int en);
 void otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev);
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c 
b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 7c6532b6f..ab07e4bc0 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -274,7 +274,7 @@ otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t 
offset)
struct otx2_eth_rxq *rxq = rx_queue;
uint32_t head, tail;

-   if (rxq->qlen >= offset)
+   if (rxq->qlen <= offset)
return -EINVAL;

nix_rx_head_tail_get(otx2_eth_pmd_priv(rxq->eth_dev),
@@ -286,6 +286,42 @@ otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t 
offset)
return RTE_ETH_RX_DESC_AVAIL;
 }

+static void
+nix_tx_head_tail_get(struct otx2_eth_dev *dev,
+uint32_t *head, uint32_t *tail, uint16_t queue_idx)
+{
+   uint64_t reg, val;
+
+   if (head == NULL || tail == NULL)
+   return;
+
+   reg = (((uint64_t)queue_idx) << 32);
+   val = otx2_atomic64_add_nosync(reg, (int64_t *)
+  (dev->base + NIX_LF_SQ_OP_STATUS));
+   if (val & OP_ERR)
+   val = 0;
+
+   *tail = (uint32_t)((val >> 28) & 0x3F);
+   *head = (uint32_t)((val >> 20) & 0x3F);
+}
+
+int
+otx2_nix_tx_descriptor_status(void *tx_queue, uint16_t offset)
+{
+   struct otx2_eth_txq *txq = tx_queue;
+   uint32_t head, tail;
+
+   if (txq->qconf.nb_desc <= offset)
+   return -EINVAL;
+
+   nix_tx_head_tail_get(txq->dev, &head, &tail, txq->sq);
+
+   if (nix_offset_has_packet(head, tail, offset))
+   return RTE_ETH_TX_DESC_DONE;
+   else
+   return RTE_ETH_TX_DESC_FULL;
+}
+
 /* It is a NOP for octeontx2 as HW frees the buffer on xmit */
 int
 otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt)
--
2.17.1

[dpdk-dev] [PATCH] net/octeontx2: extract nvgre as ltype

[kirankumark]

From: Kiran Kumar K 

Adding change to sync RTE Flow with KPU profile to extract
NVGRE as ltype.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_flow_parse.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/octeontx2/otx2_flow_parse.c 
b/drivers/net/octeontx2/otx2_flow_parse.c
index 6670c1a70..a811cb90c 100644
--- a/drivers/net/octeontx2/otx2_flow_parse.c
+++ b/drivers/net/octeontx2/otx2_flow_parse.c
@@ -458,7 +458,7 @@ otx2_flow_parse_ld(struct otx2_parse_state *pst)
info.hw_hdr_len = 4;
break;
case RTE_FLOW_ITEM_TYPE_NVGRE:
-   lt = NPC_LT_LD_GRE;
+   lt = NPC_LT_LD_NVGRE;
lflags = NPC_F_GRE_NVGRE;
info.def_mask = &rte_flow_item_nvgre_mask;
info.len = sizeof(struct rte_flow_item_nvgre);
-- 
2.17.1

[dpdk-dev] [PATCH] net/octeontx2: add support for 24B custom L2 header parsing

[kirankumark]

From: Kiran Kumar K 

Adding support to parse 24B custom L2 header. Added devargs support to
configure the PKIND, and removed the restriction to support custom
headers on non SDP interface.

Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/octeontx2.rst   |  2 +-
 drivers/common/octeontx2/hw/otx2_npc.h  | 21 -
 drivers/common/octeontx2/otx2_mbox.h| 15 ++-
 drivers/net/octeontx2/otx2_ethdev.c | 19 +--
 drivers/net/octeontx2/otx2_ethdev_devargs.c |  8 ++--
 drivers/net/octeontx2/otx2_rss.c|  2 +-
 6 files changed, 55 insertions(+), 12 deletions(-)

diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
index a4f224424..5e1621c1b 100644
--- a/doc/guides/nics/octeontx2.rst
+++ b/doc/guides/nics/octeontx2.rst
@@ -167,7 +167,7 @@ Runtime Config Options
 
With the above configuration, higig2 will be enabled on that port and the
traffic on this port should be higig2 traffic only. Supported switch header
-   types are "higig2", "dsa" and "chlen90b".
+   types are "higig2", "dsa", "chlen90b" and "chlen24b".
 
 - ``RSS tag as XOR`` (default ``0``)
 
diff --git a/drivers/common/octeontx2/hw/otx2_npc.h 
b/drivers/common/octeontx2/hw/otx2_npc.h
index 45e60dfd5..dd507d57a 100644
--- a/drivers/common/octeontx2/hw/otx2_npc.h
+++ b/drivers/common/octeontx2/hw/otx2_npc.h
@@ -185,7 +185,11 @@ enum npc_kpu_la_ltype {
NPC_LT_LA_IH_2_ETHER,
NPC_LT_LA_HIGIG2_ETHER,
NPC_LT_LA_IH_NIX_HIGIG2_ETHER,
-   NPC_LT_LA_CH_LEN_90B_ETHER,   /* Custom L2 header of length 90 bytes */
+   NPC_LT_LA_CUSTOM_L2_90B_ETHER,
+   NPC_LT_LA_CPT_HDR,
+   NPC_LT_LA_CUSTOM_L2_24B_ETHER,
+   NPC_LT_LA_CUSTOM0 = 0xE,
+   NPC_LT_LA_CUSTOM1 = 0xF,
 };
 
 enum npc_kpu_lb_ltype {
@@ -200,6 +204,9 @@ enum npc_kpu_lb_ltype {
NPC_LT_LB_EDSA_VLAN,
NPC_LT_LB_EXDSA,
NPC_LT_LB_EXDSA_VLAN,
+   NPC_LT_LB_FDSA,
+   NPC_LT_LB_CUSTOM0 = 0xE,
+   NPC_LT_LB_CUSTOM1 = 0xF,
 };
 
 enum npc_kpu_lc_ltype {
@@ -213,6 +220,8 @@ enum npc_kpu_lc_ltype {
NPC_LT_LC_MPLS,
NPC_LT_LC_NSH,
NPC_LT_LC_FCOE,
+   NPC_LT_LC_CUSTOM0 = 0xE,
+   NPC_LT_LC_CUSTOM1 = 0xF,
 };
 
 /* Don't modify Ltypes up to SCTP, otherwise it will
@@ -224,6 +233,8 @@ enum npc_kpu_ld_ltype {
NPC_LT_LD_ICMP,
NPC_LT_LD_SCTP,
NPC_LT_LD_ICMP6,
+   NPC_LT_LD_CUSTOM0,
+   NPC_LT_LD_CUSTOM1,
NPC_LT_LD_IGMP = 8,
NPC_LT_LD_AH,
NPC_LT_LD_GRE,
@@ -244,6 +255,8 @@ enum npc_kpu_le_ltype {
NPC_LT_LE_TU_MPLS_IN_GRE,
NPC_LT_LE_TU_NSH_IN_GRE,
NPC_LT_LE_TU_MPLS_IN_UDP,
+   NPC_LT_LE_CUSTOM0 = 0xE,
+   NPC_LT_LE_CUSTOM1 = 0xF,
 };
 
 enum npc_kpu_lf_ltype {
@@ -253,6 +266,8 @@ enum npc_kpu_lf_ltype {
NPC_LT_LF_TU_NSH_IN_VXLANGPE,
NPC_LT_LF_TU_MPLS_IN_NSH,
NPC_LT_LF_TU_3RD_NSH,
+   NPC_LT_LF_CUSTOM0 = 0xE,
+   NPC_LT_LF_CUSTOM1 = 0xF,
 };
 
 enum npc_kpu_lg_ltype {
@@ -260,6 +275,8 @@ enum npc_kpu_lg_ltype {
NPC_LT_LG_TU_IP6,
NPC_LT_LG_TU_ARP,
NPC_LT_LG_TU_ETHER_IN_NSH,
+   NPC_LT_LG_CUSTOM0 = 0xE,
+   NPC_LT_LG_CUSTOM1 = 0xF,
 };
 
 /* Don't modify Ltypes up to SCTP, otherwise it will
@@ -274,6 +291,8 @@ enum npc_kpu_lh_ltype {
NPC_LT_LH_TU_IGMP = 8,
NPC_LT_LH_TU_ESP,
NPC_LT_LH_TU_AH,
+   NPC_LT_LH_CUSTOM0 = 0xE,
+   NPC_LT_LH_CUSTOM1 = 0xF,
 };
 
 /* Structures definitions */
diff --git a/drivers/common/octeontx2/otx2_mbox.h 
b/drivers/common/octeontx2/otx2_mbox.h
index f6d884c19..7e7667bf0 100644
--- a/drivers/common/octeontx2/otx2_mbox.h
+++ b/drivers/common/octeontx2/otx2_mbox.h
@@ -353,13 +353,26 @@ struct ready_msg_rsp {
uint16_t __otx2_io rclk_freq; /* RCLK frequency */
 };
 
+enum npc_pkind_type {
+   NPC_RX_CHLEN24B_PKIND = 57ULL,
+   NPC_RX_CPT_HDR_PKIND,
+   NPC_RX_CHLEN90B_PKIND,
+   NPC_TX_HIGIG_PKIND,
+   NPC_RX_HIGIG_PKIND,
+   NPC_RX_EDSA_PKIND,
+   NPC_TX_DEF_PKIND,
+};
+
+#define OTX2_PRIV_FLAGS_CH_LEN_90B 254
+#define OTX2_PRIV_FLAGS_CH_LEN_24B 255
+
 /* Struct to set pkind */
 struct npc_set_pkind {
struct mbox_msghdr hdr;
 #define OTX2_PRIV_FLAGS_DEFAULT  BIT_ULL(0)
 #define OTX2_PRIV_FLAGS_EDSA BIT_ULL(1)
 #define OTX2_PRIV_FLAGS_HIGIGBIT_ULL(2)
-#define OTX2_PRIV_FLAGS_LEN_90B  BIT_ULL(3)
+#define OTX2_PRIV_FLAGS_FDSA BIT_ULL(3)
 #define OTX2_PRIV_FLAGS_CUSTOM   BIT_ULL(63)
uint64_t __otx2_io mode;
 #define PKIND_TX   BIT_ULL(0)
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 6cebbe677..9bfe95d6b 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -112,15 +112,18 @@ nix_lf_switch_header_type_enable(struct otx2_eth_dev 
*dev, bool enable)
if (dev->npc_flow.switch_header_type == 0)
return 0;
 
-   if (dev->n

[dpdk-dev] [PATCH 1/2] ethdev: add level support for RSS offload types

[kirankumark]

From: Kiran Kumar K 

This patch reserves 2 bits as input selection to select Inner and
outer layers for RSS computation. It is combined with existing
ETH_RSS_* to choose Inner or outer layers for L2, L3 and L4.
This functionality already exists in rte_flow through level parameter in
RSS action configuration rte_flow_action_rss.

Signed-off-by: Kiran Kumar K 
---
 lib/librte_ethdev/rte_ethdev.h | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index d29930fd8..2164d2f8c 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -552,6 +552,33 @@ struct rte_eth_rss_conf {
 #define RTE_ETH_RSS_L3_PRE64  (1ULL << 53)
 #define RTE_ETH_RSS_L3_PRE96  (1ULL << 52)
 
+/*
+ * We use the following macros to combine with the above layers to choose
+ * inner and outer layers or both for RSS computation.
+ * Note: Default is 0: inner layers, 1: outer layers, 2: both
+ * bit 56 and 57 are reserved for this.
+ */
+
+/**
+ * Level 0, It basically stands for the innermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER(0ULL << 56)
+/**
+ * Level 1, It basically stands for the outermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_OUTER(1ULL << 56)
+/**
+ * Level 2, It basically stands for the both inner and outermost
+ * encapsulation level RSS can be performed on according to PMD and
+ * device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER_OUTER  (2ULL << 56)
+#define ETH_RSS_LEVEL_MASK(3ULL << 56)
+
+#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 56)
+
 /**
  * For input set change of hash filter, if SRC_ONLY and DST_ONLY of
  * the same level are used simultaneously, it is the same case as
-- 
2.25.1

[dpdk-dev] [PATCH 2/2] net/octeontx2: add rss hash level support

[kirankumark]

From: Kiran Kumar K 

Add support to choose rss hash level from ethdev rss config.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_ethdev.h | 4 +++-
 drivers/net/octeontx2/otx2_rss.c| 9 +++--
 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index e9efe52bb..953445ecb 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -119,7 +119,9 @@
 #define NIX_RSS_OFFLOAD(ETH_RSS_PORT | ETH_RSS_IP | 
ETH_RSS_UDP |\
 ETH_RSS_TCP | ETH_RSS_SCTP | \
 ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD | \
-NIX_RSS_L3_L4_SRC_DST)
+NIX_RSS_L3_L4_SRC_DST | ETH_RSS_LEVEL_INNER | \
+ETH_RSS_LEVEL_OUTER | \
+ETH_RSS_LEVEL_INNER_OUTER)
 
 #define NIX_TX_OFFLOAD_CAPA ( \
DEV_TX_OFFLOAD_MBUF_FAST_FREE   | \
diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c
index d859937e6..194f4e8af 100644
--- a/drivers/net/octeontx2/otx2_rss.c
+++ b/drivers/net/octeontx2/otx2_rss.c
@@ -323,6 +323,7 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
 struct rte_eth_rss_conf *rss_conf)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   uint8_t rss_hash_level;
uint32_t flowkey_cfg;
uint8_t alg_idx;
int rc;
@@ -339,7 +340,9 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
otx2_nix_rss_set_key(dev, rss_conf->rss_key,
 (uint32_t)rss_conf->rss_key_len);
 
-   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, 0);
+   rss_hash_level = ETH_RSS_LEVEL(rss_conf->rss_hf);
+   flowkey_cfg =
+   otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, rss_hash_level);
 
rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 NIX_DEFAULT_RSS_CTX_GROUP,
@@ -375,6 +378,7 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
uint32_t idx, qcnt = eth_dev->data->nb_rx_queues;
+   uint8_t rss_hash_level;
uint32_t flowkey_cfg;
uint64_t rss_hf;
uint8_t alg_idx;
@@ -399,7 +403,8 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
}
 
rss_hf = eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
-   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, 0);
+   rss_hash_level = ETH_RSS_LEVEL(rss_hf);
+   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, rss_hash_level);
 
rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 NIX_DEFAULT_RSS_CTX_GROUP,
-- 
2.25.1

[dpdk-dev] [PATCH v2 1/2] ethdev: add level support for RSS offload types

[kirankumark]

From: Kiran Kumar K 

This patch reserves 2 bits as input selection to select Inner and
outer layers for RSS computation. It is combined with existing
ETH_RSS_* to choose Inner or outer layers for L2, L3 and L4.
This functionality already exists in rte_flow through level parameter in
RSS action configuration rte_flow_action_rss.

Signed-off-by: Kiran Kumar K 
---
v2 changes:
* Reserved bit 50 & 51

 lib/librte_ethdev/rte_ethdev.h | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index d29930fd8..28184cc85 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -552,6 +552,33 @@ struct rte_eth_rss_conf {
 #define RTE_ETH_RSS_L3_PRE64  (1ULL << 53)
 #define RTE_ETH_RSS_L3_PRE96  (1ULL << 52)

+/*
+ * We use the following macros to combine with the above layers to choose
+ * inner and outer layers or both for RSS computation.
+ * Note: Default is 0: inner layers, 1: outer layers, 2: both
+ * bit 50 and 51 are reserved for this.
+ */
+
+/**
+ * Level 0, It basically stands for the innermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER(0ULL << 50)
+/**
+ * Level 1, It basically stands for the outermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_OUTER(1ULL << 50)
+/**
+ * Level 2, It basically stands for the both inner and outermost
+ * encapsulation level RSS can be performed on according to PMD and
+ * device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER_OUTER  (2ULL << 50)
+#define ETH_RSS_LEVEL_MASK(3ULL << 50)
+
+#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)
+
 /**
  * For input set change of hash filter, if SRC_ONLY and DST_ONLY of
  * the same level are used simultaneously, it is the same case as
--
2.25.1

[dpdk-dev] [PATCH v2 2/2] net/octeontx2: add rss hash level support

[kirankumark]

From: Kiran Kumar K 

Add support to choose rss hash level from ethdev rss config.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_ethdev.h | 4 +++-
 drivers/net/octeontx2/otx2_rss.c| 9 +++--
 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index e9efe52bb..953445ecb 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -119,7 +119,9 @@
 #define NIX_RSS_OFFLOAD(ETH_RSS_PORT | ETH_RSS_IP | 
ETH_RSS_UDP |\
 ETH_RSS_TCP | ETH_RSS_SCTP | \
 ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD | \
-NIX_RSS_L3_L4_SRC_DST)
+NIX_RSS_L3_L4_SRC_DST | ETH_RSS_LEVEL_INNER | \
+ETH_RSS_LEVEL_OUTER | \
+ETH_RSS_LEVEL_INNER_OUTER)
 
 #define NIX_TX_OFFLOAD_CAPA ( \
DEV_TX_OFFLOAD_MBUF_FAST_FREE   | \
diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c
index d859937e6..194f4e8af 100644
--- a/drivers/net/octeontx2/otx2_rss.c
+++ b/drivers/net/octeontx2/otx2_rss.c
@@ -323,6 +323,7 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
 struct rte_eth_rss_conf *rss_conf)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   uint8_t rss_hash_level;
uint32_t flowkey_cfg;
uint8_t alg_idx;
int rc;
@@ -339,7 +340,9 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
otx2_nix_rss_set_key(dev, rss_conf->rss_key,
 (uint32_t)rss_conf->rss_key_len);
 
-   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, 0);
+   rss_hash_level = ETH_RSS_LEVEL(rss_conf->rss_hf);
+   flowkey_cfg =
+   otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, rss_hash_level);
 
rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 NIX_DEFAULT_RSS_CTX_GROUP,
@@ -375,6 +378,7 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
uint32_t idx, qcnt = eth_dev->data->nb_rx_queues;
+   uint8_t rss_hash_level;
uint32_t flowkey_cfg;
uint64_t rss_hf;
uint8_t alg_idx;
@@ -399,7 +403,8 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
}
 
rss_hf = eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
-   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, 0);
+   rss_hash_level = ETH_RSS_LEVEL(rss_hf);
+   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, rss_hash_level);
 
rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 NIX_DEFAULT_RSS_CTX_GROUP,
-- 
2.25.1

[dpdk-dev] [PATCH] net/octeontx2: fix rss flow create

[kirankumark]

From: Kiran Kumar K 

While creating flow with action type RSS, action type is not being
set to RSS, and action type is being set to unicast. Therefore it breaks
RSS functionality. This patch add changes to program the RSS action
properly.

Fixes: 4092e4845d ("net/octeontx2: add flow operations")

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_flow.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_flow.c 
b/drivers/net/octeontx2/otx2_flow.c
index 13a76e441..90540ffbd 100644
--- a/drivers/net/octeontx2/otx2_flow.c
+++ b/drivers/net/octeontx2/otx2_flow.c
@@ -270,6 +270,8 @@ flow_program_rss_action(struct rte_eth_dev *eth_dev,
if (rc)
return rc;
 
+   flow->npc_action &= (~(0xfULL));
+   flow->npc_action |= NIX_RX_ACTIONOP_RSS;
flow->npc_action |=
((uint64_t)(alg_idx & NIX_RSS_ACT_ALG_MASK) <<
 NIX_RSS_ACT_ALG_OFFSET) |
-- 
2.25.1

[dpdk-dev] [PATCH] net/octeontx2: add support for VLAN based RSS hash

[kirankumark]

From: Kiran Kumar K 

Adding support for VLAN based RSS hash. 2 bytes of SPI will
be considered for hashing.

Signed-off-by: Kiran Kumar K 
---
 drivers/common/octeontx2/otx2_mbox.h | 2 ++
 drivers/net/octeontx2/otx2_ethdev.h  | 2 +-
 drivers/net/octeontx2/otx2_rss.c | 3 +++
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/common/octeontx2/otx2_mbox.h 
b/drivers/common/octeontx2/otx2_mbox.h
index 34b1d0663..831445703 100644
--- a/drivers/common/octeontx2/otx2_mbox.h
+++ b/drivers/common/octeontx2/otx2_mbox.h
@@ -966,6 +966,8 @@ struct nix_rss_flowkey_cfg {
 #define FLOW_KEY_TYPE_INNR_SCTP BIT(16)
 #define FLOW_KEY_TYPE_INNR_ETH_DMAC BIT(17)
 #define FLOW_KEY_TYPE_CH_LEN_90B   BIT(18)
+#define FLOW_KEY_TYPE_CUSTOM0  BIT(19)
+#define FLOW_KEY_TYPE_VLAN BIT(20)
 #define FLOW_KEY_TYPE_L4_DST BIT(28)
 #define FLOW_KEY_TYPE_L4_SRC BIT(29)
 #define FLOW_KEY_TYPE_L3_DST BIT(30)
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index e9efe52bb..c4cb09621 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -119,7 +119,7 @@
 #define NIX_RSS_OFFLOAD(ETH_RSS_PORT | ETH_RSS_IP | 
ETH_RSS_UDP |\
 ETH_RSS_TCP | ETH_RSS_SCTP | \
 ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD | \
-NIX_RSS_L3_L4_SRC_DST)
+NIX_RSS_L3_L4_SRC_DST | ETH_RSS_C_VLAN)
 
 #define NIX_TX_OFFLOAD_CAPA ( \
DEV_TX_OFFLOAD_MBUF_FAST_FREE   | \
diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c
index d859937e6..364dc623c 100644
--- a/drivers/net/octeontx2/otx2_rss.c
+++ b/drivers/net/octeontx2/otx2_rss.c
@@ -238,6 +238,9 @@ otx2_rss_ethdev_to_nix(struct otx2_eth_dev *dev, uint64_t 
ethdev_rss,
flowkey_cfg |= FLOW_KEY_TYPE_CH_LEN_90B;
}
 
+   if (ethdev_rss & ETH_RSS_C_VLAN)
+   flowkey_cfg |= FLOW_KEY_TYPE_VLAN;
+
if (ethdev_rss & ETH_RSS_L3_SRC_ONLY)
flowkey_cfg |= FLOW_KEY_TYPE_L3_SRC;
 
-- 
2.25.1

[dpdk-dev] [PATCH v3 1/2] ethdev: add level support for RSS offload types

[kirankumark]

From: Kiran Kumar K 

This patch reserves 2 bits as input selection to select Inner and
outer layers for RSS computation. It is combined with existing
ETH_RSS_* to choose Inner or outer layers for L2, L3 and L4.
This functionality already exists in rte_flow through level parameter in
RSS action configuration rte_flow_action_rss.

Signed-off-by: Kiran Kumar K 
---
V3 Changes:
* Added testpmd support.

 app/test-pmd/parameters.c  |  6 ++
 lib/librte_ethdev/rte_ethdev.h | 27 +++
 2 files changed, 33 insertions(+)

diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 7cb0e3d6e..5f669ff24 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -632,6 +632,8 @@ launch_args_parse(int argc, char** argv)
{ "forward-mode",   1, 0, 0 },
{ "rss-ip", 0, 0, 0 },
{ "rss-udp",0, 0, 0 },
+   { "rss-outer",  0, 0, 0 },
+   { "rss-inner-outer",0, 0, 0 },
{ "rxq",1, 0, 0 },
{ "txq",1, 0, 0 },
{ "rxd",1, 0, 0 },
@@ -1051,6 +1053,10 @@ launch_args_parse(int argc, char** argv)
rss_hf = ETH_RSS_IP;
if (!strcmp(lgopts[opt_idx].name, "rss-udp"))
rss_hf = ETH_RSS_UDP;
+   if (!strcmp(lgopts[opt_idx].name, "rss-outer"))
+   rss_hf |= ETH_RSS_LEVEL_OUTER;
+   if (!strcmp(lgopts[opt_idx].name, "rss-inner-outer"))
+   rss_hf |= ETH_RSS_LEVEL_INNER_OUTER;
if (!strcmp(lgopts[opt_idx].name, "rxq")) {
n = atoi(optarg);
if (n >= 0 && check_nb_rxq((queueid_t)n) == 0)
diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index d29930fd8..28184cc85 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -552,6 +552,33 @@ struct rte_eth_rss_conf {
 #define RTE_ETH_RSS_L3_PRE64  (1ULL << 53)
 #define RTE_ETH_RSS_L3_PRE96  (1ULL << 52)

+/*
+ * We use the following macros to combine with the above layers to choose
+ * inner and outer layers or both for RSS computation.
+ * Note: Default is 0: inner layers, 1: outer layers, 2: both
+ * bit 50 and 51 are reserved for this.
+ */
+
+/**
+ * Level 0, It basically stands for the innermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER(0ULL << 50)
+/**
+ * Level 1, It basically stands for the outermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_OUTER(1ULL << 50)
+/**
+ * Level 2, It basically stands for the both inner and outermost
+ * encapsulation level RSS can be performed on according to PMD and
+ * device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER_OUTER  (2ULL << 50)
+#define ETH_RSS_LEVEL_MASK(3ULL << 50)
+
+#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)
+
 /**
  * For input set change of hash filter, if SRC_ONLY and DST_ONLY of
  * the same level are used simultaneously, it is the same case as
--
2.25.1

[dpdk-dev] [PATCH v3 2/2] net/octeontx2: add rss hash level support

[kirankumark]

From: Kiran Kumar K 

Add support to choose rss hash level from ethdev rss config.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_ethdev.h | 4 +++-
 drivers/net/octeontx2/otx2_rss.c| 9 +++--
 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index e9efe52bb..953445ecb 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -119,7 +119,9 @@
 #define NIX_RSS_OFFLOAD(ETH_RSS_PORT | ETH_RSS_IP | 
ETH_RSS_UDP |\
 ETH_RSS_TCP | ETH_RSS_SCTP | \
 ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD | \
-NIX_RSS_L3_L4_SRC_DST)
+NIX_RSS_L3_L4_SRC_DST | ETH_RSS_LEVEL_INNER | \
+ETH_RSS_LEVEL_OUTER | \
+ETH_RSS_LEVEL_INNER_OUTER)
 
 #define NIX_TX_OFFLOAD_CAPA ( \
DEV_TX_OFFLOAD_MBUF_FAST_FREE   | \
diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c
index d859937e6..194f4e8af 100644
--- a/drivers/net/octeontx2/otx2_rss.c
+++ b/drivers/net/octeontx2/otx2_rss.c
@@ -323,6 +323,7 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
 struct rte_eth_rss_conf *rss_conf)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   uint8_t rss_hash_level;
uint32_t flowkey_cfg;
uint8_t alg_idx;
int rc;
@@ -339,7 +340,9 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
otx2_nix_rss_set_key(dev, rss_conf->rss_key,
 (uint32_t)rss_conf->rss_key_len);
 
-   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, 0);
+   rss_hash_level = ETH_RSS_LEVEL(rss_conf->rss_hf);
+   flowkey_cfg =
+   otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, rss_hash_level);
 
rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 NIX_DEFAULT_RSS_CTX_GROUP,
@@ -375,6 +378,7 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
uint32_t idx, qcnt = eth_dev->data->nb_rx_queues;
+   uint8_t rss_hash_level;
uint32_t flowkey_cfg;
uint64_t rss_hf;
uint8_t alg_idx;
@@ -399,7 +403,8 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
}
 
rss_hf = eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
-   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, 0);
+   rss_hash_level = ETH_RSS_LEVEL(rss_hf);
+   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, rss_hash_level);
 
rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 NIX_DEFAULT_RSS_CTX_GROUP,
-- 
2.25.1

[dpdk-dev] [PATCH v4 1/2] ethdev: add level support for RSS offload types

[kirankumark]

From: Kiran Kumar K 

This patch reserves 2 bits as input selection to select Inner and
outer layers for RSS computation. It is combined with existing
ETH_RSS_* to choose Inner or outer layers for L2, L3 and L4.
This functionality already exists in rte_flow through level parameter in
RSS action configuration rte_flow_action_rss.

Signed-off-by: Kiran Kumar K 
---
 app/test-pmd/parameters.c  |  6 ++
 lib/librte_ethdev/rte_ethdev.h | 27 +++
 2 files changed, 33 insertions(+)

diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 7cb0e3d6e..5f669ff24 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -632,6 +632,8 @@ launch_args_parse(int argc, char** argv)
{ "forward-mode",   1, 0, 0 },
{ "rss-ip", 0, 0, 0 },
{ "rss-udp",0, 0, 0 },
+   { "rss-outer",  0, 0, 0 },
+   { "rss-inner-outer",0, 0, 0 },
{ "rxq",1, 0, 0 },
{ "txq",1, 0, 0 },
{ "rxd",1, 0, 0 },
@@ -1051,6 +1053,10 @@ launch_args_parse(int argc, char** argv)
rss_hf = ETH_RSS_IP;
if (!strcmp(lgopts[opt_idx].name, "rss-udp"))
rss_hf = ETH_RSS_UDP;
+   if (!strcmp(lgopts[opt_idx].name, "rss-outer"))
+   rss_hf |= ETH_RSS_LEVEL_OUTER;
+   if (!strcmp(lgopts[opt_idx].name, "rss-inner-outer"))
+   rss_hf |= ETH_RSS_LEVEL_INNER_OUTER;
if (!strcmp(lgopts[opt_idx].name, "rxq")) {
n = atoi(optarg);
if (n >= 0 && check_nb_rxq((queueid_t)n) == 0)
diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index d29930fd8..28184cc85 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -552,6 +552,33 @@ struct rte_eth_rss_conf {
 #define RTE_ETH_RSS_L3_PRE64  (1ULL << 53)
 #define RTE_ETH_RSS_L3_PRE96  (1ULL << 52)
 
+/*
+ * We use the following macros to combine with the above layers to choose
+ * inner and outer layers or both for RSS computation.
+ * Note: Default is 0: inner layers, 1: outer layers, 2: both
+ * bit 50 and 51 are reserved for this.
+ */
+
+/**
+ * Level 0, It basically stands for the innermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER(0ULL << 50)
+/**
+ * Level 1, It basically stands for the outermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_OUTER(1ULL << 50)
+/**
+ * Level 2, It basically stands for the both inner and outermost
+ * encapsulation level RSS can be performed on according to PMD and
+ * device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER_OUTER  (2ULL << 50)
+#define ETH_RSS_LEVEL_MASK(3ULL << 50)
+
+#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)
+
 /**
  * For input set change of hash filter, if SRC_ONLY and DST_ONLY of
  * the same level are used simultaneously, it is the same case as
-- 
2.25.1

[dpdk-dev] [PATCH v4 2/2] net/octeontx2: add rss hash level support

[kirankumark]

From: Kiran Kumar K 

Add support to choose rss hash level from ethdev rss config.

Signed-off-by: Kiran Kumar K 
---
V4 Changes:
* Replace ETH_RSS_LEVEL_OUTER | ETH_RSS_LEVEL_INNER_OUTER with
ETH_RSS_LEVEL_MASK

 drivers/net/octeontx2/otx2_ethdev.h | 2 +-
 drivers/net/octeontx2/otx2_rss.c| 9 +++--
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index e9efe52bb..a11411239 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -119,7 +119,7 @@
 #define NIX_RSS_OFFLOAD(ETH_RSS_PORT | ETH_RSS_IP | 
ETH_RSS_UDP |\
 ETH_RSS_TCP | ETH_RSS_SCTP | \
 ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD | \
-NIX_RSS_L3_L4_SRC_DST)
+NIX_RSS_L3_L4_SRC_DST | ETH_RSS_LEVEL_MASK)

 #define NIX_TX_OFFLOAD_CAPA ( \
DEV_TX_OFFLOAD_MBUF_FAST_FREE   | \
diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c
index d859937e6..194f4e8af 100644
--- a/drivers/net/octeontx2/otx2_rss.c
+++ b/drivers/net/octeontx2/otx2_rss.c
@@ -323,6 +323,7 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
 struct rte_eth_rss_conf *rss_conf)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   uint8_t rss_hash_level;
uint32_t flowkey_cfg;
uint8_t alg_idx;
int rc;
@@ -339,7 +340,9 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
otx2_nix_rss_set_key(dev, rss_conf->rss_key,
 (uint32_t)rss_conf->rss_key_len);

-   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, 0);
+   rss_hash_level = ETH_RSS_LEVEL(rss_conf->rss_hf);
+   flowkey_cfg =
+   otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, rss_hash_level);

rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 NIX_DEFAULT_RSS_CTX_GROUP,
@@ -375,6 +378,7 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
uint32_t idx, qcnt = eth_dev->data->nb_rx_queues;
+   uint8_t rss_hash_level;
uint32_t flowkey_cfg;
uint64_t rss_hf;
uint8_t alg_idx;
@@ -399,7 +403,8 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
}

rss_hf = eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
-   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, 0);
+   rss_hash_level = ETH_RSS_LEVEL(rss_hf);
+   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, rss_hash_level);

rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 NIX_DEFAULT_RSS_CTX_GROUP,
--
2.25.1

[dpdk-dev] [PATCH v5 1/2] ethdev: add level support for RSS offload types

[kirankumark]

From: Kiran Kumar K 

This patch reserves 2 bits as input selection to select Inner and
outer layers for RSS computation. It is combined with existing
ETH_RSS_* to choose Inner or outer layers for L2, L3 and L4.
This functionality already exists in rte_flow through level parameter in
RSS action configuration rte_flow_action_rss.

Signed-off-by: Kiran Kumar K 
---
V5 Changes:
* Added support to set rss level type from port config in testpmd

 app/test-pmd/cmdline.c | 11 ++-
 app/test-pmd/parameters.c  |  6 ++
 lib/librte_ethdev/rte_ethdev.h | 27 +++
 3 files changed, 43 insertions(+), 1 deletion(-)

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 0a6ed85f3..4eafee8c8 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -2334,7 +2334,16 @@ cmd_config_rss_parsed(void *parsed_result,
rss_conf.rss_hf = ETH_RSS_GTPU;
else if (!strcmp(res->value, "none"))
rss_conf.rss_hf = 0;
-   else if (!strcmp(res->value, "default"))
+   else if (!strcmp(res->value, "level-inner")) {
+   rss_hf &= (~ETH_RSS_LEVEL_MASK);
+   rss_conf.rss_hf = (rss_hf | ETH_RSS_LEVEL_INNER);
+   } else if (!strcmp(res->value, "level-outer")) {
+   rss_hf &= (~ETH_RSS_LEVEL_MASK);
+   rss_conf.rss_hf = (rss_hf | ETH_RSS_LEVEL_OUTER);
+   } else if (!strcmp(res->value, "level-inner-outer")) {
+   rss_hf &= (~ETH_RSS_LEVEL_MASK);
+   rss_conf.rss_hf = (rss_hf | ETH_RSS_LEVEL_INNER_OUTER);
+   } else if (!strcmp(res->value, "default"))
use_default = 1;
else if (isdigit(res->value[0]) && atoi(res->value) > 0 &&
atoi(res->value) < 64)
diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 7cb0e3d6e..5f669ff24 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -632,6 +632,8 @@ launch_args_parse(int argc, char** argv)
{ "forward-mode",   1, 0, 0 },
{ "rss-ip", 0, 0, 0 },
{ "rss-udp",0, 0, 0 },
+   { "rss-outer",  0, 0, 0 },
+   { "rss-inner-outer",0, 0, 0 },
{ "rxq",1, 0, 0 },
{ "txq",1, 0, 0 },
{ "rxd",1, 0, 0 },
@@ -1051,6 +1053,10 @@ launch_args_parse(int argc, char** argv)
rss_hf = ETH_RSS_IP;
if (!strcmp(lgopts[opt_idx].name, "rss-udp"))
rss_hf = ETH_RSS_UDP;
+   if (!strcmp(lgopts[opt_idx].name, "rss-outer"))
+   rss_hf |= ETH_RSS_LEVEL_OUTER;
+   if (!strcmp(lgopts[opt_idx].name, "rss-inner-outer"))
+   rss_hf |= ETH_RSS_LEVEL_INNER_OUTER;
if (!strcmp(lgopts[opt_idx].name, "rxq")) {
n = atoi(optarg);
if (n >= 0 && check_nb_rxq((queueid_t)n) == 0)
diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index d29930fd8..28184cc85 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -552,6 +552,33 @@ struct rte_eth_rss_conf {
 #define RTE_ETH_RSS_L3_PRE64  (1ULL << 53)
 #define RTE_ETH_RSS_L3_PRE96  (1ULL << 52)

+/*
+ * We use the following macros to combine with the above layers to choose
+ * inner and outer layers or both for RSS computation.
+ * Note: Default is 0: inner layers, 1: outer layers, 2: both
+ * bit 50 and 51 are reserved for this.
+ */
+
+/**
+ * Level 0, It basically stands for the innermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER(0ULL << 50)
+/**
+ * Level 1, It basically stands for the outermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_OUTER(1ULL << 50)
+/**
+ * Level 2, It basically stands for the both inner and outermost
+ * encapsulation level RSS can be performed on according to PMD and
+ * device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER_OUTER  (2ULL << 50)
+#define ETH_RSS_LEVEL_MASK(3ULL << 50)
+
+#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)
+
 /**
  * For input set change of hash filter, if SRC_ONLY and DST_ONLY of
  * the same level are used simultaneously, it is the same case as
--
2.25.1

[dpdk-dev] [PATCH v5 2/2] net/octeontx2: add rss hash level support

[kirankumark]

From: Kiran Kumar K 

Add support to choose rss hash level from ethdev rss config.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_ethdev.h | 2 +-
 drivers/net/octeontx2/otx2_rss.c| 9 +++--
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index e9efe52bb..a11411239 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -119,7 +119,7 @@
 #define NIX_RSS_OFFLOAD(ETH_RSS_PORT | ETH_RSS_IP | 
ETH_RSS_UDP |\
 ETH_RSS_TCP | ETH_RSS_SCTP | \
 ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD | \
-NIX_RSS_L3_L4_SRC_DST)
+NIX_RSS_L3_L4_SRC_DST | ETH_RSS_LEVEL_MASK)
 
 #define NIX_TX_OFFLOAD_CAPA ( \
DEV_TX_OFFLOAD_MBUF_FAST_FREE   | \
diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c
index d859937e6..194f4e8af 100644
--- a/drivers/net/octeontx2/otx2_rss.c
+++ b/drivers/net/octeontx2/otx2_rss.c
@@ -323,6 +323,7 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
 struct rte_eth_rss_conf *rss_conf)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   uint8_t rss_hash_level;
uint32_t flowkey_cfg;
uint8_t alg_idx;
int rc;
@@ -339,7 +340,9 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
otx2_nix_rss_set_key(dev, rss_conf->rss_key,
 (uint32_t)rss_conf->rss_key_len);
 
-   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, 0);
+   rss_hash_level = ETH_RSS_LEVEL(rss_conf->rss_hf);
+   flowkey_cfg =
+   otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, rss_hash_level);
 
rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 NIX_DEFAULT_RSS_CTX_GROUP,
@@ -375,6 +378,7 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
uint32_t idx, qcnt = eth_dev->data->nb_rx_queues;
+   uint8_t rss_hash_level;
uint32_t flowkey_cfg;
uint64_t rss_hf;
uint8_t alg_idx;
@@ -399,7 +403,8 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
}
 
rss_hf = eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
-   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, 0);
+   rss_hash_level = ETH_RSS_LEVEL(rss_hf);
+   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, rss_hash_level);
 
rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 NIX_DEFAULT_RSS_CTX_GROUP,
-- 
2.25.1

[dpdk-dev] [PATCH] net/octeontx2: set max vtag insertion size

[kirankumark]

From: Kiran Kumar K 

When TX side VTAG insertion is enabled, As we are not setting the max
vtag insertion size an interrupt has been received. This patch will fix
the issue by configuring the max vtag insertion size to 8B.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_tm.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_tm.c b/drivers/net/octeontx2/otx2_tm.c
index 8ed059549..b76242a60 100644
--- a/drivers/net/octeontx2/otx2_tm.c
+++ b/drivers/net/octeontx2/otx2_tm.c
@@ -560,8 +560,9 @@ populate_tm_reg(struct otx2_eth_dev *dev,
 * smaller
 */
reg[k] = NIX_AF_SMQX_CFG(schq);
-   regval[k] = BIT_ULL(50) | NIX_MIN_HW_FRS;
-   regval_mask[k] = ~(BIT_ULL(50) | 0x7f);
+   regval[k] = BIT_ULL(50) | ((uint64_t)NIX_MAX_VTAG_INS << 36) |
+   NIX_MIN_HW_FRS;
+   regval_mask[k] = ~(BIT_ULL(50) | (0x7ULL << 36) | 0x7f);
k++;
 
/* Parent and schedule conf */
-- 
2.25.1

[dpdk-dev] [PATCH v6 2/3] app/testpmd: support ethdev rss level config

[kirankumark]

From: Kiran Kumar K 

Adding support to set RSS level from ethdev config.
level-inner is default and will set the RSS level to inner layers.
level-outer will set the RSS level to outer layers.
level-inner-outer will set the RSS level to both inner and outer
layers.

Signed-off-by: Kiran Kumar K 
---
 app/test-pmd/cmdline.c| 11 ++-
 app/test-pmd/parameters.c |  6 ++
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 0a6ed85f3..4eafee8c8 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -2334,7 +2334,16 @@ cmd_config_rss_parsed(void *parsed_result,
rss_conf.rss_hf = ETH_RSS_GTPU;
else if (!strcmp(res->value, "none"))
rss_conf.rss_hf = 0;
-   else if (!strcmp(res->value, "default"))
+   else if (!strcmp(res->value, "level-inner")) {
+   rss_hf &= (~ETH_RSS_LEVEL_MASK);
+   rss_conf.rss_hf = (rss_hf | ETH_RSS_LEVEL_INNER);
+   } else if (!strcmp(res->value, "level-outer")) {
+   rss_hf &= (~ETH_RSS_LEVEL_MASK);
+   rss_conf.rss_hf = (rss_hf | ETH_RSS_LEVEL_OUTER);
+   } else if (!strcmp(res->value, "level-inner-outer")) {
+   rss_hf &= (~ETH_RSS_LEVEL_MASK);
+   rss_conf.rss_hf = (rss_hf | ETH_RSS_LEVEL_INNER_OUTER);
+   } else if (!strcmp(res->value, "default"))
use_default = 1;
else if (isdigit(res->value[0]) && atoi(res->value) > 0 &&
atoi(res->value) < 64)
diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 7cb0e3d6e..5f669ff24 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -632,6 +632,8 @@ launch_args_parse(int argc, char** argv)
{ "forward-mode",   1, 0, 0 },
{ "rss-ip", 0, 0, 0 },
{ "rss-udp",0, 0, 0 },
+   { "rss-outer",  0, 0, 0 },
+   { "rss-inner-outer",0, 0, 0 },
{ "rxq",1, 0, 0 },
{ "txq",1, 0, 0 },
{ "rxd",1, 0, 0 },
@@ -1051,6 +1053,10 @@ launch_args_parse(int argc, char** argv)
rss_hf = ETH_RSS_IP;
if (!strcmp(lgopts[opt_idx].name, "rss-udp"))
rss_hf = ETH_RSS_UDP;
+   if (!strcmp(lgopts[opt_idx].name, "rss-outer"))
+   rss_hf |= ETH_RSS_LEVEL_OUTER;
+   if (!strcmp(lgopts[opt_idx].name, "rss-inner-outer"))
+   rss_hf |= ETH_RSS_LEVEL_INNER_OUTER;
if (!strcmp(lgopts[opt_idx].name, "rxq")) {
n = atoi(optarg);
if (n >= 0 && check_nb_rxq((queueid_t)n) == 0)
-- 
2.25.1

[dpdk-dev] [PATCH v6 3/3] net/octeontx2: add rss hash level support

[kirankumark]

From: Kiran Kumar K 

Add support to choose rss hash level from ethdev rss config.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_ethdev.h | 2 +-
 drivers/net/octeontx2/otx2_rss.c| 9 +++--
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index e9efe52bb..a11411239 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -119,7 +119,7 @@
 #define NIX_RSS_OFFLOAD(ETH_RSS_PORT | ETH_RSS_IP | 
ETH_RSS_UDP |\
 ETH_RSS_TCP | ETH_RSS_SCTP | \
 ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD | \
-NIX_RSS_L3_L4_SRC_DST)
+NIX_RSS_L3_L4_SRC_DST | ETH_RSS_LEVEL_MASK)
 
 #define NIX_TX_OFFLOAD_CAPA ( \
DEV_TX_OFFLOAD_MBUF_FAST_FREE   | \
diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c
index d859937e6..194f4e8af 100644
--- a/drivers/net/octeontx2/otx2_rss.c
+++ b/drivers/net/octeontx2/otx2_rss.c
@@ -323,6 +323,7 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
 struct rte_eth_rss_conf *rss_conf)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   uint8_t rss_hash_level;
uint32_t flowkey_cfg;
uint8_t alg_idx;
int rc;
@@ -339,7 +340,9 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev,
otx2_nix_rss_set_key(dev, rss_conf->rss_key,
 (uint32_t)rss_conf->rss_key_len);
 
-   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, 0);
+   rss_hash_level = ETH_RSS_LEVEL(rss_conf->rss_hf);
+   flowkey_cfg =
+   otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, rss_hash_level);
 
rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 NIX_DEFAULT_RSS_CTX_GROUP,
@@ -375,6 +378,7 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
uint32_t idx, qcnt = eth_dev->data->nb_rx_queues;
+   uint8_t rss_hash_level;
uint32_t flowkey_cfg;
uint64_t rss_hf;
uint8_t alg_idx;
@@ -399,7 +403,8 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev)
}
 
rss_hf = eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
-   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, 0);
+   rss_hash_level = ETH_RSS_LEVEL(rss_hf);
+   flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, rss_hash_level);
 
rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx,
 NIX_DEFAULT_RSS_CTX_GROUP,
-- 
2.25.1

[dpdk-dev] [PATCH v6 1/3] ethdev: add level support for RSS offload types

[kirankumark]

From: Kiran Kumar K 

This patch reserves 2 bits as input selection to select Inner and
outer layers for RSS computation. It is combined with existing
ETH_RSS_* to choose Inner or outer layers for L2, L3 and L4.
This functionality already exists in rte_flow through level parameter in
RSS action configuration rte_flow_action_rss.

Signed-off-by: Kiran Kumar K 
---
V7 Changes:
* Split ethdev and testpmd changes into seperate patches.

 lib/librte_ethdev/rte_ethdev.h | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index 70295d7ab..2a3a76d37 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -552,6 +552,33 @@ struct rte_eth_rss_conf {
 #define RTE_ETH_RSS_L3_PRE64  (1ULL << 53)
 #define RTE_ETH_RSS_L3_PRE96  (1ULL << 52)

+/*
+ * We use the following macros to combine with the above layers to choose
+ * inner and outer layers or both for RSS computation.
+ * Note: Default is 0: inner layers, 1: outer layers, 2: both
+ * bit 50 and 51 are reserved for this.
+ */
+
+/**
+ * Level 0, It basically stands for the innermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER(0ULL << 50)
+/**
+ * Level 1, It basically stands for the outermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_OUTER(1ULL << 50)
+/**
+ * Level 2, It basically stands for the both inner and outermost
+ * encapsulation level RSS can be performed on according to PMD and
+ * device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER_OUTER  (2ULL << 50)
+#define ETH_RSS_LEVEL_MASK(3ULL << 50)
+
+#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)
+
 /**
  * For input set change of hash filter, if SRC_ONLY and DST_ONLY of
  * the same level are used simultaneously, it is the same case as
--
2.25.1