Re: [dpdk-dev] [PATCH 00/12] FIPS improvements
Hi Akhil, I send 2 patch sets: one for new functionality support and another one for fixes. One patch was sent separately from both of the sets according to your requirement: >> examples/fips: fix bad return code in fips_test_parse_header() >examples/fips_validation: fix bad return value Can be a separate patch from >this set. Also send to stable. Please instruct me how to send the patches to stable. Thanks, Michael -Original Message- From: Akhil Goyal Sent: Wednesday, September 4, 2019 1:14 PM To: Michael Shamis ; marko.kovace...@intel.com Cc: dev@dpdk.org; Liron Himi Subject: [EXT] RE: [dpdk-dev] [PATCH 00/12] FIPS improvements External Email -- Hi Michael, Please try to improve descriptions and patch titles as per the suggestions given below. There are many patches which are fixes. Are the eligible for backport to stable branches? The support which is getting added, is it eligible for documentation update for the application. -Akhil > > Added support for ECB mode in TDES and AES. > Fixed some bugs in TDES and AES-GCM. > > Michael Shamis (12): > examples/fips: added support for SHA algorithm in FIPS tests examples/fips_validation: support SHA > examples/fips: added support for TDES ECB mode in FIPS tests examples/fips_validation: support TDES ECB > examples/fips: added support AES ECB mode in FIPS tests examples/fips_validation: support AES ECB > examples/fips: fix bad return code in fips_test_parse_header() examples/fips_validation: fix bad return value Can be a separate patch from this set. Also send to stable. > examples/fips: AES-GCM vectors will use aead structure examples/fips_validation: use AEAD based structs for AES-GCM rather it is a fix and should be sent to stable and the title would be examples/fips_validation: fix structs used for AES-GCM > examples/fips: set initial IV in AES-GCM if configured only salt > value examples/fips_validation: initialize IV for AES-GCM > examples/fips: keep digest after crypto text examples/fips_validation: move digest after cipher text > examples/fips: AES-GCM decryption vectors fix examples/fips_validation: fix AES-GCM decryption vector Add fixes line and cc stable. Can be a separate patchset for fixes. > examples/fips: fix KEY and PT output prints for TDES mode Does not have a patch description and title does not look to justify the patch. > examples/fips: supported IV, PT and CT init for TDES ECB mode Again there is no patch description and title is pretty long. Try to make it short. > examples/fips: algorithm definition by folder if it's not in file examples/fips_validation: improve algo parsing logic update description text to elaborate the need for this logic > examples/fips: erroneous overwrite of PLAINTEXT after DECRYPT examples/fips_validation: fix plain text overwrite send to stable and add fixes line. > > examples/fips_validation/fips_validation.c| 92 ++-- > examples/fips_validation/fips_validation.h| 7 + > .../fips_validation/fips_validation_aes.c | 1 + > .../fips_validation/fips_validation_gcm.c | 39 +++- > .../fips_validation/fips_validation_tdes.c| 7 + > examples/fips_validation/main.c | 204 +++--- > 6 files changed, 301 insertions(+), 49 deletions(-) > > -- > 2.23.0
Re: [dpdk-dev] [PATCH v1 22/38] net/mvpp2: flow: add support for RAW type
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 22/38] net/mvpp2: flow: add support for RAW type
From: Liron Himi
add support for RAW type and connect it to MUSDK UDF
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.h | 1 +
drivers/net/mvpp2/mrvl_flow.c | 141
2 files changed, 142 insertions(+)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h
index e7f75067f..be5e5a51b 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.h
+++ b/drivers/net/mvpp2/mrvl_ethdev.h
@@ -92,6 +92,7 @@ struct rte_flow {
struct pp2_cls_tbl_rule rule;
struct pp2_cls_cos_desc cos;
struct pp2_cls_tbl_action action;
+ uint8_t next_udf_id;
};
struct mrvl_mtr_profile {
diff --git a/drivers/net/mvpp2/mrvl_flow.c b/drivers/net/mvpp2/mrvl_flow.c
index ffa47a12e..3c8052f06 100644
--- a/drivers/net/mvpp2/mrvl_flow.c
+++ b/drivers/net/mvpp2/mrvl_flow.c
@@ -1196,6 +1196,146 @@ mrvl_parse_udp(const struct rte_flow_item *item,
return -rte_errno;
}
+static int
+mrvl_string_to_hex_values(const uint8_t *input_string,
+ uint8_t *hex_key,
+ uint8_t *length)
+{
+ char tmp_arr[3], tmp_string[MRVL_CLS_STR_SIZE_MAX], *string_iter;
+ int i;
+
+ strcpy(tmp_string, (const char *)input_string);
+ string_iter = tmp_string;
+
+ string_iter += 2; /* skip the '0x' */
+ *length = ((*length - 2) + 1) / 2;
+
+ for (i = 0; i < *length; i++) {
+ strncpy(tmp_arr, string_iter, 2);
+ tmp_arr[2] = '\0';
+ if (get_val_securely8(tmp_arr, 16,
+ &hex_key[*length - 1 - i]) < 0)
+ return -1;
+ string_iter += 2;
+ }
+
+ return 0;
+}
+
+/**
+ * Parse raw flow item.
+ *
+ * @param item Pointer to the flow item.
+ * @param flow Pointer to the flow.
+ * @param error Pointer to the flow error.
+ * @returns 0 on success, negative value otherwise.
+ */
+static int
+mrvl_parse_raw(const struct rte_flow_item *item,
+ struct rte_flow *flow,
+ struct rte_flow_error *error)
+{
+ const struct rte_flow_item_raw *spec = NULL, *mask = NULL;
+ struct pp2_cls_rule_key_field *key_field;
+ struct mv_net_udf *udf_params;
+ uint8_t length;
+ int ret;
+
+ ret = mrvl_parse_init(item, (const void **)&spec, (const void **)&mask,
+ &rte_flow_item_raw_mask,
+ sizeof(struct rte_flow_item_raw), error);
+ if (ret)
+ return ret;
+
+ if (!spec->pattern) {
+ rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
+ NULL, "pattern pointer MUST be given\n");
+ return -rte_errno;
+ }
+
+ /* Only hex string is supported; so, it must start with '0x' */
+ if (strncmp((const char *)spec->pattern, "0x", 2) != 0) {
+ rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
+ NULL, "'pattern' string must start with
'0x'\n");
+ return -rte_errno;
+ }
+
+ if (mask->pattern &&
+ strncmp((const char *)mask->pattern, "0x", 2) != 0) {
+ rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
+ NULL, "'mask-pattern' string must start with
'0x'\n");
+ return -rte_errno;
+ }
+
+ if (mask->search && spec->search) {
+ rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
+ NULL, "'search' option must be '0'\n");
+ return -rte_errno;
+ }
+
+ if (mask->offset && spec->offset != 0) {
+ rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
+ NULL, "'offset' option must be '0'\n");
+ return -rte_errno;
+ }
+
+ if (!mask->relative || !spec->relative) {
+ rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
+ NULL, "'relative' option must be given and
enabled\n");
+ return -rte_errno;
+ }
+
+ length = spec->length & mask->length;
+ if (!length) {
+ rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
+ NU
Re: [dpdk-dev] [PATCH v1 38/38] net/mvpp2: add fill_bpool_buffs to cfg file
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Dana Vardi ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 38/38] net/mvpp2: add fill_bpool_buffs to cfg file
From: Dana Vardi
extend config file with 'fill_bpool_buffs'
which control the amount of refill buffers
Signed-off-by: Dana Vardi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 7 --- drivers/net/mvpp2/mrvl_ethdev.h
| 3 +++
drivers/net/mvpp2/mrvl_qos.c| 21 +
drivers/net/mvpp2/mrvl_qos.h| 1 +
4 files changed, 29 insertions(+), 3 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index ca94805fb..725ecced4 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -52,8 +52,6 @@
#define MRVL_IFACE_NAME_ARG "iface"
#define MRVL_CFG_ARG "cfg"
-#define MRVL_BURST_SIZE 64
-
#define MRVL_ARP_LENGTH 28
#define MRVL_COOKIE_ADDR_INVALID ~0ULL
@@ -799,12 +797,15 @@ mrvl_dev_start(struct rte_eth_dev *dev)
priv->ppio_params.match = match;
priv->ppio_params.eth_start_hdr = PP2_PPIO_HDR_ETH;
priv->forward_bad_frames = 0;
+ priv->fill_bpool_buffs = MRVL_BURST_SIZE;
if (mrvl_cfg) {
priv->ppio_params.eth_start_hdr =
mrvl_cfg->port[dev->data->port_id].eth_start_hdr;
priv->forward_bad_frames =
mrvl_cfg->port[dev->data->port_id].forward_bad_frames;
+ priv->fill_bpool_buffs =
+ mrvl_cfg->port[dev->data->port_id].fill_bpool_buffs;
}
/*
@@ -2754,7 +2755,7 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
if (unlikely(num <= q->priv->bpool_min_size ||
(!rx_done && num < q->priv->bpool_init_size))) {
- ret = mrvl_fill_bpool(q, MRVL_BURST_SIZE);
+ ret = mrvl_fill_bpool(q, q->priv->fill_bpool_buffs);
if (ret)
MRVL_LOG(DEBUG, "Failed to fill bpool");
} else if (unlikely(num > q->priv->bpool_max_size)) { diff
--git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h index
2c1c159b9..fc4f3b799 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.h
+++ b/drivers/net/mvpp2/mrvl_ethdev.h
@@ -82,6 +82,8 @@
/** Maximum length of a match string */ #define MRVL_MATCH_LEN 16
+#define MRVL_BURST_SIZE 64
+
/** PMD-specific definition of a flow rule handle. */ struct mrvl_mtr;
struct rte_flow { @@ -184,6 +186,7 @@ struct mrvl_priv {
uint64_t rate_max;
uint8_t forward_bad_frames;
+ uint32_t fill_bpool_buffs;
};
/** Flow operations forward declaration. */ diff --git
a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index
d9af07c3d..8a6ad5d3b 100644
--- a/drivers/net/mvpp2/mrvl_qos.c
+++ b/drivers/net/mvpp2/mrvl_qos.c
@@ -79,6 +79,9 @@
/* paser forward bad frames tokens */
#define MRVL_TOK_FWD_BAD_FRAMES "forward_bad_frames"
+/* parse fill bpool buffers tokens */
+#define MRVL_TOK_FILL_BPOOL_BUFFS "fill_bpool_buffs"
+
/** Number of tokens in range a-b = 2. */ #define MAX_RNG_TOKENS 2
@@ -720,6 +723,11 @@ mrvl_get_cfg(const char *key __rte_unused, const char
*path, void *extra_args)
/* Use global defaults, unless an override occurs */
(*cfg)->port[n].use_qos_global_defaults = 1;
+ /* Set non-zero defaults before the decision to continue to next
+* port or to parse the port section in config file
+*/
+ (*cfg)->port[n].fill_bpool_buffs = MRVL_BURST_SIZE;
+
/* Skip ports non-existing in configuration. */
if (rte_cfgfile_num_sections(file, sec_name,
strlen(sec_name)) <= 0) {
@@ -889,6 +897,19 @@ mrvl_get_cfg(const char *key __rte_unused, const char
*path, void *extra_args)
} else {
(*cfg)->port[n].forward_bad_frames = 0;
}
+
+ /* Parse fill bpool buffs option */
+ entry = rte_cfgfile_get_entry(file, sec_name,
+ MRVL_TOK_FILL_BPOOL_BUFFS);
+ if (entry) {
+ if (get_val_securely(entry, &val) < 0) {
+ MRVL_LOG(ERR,
+ "Error in parsing %s value (%s)!\n",
+ MRVL_TOK_FILL_BPOOL_BUFFS, entry);
+ return -1;
+ }
+ (*cfg)->port[n].fill_bpool_buffs = val
Re: [dpdk-dev] [PATCH v1 37/38] net/mvpp2: update qos defaults parameter name
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Dana Vardi ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 37/38] net/mvpp2: update qos defaults parameter
name
From: Dana Vardi
'global_default' is only being used for 'qos'
so adding 'qos' into its name
Signed-off-by: Dana Vardi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 2 +-
drivers/net/mvpp2/mrvl_qos.c| 12 ++--
drivers/net/mvpp2/mrvl_qos.h| 2 +-
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 4b5c4f075..ca94805fb 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -902,7 +902,7 @@ mrvl_dev_start(struct rte_eth_dev *dev)
/* For default QoS config, don't start classifier. */
if (mrvl_cfg &&
- mrvl_cfg->port[dev->data->port_id].use_global_defaults == 0) {
+ mrvl_cfg->port[dev->data->port_id].use_qos_global_defaults == 0) {
ret = mrvl_start_qos_mapping(priv);
if (ret) {
MRVL_LOG(ERR, "Failed to setup QoS mapping"); diff
--git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index
f3936aec4..d9af07c3d 100644
--- a/drivers/net/mvpp2/mrvl_qos.c
+++ b/drivers/net/mvpp2/mrvl_qos.c
@@ -321,7 +321,7 @@ parse_tc_cfg(struct rte_cfgfile *file, int port, int tc,
if (rte_cfgfile_num_sections(file, sec_name, strlen(sec_name)) <= 0)
return 0;
- cfg->port[port].use_global_defaults = 0;
+ cfg->port[port].use_qos_global_defaults = 0;
entry = rte_cfgfile_get_entry(file, sec_name, MRVL_TOK_RXQ);
if (entry) {
n = get_entry_values(entry,
@@ -718,7 +718,7 @@ mrvl_get_cfg(const char *key __rte_unused, const char
*path, void *extra_args)
MRVL_TOK_PORT, n, MRVL_TOK_DEFAULT);
/* Use global defaults, unless an override occurs */
- (*cfg)->port[n].use_global_defaults = 1;
+ (*cfg)->port[n].use_qos_global_defaults = 1;
/* Skip ports non-existing in configuration. */
if (rte_cfgfile_num_sections(file, sec_name, @@ -796,7 +796,7
@@ mrvl_get_cfg(const char *key __rte_unused, const char *path, void
*extra_args)
entry = rte_cfgfile_get_entry(file, sec_name,
MRVL_TOK_MAPPING_PRIORITY);
if (entry) {
- (*cfg)->port[n].use_global_defaults = 0;
+ (*cfg)->port[n].use_qos_global_defaults = 0;
if (!strncmp(entry, MRVL_TOK_VLAN_IP,
sizeof(MRVL_TOK_VLAN_IP)))
(*cfg)->port[n].mapping_priority =
@@ -828,7 +828,7 @@ mrvl_get_cfg(const char *key __rte_unused, const char
*path, void *extra_args)
entry = rte_cfgfile_get_entry(file, sec_name,
MRVL_TOK_PLCR_DEFAULT);
if (entry) {
- (*cfg)->port[n].use_global_defaults = 0;
+ (*cfg)->port[n].use_qos_global_defaults = 0;
if (get_val_securely(entry, &val) < 0)
return -1;
@@ -867,7 +867,7 @@ mrvl_get_cfg(const char *key __rte_unused, const char
*path, void *extra_args)
return -1;
(*cfg)->port[n].default_tc = (uint8_t)val;
} else {
- if ((*cfg)->port[n].use_global_defaults == 0) {
+ if ((*cfg)->port[n].use_qos_global_defaults == 0) {
MRVL_LOG(ERR,
"Default Traffic Class required in "
"custom configuration!");
@@ -984,7 +984,7 @@ mrvl_configure_rxqs(struct mrvl_priv *priv, uint16_t portid,
size_t i, tc;
if (mrvl_cfg == NULL ||
- mrvl_cfg->port[portid].use_global_defaults) {
+ mrvl_cfg->port[portid].use_qos_global_defaults) {
/*
* No port configuration, use default: 1 TC, no QoS,
* TC color set to green.
diff --git a/drivers/net/mvpp2/mrvl_qos.h b/drivers/net/mvpp2/mrvl_qos.h index
f2e341c37..763130bf1 100644
--- a/drivers/net/mvpp2/mrvl_qos.h
+++ b/drivers/net/mvpp2/mrvl_qos.h
@@ -45,7 +45,7 @@ struct mrvl_cfg {
uint16_t inqs;
uint16_t outqs;
uint8_t default_tc;
- uint8_t use_global_defaults;
+ uint8_t use_qos_global_defaults;
struct pp2_cls_plcr_params policer_params;
uint8_t setup_policer;
uint8_t forward_bad_frames;
--
2.28.0
Re: [dpdk-dev] [PATCH v1 36/38] net/mvpp2: forward bad packets support
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Dana Vardi ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 36/38] net/mvpp2: forward bad packets support
From: Dana Vardi
extend the config file with option to forward packets that were marked as "l2
bad pkts".
by default the driver drop those packets
Signed-off-by: Dana Vardi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 10 --
drivers/net/mvpp2/mrvl_ethdev.h | 2 ++
drivers/net/mvpp2/mrvl_qos.c| 17 +
drivers/net/mvpp2/mrvl_qos.h| 1 +
4 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index cb792300b..4b5c4f075 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -798,9 +798,14 @@ mrvl_dev_start(struct rte_eth_dev *dev)
priv->pp_id, priv->ppio_id);
priv->ppio_params.match = match;
priv->ppio_params.eth_start_hdr = PP2_PPIO_HDR_ETH;
- if (mrvl_cfg)
+ priv->forward_bad_frames = 0;
+
+ if (mrvl_cfg) {
priv->ppio_params.eth_start_hdr =
mrvl_cfg->port[dev->data->port_id].eth_start_hdr;
+ priv->forward_bad_frames =
+ mrvl_cfg->port[dev->data->port_id].forward_bad_frames;
+ }
/*
* Calculate the minimum bpool size for refill feature as follows:
@@ -2709,7 +2714,8 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
/* drop packet in case of mac, overrun or resource error */
status = pp2_ppio_inq_desc_get_l2_pkt_error(&descs[i]);
- if (unlikely(status != PP2_DESC_ERR_OK)) {
+ if ((unlikely(status != PP2_DESC_ERR_OK)) &&
+ !(q->priv->forward_bad_frames)) {
struct pp2_buff_inf binf = {
.addr = rte_mbuf_data_iova_default(mbuf),
.cookie = (uint64_t)mbuf,
diff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h
index 148f2acba..2c1c159b9 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.h
+++ b/drivers/net/mvpp2/mrvl_ethdev.h
@@ -182,6 +182,8 @@ struct mrvl_priv {
LIST_HEAD(shaper_profiles, mrvl_tm_shaper_profile) shaper_profiles;
LIST_HEAD(nodes, mrvl_tm_node) nodes;
uint64_t rate_max;
+
+ uint8_t forward_bad_frames;
};
/** Flow operations forward declaration. */ diff --git
a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index
10e8636b4..f3936aec4 100644
--- a/drivers/net/mvpp2/mrvl_qos.c
+++ b/drivers/net/mvpp2/mrvl_qos.c
@@ -76,6 +76,8 @@
#define MRVL_TOK_PARSER_UDF_PROTO_UDP "udp"
#define MRVL_TOK_PARSER_UDF_FIELD_UDP_DPORT "dport"
+/* paser forward bad frames tokens */
+#define MRVL_TOK_FWD_BAD_FRAMES "forward_bad_frames"
/** Number of tokens in range a-b = 2. */ #define MAX_RNG_TOKENS 2 @@ -872,6
+874,21 @@ mrvl_get_cfg(const char *key __rte_unused, const char *path, void
*extra_args)
return -1;
}
}
+
+ /* Parse forward bad frames option */
+ entry = rte_cfgfile_get_entry(file, sec_name,
+ MRVL_TOK_FWD_BAD_FRAMES);
+ if (entry) {
+ if (get_val_securely(entry, &val) < 0) {
+ MRVL_LOG(ERR,
+ "Error in parsing %s value (%s)!\n",
+ MRVL_TOK_FWD_BAD_FRAMES, entry);
+ return -1;
+ }
+ (*cfg)->port[n].forward_bad_frames = (uint8_t)val;
+ } else {
+ (*cfg)->port[n].forward_bad_frames = 0;
+ }
}
return 0;
diff --git a/drivers/net/mvpp2/mrvl_qos.h b/drivers/net/mvpp2/mrvl_qos.h index
daf4776ec..f2e341c37 100644
--- a/drivers/net/mvpp2/mrvl_qos.h
+++ b/drivers/net/mvpp2/mrvl_qos.h
@@ -48,6 +48,7 @@ struct mrvl_cfg {
uint8_t use_global_defaults;
struct pp2_cls_plcr_params policer_params;
uint8_t setup_policer;
+ uint8_t forward_bad_frames;
} port[RTE_MAX_ETHPORTS];
};
--
2.28.0
Re: [dpdk-dev] [PATCH v1 35/38] net/mvpp2: support custom header before ethernet
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Dana Vardi ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 35/38] net/mvpp2: support custom header before
ethernet
From: Dana Vardi
extend 'start_hdr' options with custom header.
Signed-off-by: Dana Vardi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_qos.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index
c7bd8825c..10e8636b4 100644
--- a/drivers/net/mvpp2/mrvl_qos.c
+++ b/drivers/net/mvpp2/mrvl_qos.c
@@ -23,6 +23,7 @@
#define MRVL_TOK_START_HDR "start_hdr"
#define MRVL_TOK_START_HDR_NONE "none"
#define MRVL_TOK_START_HDR_DSA "dsa"
+#define MRVL_TOK_START_HDR_CUSTOM "custom"
#define MRVL_TOK_START_HDR_EXT_DSA "ext_dsa"
#define MRVL_TOK_DEFAULT_TC "default_tc"
#define MRVL_TOK_DSCP "dscp"
@@ -742,6 +743,10 @@ mrvl_get_cfg(const char *key __rte_unused, const char
*path, void *extra_args)
sizeof(MRVL_TOK_START_HDR_DSA)))
(*cfg)->port[n].eth_start_hdr =
PP2_PPIO_HDR_ETH_DSA;
+ else if (!strncmp(entry, MRVL_TOK_START_HDR_CUSTOM,
+ sizeof(MRVL_TOK_START_HDR_CUSTOM)))
+ (*cfg)->port[n].eth_start_hdr =
+ PP2_PPIO_HDR_ETH_CUSTOM;
else if (!strncmp(entry, MRVL_TOK_START_HDR_EXT_DSA,
sizeof(MRVL_TOK_START_HDR_EXT_DSA))) {
(*cfg)->port[n].eth_start_hdr =
--
2.28.0
Re: [dpdk-dev] [PATCH v1 34/38] net/mvpp2: consider ptype in cksum info
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 34/38] net/mvpp2: consider ptype in cksum info
From: Liron Himi
provide checksum information based on the ptype.
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 34 +++--
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index fe5fd90ef..cb792300b 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -2622,23 +2622,27 @@ mrvl_desc_to_packet_type_and_offset(struct
pp2_ppio_desc *desc,
* Mbuf offload flags.
*/
static inline uint64_t
-mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc)
+mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc, uint64_t packet_type)
{
- uint64_t flags;
+ uint64_t flags = 0;
enum pp2_inq_desc_status status;
- status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
- if (unlikely(status != PP2_DESC_ERR_OK))
- flags = PKT_RX_IP_CKSUM_BAD;
- else
- flags = PKT_RX_IP_CKSUM_GOOD;
-
- status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
- if (unlikely(status != PP2_DESC_ERR_OK))
- flags |= PKT_RX_L4_CKSUM_BAD;
- else
- flags |= PKT_RX_L4_CKSUM_GOOD;
+ if (RTE_ETH_IS_IPV4_HDR(packet_type)) {
+ status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
+ if (unlikely(status != PP2_DESC_ERR_OK))
+ flags |= PKT_RX_IP_CKSUM_BAD;
+ else
+ flags |= PKT_RX_IP_CKSUM_GOOD;
+ }
+ if (((packet_type & RTE_PTYPE_L4_UDP) == RTE_PTYPE_L4_UDP) ||
+ ((packet_type & RTE_PTYPE_L4_TCP) == RTE_PTYPE_L4_TCP)) {
+ status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
+ if (unlikely(status != PP2_DESC_ERR_OK))
+ flags |= PKT_RX_L4_CKSUM_BAD;
+ else
+ flags |= PKT_RX_L4_CKSUM_GOOD;
+ }
return flags;
}
@@ -2731,7 +2735,9 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
mbuf->udata64 = q->port_id;
if (likely(q->cksum_enabled))
- mbuf->ol_flags = mrvl_desc_to_ol_flags(&descs[i]);
+ mbuf->ol_flags =
+ mrvl_desc_to_ol_flags(&descs[i],
+ mbuf->packet_type);
rx_pkts[rx_done++] = mbuf;
q->bytes_recv += mbuf->pkt_len;
--
2.28.0
Re: [dpdk-dev] [PATCH v1 32/38] net/mvpp2: apply flow-ctrl after port init
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 32/38] net/mvpp2: apply flow-ctrl after port init
From: Liron Himi
in case ppio was not initialized yet (only at 'start' function) the flow-ctrl
setting should be saved for later stage.
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 26 +-
drivers/net/mvpp2/mrvl_ethdev.h | 2 ++
2 files changed, 23 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index d388fde96..fe5fd90ef 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -164,6 +164,8 @@ static int
mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on);
static int mrvl_promiscuous_enable(struct rte_eth_dev *dev); static int
mrvl_allmulticast_enable(struct rte_eth_dev *dev);
+static int
+mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf
+*fc_conf);
#define MRVL_XSTATS_TBL_ENTRY(name) { \
#name, offsetof(struct pp2_ppio_statistics, name), \
@@ -912,6 +914,15 @@ mrvl_dev_start(struct rte_eth_dev *dev)
if (dev->data->promiscuous == 1)
mrvl_promiscuous_enable(dev);
+ if (priv->flow_ctrl) {
+ ret = mrvl_flow_ctrl_set(dev, &priv->fc_conf);
+ if (ret) {
+ MRVL_LOG(ERR, "Failed to configure flow control");
+ goto out;
+ }
+ priv->flow_ctrl = 0;
+ }
+
if (dev->data->dev_link.link_status == ETH_LINK_UP) {
ret = mrvl_dev_set_link_up(dev);
if (ret) {
@@ -2147,8 +2158,10 @@ mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct
rte_eth_fc_conf *fc_conf)
struct mrvl_priv *priv = dev->data->dev_private;
int ret, en;
- if (!priv)
- return -EPERM;
+ if (!priv->ppio) {
+ memcpy(fc_conf, &priv->fc_conf, sizeof(struct rte_eth_fc_conf));
+ return 0;
+ }
fc_conf->autoneg = 1;
ret = pp2_ppio_get_rx_pause(priv->ppio, &en); @@ -2194,9 +2207,6 @@
mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
int ret;
int rx_en, tx_en;
- if (!priv)
- return -EPERM;
-
if (fc_conf->high_water ||
fc_conf->low_water ||
fc_conf->pause_time ||
@@ -2211,6 +2221,12 @@ mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct
rte_eth_fc_conf *fc_conf)
return -EINVAL;
}
+ if (!priv->ppio) {
+ memcpy(&priv->fc_conf, fc_conf, sizeof(struct rte_eth_fc_conf));
+ priv->flow_ctrl = 1;
+ return 0;
+ }
+
switch (fc_conf->mode) {
case RTE_FC_FULL:
rx_en = 1;
diff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h
index ada2c51b2..148f2acba 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.h
+++ b/drivers/net/mvpp2/mrvl_ethdev.h
@@ -161,6 +161,8 @@ struct mrvl_priv {
uint8_t isolated;
uint8_t multiseg;
uint16_t max_mtu;
+ uint8_t flow_ctrl;
+ struct rte_eth_fc_conf fc_conf;
struct pp2_ppio_params ppio_params;
struct pp2_cls_qos_tbl_params qos_tbl_params;
--
2.28.0
Re: [dpdk-dev] [PATCH v1 33/38] net/mvpp2: change dsa_mode naming
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Dana Vardi ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 33/38] net/mvpp2: change dsa_mode naming
From: Dana Vardi
change 'dsa_mode' to 'start_hdr' in config file
Signed-off-by: Dana Vardi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_qos.c | 29 +++--
1 file changed, 19 insertions(+), 10 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index
23a014ade..c7bd8825c 100644
--- a/drivers/net/mvpp2/mrvl_qos.c
+++ b/drivers/net/mvpp2/mrvl_qos.c
@@ -20,9 +20,10 @@
/* Parsing tokens. Defined conveniently, so that any correction is easy. */
#define MRVL_TOK_DEFAULT "default"
#define MRVL_TOK_DSA_MODE "dsa_mode"
-#define MRVL_TOK_DSA_MODE_NONE "none"
-#define MRVL_TOK_DSA_MODE_DSA "dsa"
-#define MRVL_TOK_DSA_MODE_EXT_DSA "ext_dsa"
+#define MRVL_TOK_START_HDR "start_hdr"
+#define MRVL_TOK_START_HDR_NONE "none"
+#define MRVL_TOK_START_HDR_DSA "dsa"
+#define MRVL_TOK_START_HDR_EXT_DSA "ext_dsa"
#define MRVL_TOK_DEFAULT_TC "default_tc"
#define MRVL_TOK_DSCP "dscp"
#define MRVL_TOK_MAPPING_PRIORITY "mapping_priority"
@@ -722,25 +723,33 @@ mrvl_get_cfg(const char *key __rte_unused, const char
*path, void *extra_args)
continue;
}
+ /* MRVL_TOK_START_HDR replaces MRVL_TOK_DSA_MODE parameter.
+* MRVL_TOK_DSA_MODE will be supported for backward
+* compatibillity.
+*/
entry = rte_cfgfile_get_entry(file, sec_name,
+ MRVL_TOK_START_HDR);
+ /* if start_hsr is missing, check if dsa_mode exist instead */
+ if (entry == NULL)
+ entry = rte_cfgfile_get_entry(file, sec_name,
MRVL_TOK_DSA_MODE);
if (entry) {
- if (!strncmp(entry, MRVL_TOK_DSA_MODE_NONE,
- sizeof(MRVL_TOK_DSA_MODE_NONE)))
+ if (!strncmp(entry, MRVL_TOK_START_HDR_NONE,
+ sizeof(MRVL_TOK_START_HDR_NONE)))
(*cfg)->port[n].eth_start_hdr =
PP2_PPIO_HDR_ETH;
- else if (!strncmp(entry, MRVL_TOK_DSA_MODE_DSA,
- sizeof(MRVL_TOK_DSA_MODE_DSA)))
+ else if (!strncmp(entry, MRVL_TOK_START_HDR_DSA,
+ sizeof(MRVL_TOK_START_HDR_DSA)))
(*cfg)->port[n].eth_start_hdr =
PP2_PPIO_HDR_ETH_DSA;
- else if (!strncmp(entry, MRVL_TOK_DSA_MODE_EXT_DSA,
- sizeof(MRVL_TOK_DSA_MODE_EXT_DSA))) {
+ else if (!strncmp(entry, MRVL_TOK_START_HDR_EXT_DSA,
+ sizeof(MRVL_TOK_START_HDR_EXT_DSA))) {
(*cfg)->port[n].eth_start_hdr =
PP2_PPIO_HDR_ETH_EXT_DSA;
} else {
MRVL_LOG(ERR,
"Error in parsing %s value (%s)!\n",
- MRVL_TOK_DSA_MODE, entry);
+ MRVL_TOK_START_HDR, entry);
return -1;
}
} else {
--
2.28.0
Re: [dpdk-dev] [PATCH v1 30/38] net/mvpp2: expose max mtu size
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi ; Yuri Chipchev
Subject: [dpdk-dev] [PATCH v1 30/38] net/mvpp2: expose max mtu size
From: Liron Himi
expose max-mtu based on the max frame size that
l4 checksum generation can be done by HW.
Signed-off-by: Liron Himi
Reviewed-by: Yuri Chipchev
---
drivers/net/mvpp2/mrvl_ethdev.c | 24 ++--
drivers/net/mvpp2/mrvl_ethdev.h | 1 +
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 535d7cc60..9fd9269eb 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -477,9 +477,17 @@ mrvl_dev_configure(struct rte_eth_dev *dev)
return -EINVAL;
}
- if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
+ if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
+{
dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
MRVL_PP2_ETH_HDRS_LEN;
+ if (dev->data->mtu > priv->max_mtu) {
+ MRVL_LOG(ERR, "inherit MTU %u from max_rx_pkt_len %u is
larger than max_mtu %u\n",
+dev->data->mtu,
+dev->data->dev_conf.rxmode.max_rx_pkt_len,
+priv->max_mtu);
+ return -EINVAL;
+ }
+ }
if (dev->data->dev_conf.txmode.offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
priv->multiseg = 1;
@@ -1676,9 +1684,11 @@ mrvl_xstats_get_names(struct rte_eth_dev *dev
__rte_unused,
* Info structure output buffer.
*/
static int
-mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
+mrvl_dev_infos_get(struct rte_eth_dev *dev,
struct rte_eth_dev_info *info)
{
+ struct mrvl_priv *priv = dev->data->dev_private;
+
info->speed_capa = ETH_LINK_SPEED_10M |
ETH_LINK_SPEED_100M |
ETH_LINK_SPEED_1G |
@@ -1710,6 +1720,7 @@ mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
info->default_rxconf.rx_drop_en = 1;
info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
+ info->max_mtu = priv->max_mtu;
return 0;
}
@@ -3125,6 +3136,7 @@ mrvl_priv_create(const char *dev_name)
struct pp2_bpool_params bpool_params;
char match[MRVL_MATCH_LEN];
struct mrvl_priv *priv;
+ uint16_t max_frame_size;
int ret, bpool_bit;
priv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id());
@@ -3136,6 +3148,14 @@ mrvl_priv_create(const char *dev_name)
if (ret)
goto out_free_priv;
+ ret = pp2_ppio_get_l4_cksum_max_frame_size(priv->pp_id, priv->ppio_id,
+ &max_frame_size);
+ if (ret)
+ goto out_free_priv;
+
+ priv->max_mtu = max_frame_size + RTE_ETHER_CRC_LEN -
+ MRVL_PP2_ETH_HDRS_LEN;
+
bpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],
PP2_BPOOL_NUM_POOLS);
if (bpool_bit < 0)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h
index 24dbe20d7..ada2c51b2 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.h
+++ b/drivers/net/mvpp2/mrvl_ethdev.h
@@ -160,6 +160,7 @@ struct mrvl_priv {
uint8_t vlan_flushed;
uint8_t isolated;
uint8_t multiseg;
+ uint16_t max_mtu;
struct pp2_ppio_params ppio_params;
struct pp2_cls_qos_tbl_params qos_tbl_params;
--
2.28.0
Re: [dpdk-dev] [PATCH v1 31/38] net/mvpp2: add support of LINK_SPEED_2_5G
Reviewed-by: Michael Shamis -Original Message- From: dev On Behalf Of lir...@marvell.com Sent: Wednesday, December 2, 2020 12:12 PM To: Jerin Jacob Kollanukkaran Cc: dev@dpdk.org; Meir Levi ; Liron Himi Subject: [dpdk-dev] [PATCH v1 31/38] net/mvpp2: add support of LINK_SPEED_2_5G From: Meir Levi update capability with 2.5G support Signed-off-by: Meir Levi Reviewed-by: Liron Himi --- drivers/net/mvpp2/mrvl_ethdev.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index 9fd9269eb..d388fde96 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -1193,6 +1193,9 @@ mrvl_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused) case SPEED_1000: dev->data->dev_link.link_speed = ETH_SPEED_NUM_1G; break; + case SPEED_2500: + dev->data->dev_link.link_speed = ETH_SPEED_NUM_2_5G; + break; case SPEED_1: dev->data->dev_link.link_speed = ETH_SPEED_NUM_10G; break; @@ -1692,6 +1695,7 @@ mrvl_dev_infos_get(struct rte_eth_dev *dev, info->speed_capa = ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | ETH_LINK_SPEED_1G | + ETH_LINK_SPEED_2_5G | ETH_LINK_SPEED_10G; info->max_rx_queues = MRVL_PP2_RXQ_MAX; -- 2.28.0
Re: [dpdk-dev] [PATCH v1 29/38] net/mvpp2: autoneg disable handling
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 29/38] net/mvpp2: autoneg disable handling
From: Yuri Chipchev
flow control autoneg disable is not supported
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 66c3c8e57..535d7cc60 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -2135,6 +2135,7 @@ mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct
rte_eth_fc_conf *fc_conf)
if (!priv)
return -EPERM;
+ fc_conf->autoneg = 1;
ret = pp2_ppio_get_rx_pause(priv->ppio, &en);
if (ret) {
MRVL_LOG(ERR, "Failed to read rx pause state"); @@ -2184,13
+2185,17 @@ mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf
*fc_conf)
if (fc_conf->high_water ||
fc_conf->low_water ||
fc_conf->pause_time ||
- fc_conf->mac_ctrl_frame_fwd ||
- fc_conf->autoneg) {
+ fc_conf->mac_ctrl_frame_fwd) {
MRVL_LOG(ERR, "Flowctrl parameter is not supported");
return -EINVAL;
}
+ if (fc_conf->autoneg == 0) {
+ MRVL_LOG(ERR, "Flowctrl Autoneg disable is not supported");
+ return -EINVAL;
+ }
+
switch (fc_conf->mode) {
case RTE_FC_FULL:
rx_en = 1;
--
2.28.0
Re: [dpdk-dev] [PATCH v1 28/38] net/mvpp2: propagate port-id in udata64
Reviewed-by: Michael Shamis -Original Message- From: dev On Behalf Of lir...@marvell.com Sent: Wednesday, December 2, 2020 12:12 PM To: Jerin Jacob Kollanukkaran Cc: dev@dpdk.org; Liron Himi Subject: [dpdk-dev] [PATCH v1 28/38] net/mvpp2: propagate port-id in udata64 From: Liron Himi mbuf->port can be override and used for eventdev so saving the port-id information in another field tht can be query by application Signed-off-by: Liron Himi Reviewed-by: Liron Himi --- drivers/net/mvpp2/mrvl_ethdev.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index 1f9489d77..66c3c8e57 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -2693,6 +2693,7 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) mbuf->l2_len = l3_offset; mbuf->l3_len = l4_offset - l3_offset; + mbuf->udata64 = q->port_id; if (likely(q->cksum_enabled)) mbuf->ol_flags = mrvl_desc_to_ol_flags(&descs[i]); -- 2.28.0
Re: [dpdk-dev] [PATCH v1 27/38] net/mvpp2: dummy pool creation
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 27/38] net/mvpp2: dummy pool creation
From: Liron Himi
Currently the HW is configured with only one pool which its buffer size may be
larger than the rx-fifo-size.
In that situation, frame size larger than the fifo-size is gets dropped due to
fifo overrun.
this is cause because the HW works in cut-through mode which waits to have in
the fifo at least the amount of bytes as define in the smallest pool's buffer
size.
This patch add a dummy pool which its buffer size is very small (smaller than
64B frame). this tricks the HW and any frame size is gets passed from the FIFO
to the PP2.
Signed-off-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 71 ++---
drivers/net/mvpp2/mrvl_ethdev.h | 2 +
drivers/net/mvpp2/mrvl_qos.c| 1 +
3 files changed, 60 insertions(+), 14 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 127861a82..1f9489d77 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -90,6 +90,8 @@ static int used_bpools[PP2_NUM_PKT_PROC] = { static struct
pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS];
static int
mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE];
static uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID;
+static int dummy_pool_id[PP2_NUM_PKT_PROC]; struct pp2_bpool
+*dummy_pool[PP2_NUM_PKT_PROC] = {0};
struct mrvl_ifnames {
const char *names[PP2_NUM_ETH_PPIO * PP2_NUM_PKT_PROC]; @@ -189,6
+191,19 @@ static struct {
MRVL_XSTATS_TBL_ENTRY(tx_errors)
};
+static inline int
+mrvl_reserve_bit(int *bitmap, int max)
+{
+ int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
+
+ if (n >= max)
+ return -1;
+
+ *bitmap |= 1 << n;
+
+ return n;
+}
+
/**
* Initialize packet processor.
*
@@ -199,6 +214,9 @@ static int
mrvl_init_pp2(void)
{
struct pp2_init_params init_params;
+ struct pp2_bpool_params bpool_params;
+ charname[15];
+ int err, i;
memset(&init_params, 0, sizeof(init_params));
init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED; @@ -207,7
+225,36 @@ mrvl_init_pp2(void)
if (mrvl_cfg && mrvl_cfg->pp2_cfg.prs_udfs.num_udfs)
memcpy(&init_params.prs_udfs, &mrvl_cfg->pp2_cfg.prs_udfs,
sizeof(struct pp2_parse_udfs));
- return pp2_init(&init_params);
+ err = pp2_init(&init_params);
+ if (err != 0) {
+ MRVL_LOG(ERR, "PP2 init failed");
+ return -1;
+ }
+
+ memset(dummy_pool, 0, sizeof(dummy_pool));
+ for (i = 0; i < pp2_get_num_inst(); i++) {
+ dummy_pool_id[i] = mrvl_reserve_bit(&used_bpools[i],
+PP2_BPOOL_NUM_POOLS);
+ if (dummy_pool_id[i] < 0) {
+ MRVL_LOG(ERR, "Can't find free pool\n");
+ return -1;
+ }
+
+ memset(name, 0, sizeof(name));
+ snprintf(name, sizeof(name), "pool-%d:%d", i, dummy_pool_id[i]);
+ memset(&bpool_params, 0, sizeof(bpool_params));
+ bpool_params.match = name;
+ bpool_params.buff_len = MRVL_PKT_OFFS;
+ bpool_params.dummy_short_pool = 1;
+ err = pp2_bpool_init(&bpool_params, &dummy_pool[i]);
+ if (err != 0 || !dummy_pool[i]) {
+ MRVL_LOG(ERR, "BPool init failed!\n");
+ used_bpools[i] &= ~(1 << dummy_pool_id[i]);
+ return -1;
+ }
+ }
+
+ return 0;
}
/**
@@ -219,6 +266,15 @@ mrvl_init_pp2(void) static void
mrvl_deinit_pp2(void)
{
+ int i;
+
+ for (i = 0; i < PP2_NUM_PKT_PROC; i++) {
+ if (!dummy_pool[i])
+ continue;
+ pp2_bpool_deinit(dummy_pool[i]);
+ used_bpools[i] &= ~(1 << dummy_pool_id[i]);
+ }
+
pp2_deinit();
}
@@ -259,19 +315,6 @@ mrvl_get_bpool_size(int pp2_id, int pool_id)
return size;
}
-static inline int
-mrvl_reserve_bit(int *bitmap, int max)
-{
- int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
-
- if (n >= max)
- return -1;
-
- *bitmap |= 1 << n;
-
- return n;
-}
-
static int
mrvl_init_hif(int core_id)
{
diff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h
index 5dbd8b46c..24dbe20d7 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.h
+
Re: [dpdk-dev] [PATCH v1 26/38] net/mvpp2: rearrange functions order
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 26/38] net/mvpp2: rearrange functions order
From: Liron Himi
rearrange functions order
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 98 -
1 file changed, 49 insertions(+), 49 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 5ff11e2c9..127861a82 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -189,6 +189,39 @@ static struct {
MRVL_XSTATS_TBL_ENTRY(tx_errors)
};
+/**
+ * Initialize packet processor.
+ *
+ * @return
+ * 0 on success, negative error value otherwise.
+ */
+static int
+mrvl_init_pp2(void)
+{
+ struct pp2_init_params init_params;
+
+ memset(&init_params, 0, sizeof(init_params));
+ init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
+ init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
+ init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
+ if (mrvl_cfg && mrvl_cfg->pp2_cfg.prs_udfs.num_udfs)
+ memcpy(&init_params.prs_udfs, &mrvl_cfg->pp2_cfg.prs_udfs,
+ sizeof(struct pp2_parse_udfs));
+ return pp2_init(&init_params);
+}
+
+/**
+ * Deinitialize packet processor.
+ *
+ * @return
+ * 0 on success, negative error value otherwise.
+ */
+static void
+mrvl_deinit_pp2(void)
+{
+ pp2_deinit();
+}
+
static inline void
mrvl_fill_shadowq(struct mrvl_shadow_txq *sq, struct rte_mbuf *buf) { @@
-292,6 +325,22 @@ mrvl_get_hif(struct mrvl_priv *priv, int core_id)
return hifs[core_id];
}
+/**
+ * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
+ */
+static void
+mrvl_deinit_hifs(void)
+{
+ int i;
+
+ for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
+ if (hifs[i])
+ pp2_hif_deinit(hifs[i]);
+ }
+ used_hifs = MRVL_MUSDK_HIFS_RESERVED;
+ memset(hifs, 0, sizeof(hifs));
+}
+
/**
* Set tx burst function according to offload flag
*
@@ -3012,39 +3061,6 @@ mrvl_tx_sg_pkt_burst(void *txq, struct rte_mbuf
**tx_pkts,
return nb_pkts;
}
-/**
- * Initialize packet processor.
- *
- * @return
- * 0 on success, negative error value otherwise.
- */
-static int
-mrvl_init_pp2(void)
-{
- struct pp2_init_params init_params;
-
- memset(&init_params, 0, sizeof(init_params));
- init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
- init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
- init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
- if (mrvl_cfg && mrvl_cfg->pp2_cfg.prs_udfs.num_udfs)
- memcpy(&init_params.prs_udfs, &mrvl_cfg->pp2_cfg.prs_udfs,
- sizeof(struct pp2_parse_udfs));
- return pp2_init(&init_params);
-}
-
-/**
- * Deinitialize packet processor.
- *
- * @return
- * 0 on success, negative error value otherwise.
- */
-static void
-mrvl_deinit_pp2(void)
-{
- pp2_deinit();
-}
-
/**
* Create private device structure.
*
@@ -3184,22 +3200,6 @@ mrvl_get_ifnames(const char *key __rte_unused, const
char *value,
return 0;
}
-/**
- * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
- */
-static void
-mrvl_deinit_hifs(void)
-{
- int i;
-
- for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
- if (hifs[i])
- pp2_hif_deinit(hifs[i]);
- }
- used_hifs = MRVL_MUSDK_HIFS_RESERVED;
- memset(hifs, 0, sizeof(hifs));
-}
-
/**
* DPDK callback to register the virtual device.
*
--
2.28.0
Re: [dpdk-dev] [PATCH v1 25/38] net/mvpp2: support udf configuration
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 25/38] net/mvpp2: support udf configuration
From: Liron Himi
extend the config file with 'udf' (user-defined) settings
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 4 +-
drivers/net/mvpp2/mrvl_qos.c| 212
drivers/net/mvpp2/mrvl_qos.h| 3 +
3 files changed, 218 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 6bd3b0430..5ff11e2c9 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -3027,7 +3027,9 @@ mrvl_init_pp2(void)
init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
-
+ if (mrvl_cfg && mrvl_cfg->pp2_cfg.prs_udfs.num_udfs)
+ memcpy(&init_params.prs_udfs, &mrvl_cfg->pp2_cfg.prs_udfs,
+ sizeof(struct pp2_parse_udfs));
return pp2_init(&init_params);
}
diff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index
1c65b5276..f5275efc7 100644
--- a/drivers/net/mvpp2/mrvl_qos.c
+++ b/drivers/net/mvpp2/mrvl_qos.c
@@ -35,6 +35,7 @@
#define MRVL_TOK_TXQ "txq"
#define MRVL_TOK_VLAN "vlan"
#define MRVL_TOK_VLAN_IP "vlan/ip"
+#define MRVL_TOK_PARSER_UDF "parser udf"
/* egress specific configuration tokens */ #define MRVL_TOK_BURST_SIZE
"burst_size"
@@ -62,6 +63,18 @@
#define MRVL_TOK_PLCR_DEFAULT_COLOR_YELLOW "yellow"
#define MRVL_TOK_PLCR_DEFAULT_COLOR_RED "red"
+/* paser udf specific configuration tokens */ #define
+MRVL_TOK_PARSER_UDF_PROTO "proto"
+#define MRVL_TOK_PARSER_UDF_FIELD "field"
+#define MRVL_TOK_PARSER_UDF_KEY "key"
+#define MRVL_TOK_PARSER_UDF_MASK "mask"
+#define MRVL_TOK_PARSER_UDF_OFFSET "offset"
+#define MRVL_TOK_PARSER_UDF_PROTO_ETH "eth"
+#define MRVL_TOK_PARSER_UDF_FIELD_ETH_TYPE "type"
+#define MRVL_TOK_PARSER_UDF_PROTO_UDP "udp"
+#define MRVL_TOK_PARSER_UDF_FIELD_UDP_DPORT "dport"
+
+
/** Number of tokens in range a-b = 2. */ #define MAX_RNG_TOKENS 2
@@ -453,6 +466,175 @@ parse_policer(struct rte_cfgfile *file, int port, const
char *sec_name,
return 0;
}
+/**
+ * Parse parser udf.
+ *
+ * @param file Config file handle.
+ * @param sec_name section name
+ * @param udf udf index
+ * @param cfg[out] Parsing results.
+ * @returns 0 in case of success, negative value otherwise.
+ */
+static int
+parse_udf(struct rte_cfgfile *file, const char *sec_name, int udf,
+ struct mrvl_cfg *cfg)
+{
+ struct pp2_parse_udf_params *udf_params;
+ const char *entry, *entry_field;
+ uint32_t val, i;
+ uint8_t field_size;
+ char malloc_name[32], tmp_arr[3];
+ /* field len in chars equal to '0x' + rest of data */
+#define FIELD_LEN_IN_CHARS(field_size) (uint32_t)(2 + (field_size) * 2)
+
+ udf_params = &cfg->pp2_cfg.prs_udfs.udfs[udf];
+
+ /* Read 'proto' field */
+ entry = rte_cfgfile_get_entry(file, sec_name,
+ MRVL_TOK_PARSER_UDF_PROTO);
+ if (!entry) {
+ MRVL_LOG(ERR, "UDF[%d]: '%s' field must be set\n", udf,
+MRVL_TOK_PARSER_UDF_PROTO);
+ return -1;
+ }
+
+ /* Read 'field' field */
+ entry_field = rte_cfgfile_get_entry(file, sec_name,
+ MRVL_TOK_PARSER_UDF_FIELD);
+ if (!entry_field) {
+ MRVL_LOG(ERR, "UDF[%d]: '%s' field must be set\n", udf,
+MRVL_TOK_PARSER_UDF_FIELD);
+ return -1;
+ }
+
+ if (!strncmp(entry, MRVL_TOK_PARSER_UDF_PROTO_ETH,
+ sizeof(MRVL_TOK_PARSER_UDF_PROTO_ETH))) {
+ udf_params->match_proto = MV_NET_PROTO_ETH;
+ if (!strncmp(entry_field, MRVL_TOK_PARSER_UDF_FIELD_ETH_TYPE,
+sizeof(MRVL_TOK_PARSER_UDF_FIELD_ETH_TYPE))) {
+ udf_params->match_field.eth = MV_NET_ETH_F_TYPE;
+ field_size = 2;
+ } else {
+ MRVL_LOG(ERR, "UDF[%d]: mismatch between '%s' proto "
+"and '%s' field\n", udf,
+MRVL_TOK_PARSER_UDF_PROTO_ETH,
+entry_field);
+ return -1;
+
Re: [dpdk-dev] [PATCH v1 24/38] net/mvpp2: move common functions to common location
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 24/38] net/mvpp2: move common functions to common
location
From: Liron Himi
move common functions to common location
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.h | 41 +
drivers/net/mvpp2/mrvl_qos.c| 24 ---
2 files changed, 41 insertions(+), 24 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h
index be5e5a51b..5dbd8b46c 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.h
+++ b/drivers/net/mvpp2/mrvl_ethdev.h
@@ -197,4 +197,45 @@ extern int mrvl_logtype;
rte_log(RTE_LOG_ ## level, mrvl_logtype, "%s(): " fmt "\n", \
__func__, ##args)
+/**
+ * Convert string to uint32_t with extra checks for result correctness.
+ *
+ * @param string String to convert.
+ * @param val Conversion result.
+ * @returns 0 in case of success, negative value otherwise.
+ */
+static int
+get_val_securely(const char *string, uint32_t *val) {
+ char *endptr;
+ size_t len = strlen(string);
+
+ if (len == 0)
+ return -1;
+
+ errno = 0;
+ *val = strtoul(string, &endptr, 0);
+ if (errno != 0 || RTE_PTR_DIFF(endptr, string) != len)
+ return -2;
+
+ return 0;
+}
+
+static int
+get_val_securely8(const char *string, uint32_t base, uint8_t *val) {
+ char *endptr;
+ size_t len = strlen(string);
+
+ if (len == 0)
+ return -1;
+
+ errno = 0;
+ *val = (uint8_t)strtoul(string, &endptr, base);
+ if (errno != 0 || RTE_PTR_DIFF(endptr, string) != len)
+ return -2;
+
+ return 0;
+}
+
#endif /* _MRVL_ETHDEV_H_ */
diff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index
d8f6dd5c6..1c65b5276 100644
--- a/drivers/net/mvpp2/mrvl_qos.c
+++ b/drivers/net/mvpp2/mrvl_qos.c
@@ -74,30 +74,6 @@
/** Global configuration. */
struct mrvl_cfg *mrvl_cfg;
-/**
- * Convert string to uint32_t with extra checks for result correctness.
- *
- * @param string String to convert.
- * @param val Conversion result.
- * @returns 0 in case of success, negative value otherwise.
- */
-static int
-get_val_securely(const char *string, uint32_t *val) -{
- char *endptr;
- size_t len = strlen(string);
-
- if (len == 0)
- return -1;
-
- errno = 0;
- *val = strtoul(string, &endptr, 0);
- if (errno != 0 || RTE_PTR_DIFF(endptr, string) != len)
- return -2;
-
- return 0;
-}
-
/**
* Read out-queue configuration from file.
*
--
2.28.0
Re: [dpdk-dev] [PATCH v1 23/38] net/mvpp2: skip qos init if not requested
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 23/38] net/mvpp2: skip qos init if not requested
From: Liron Himi
skip qos init if not requested
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_qos.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index
18cf470dd..d8f6dd5c6 100644
--- a/drivers/net/mvpp2/mrvl_qos.c
+++ b/drivers/net/mvpp2/mrvl_qos.c
@@ -617,7 +617,7 @@ mrvl_get_cfg(const char *key __rte_unused, const char
*path, void *extra_args)
}
} else {
(*cfg)->port[n].mapping_priority =
- PP2_CLS_QOS_TBL_VLAN_IP_PRI;
+ PP2_CLS_QOS_TBL_NONE;
}
/* Parse policer configuration (if any) */ @@ -933,6 +933,9 @@
mrvl_start_qos_mapping(struct mrvl_priv *priv) {
size_t i;
+ if (priv->qos_tbl_params.type == PP2_CLS_QOS_TBL_NONE)
+ return 0;
+
if (priv->ppio == NULL) {
MRVL_LOG(ERR, "ppio must not be NULL here!");
return -1;
--
2.28.0
Re: [dpdk-dev] [PATCH v1 20/38] net/mvpp2: flow: support generic pattern combinations
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 20/38] net/mvpp2: flow: support generic pattern
combinations
From: Liron Himi
Currently only specific pattern combinations are supported.
this makes it hard to support additional pattern.
in addition there is no a real limitation that prevent any combination.
This patch iterate the input patterns and convert them to a mvpp2 API.
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_flow.c | 1254 +
1 file changed, 158 insertions(+), 1096 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_flow.c b/drivers/net/mvpp2/mrvl_flow.c
index ea4325528..a1a748529 100644
--- a/drivers/net/mvpp2/mrvl_flow.c
+++ b/drivers/net/mvpp2/mrvl_flow.c
@@ -20,185 +20,12 @@
/** Size of the classifier key and mask strings. */ #define
MRVL_CLS_STR_SIZE_MAX 40
-static const enum rte_flow_item_type pattern_eth[] = {
- RTE_FLOW_ITEM_TYPE_ETH,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_eth_vlan[] = {
- RTE_FLOW_ITEM_TYPE_ETH,
- RTE_FLOW_ITEM_TYPE_VLAN,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_eth_vlan_ip[] = {
- RTE_FLOW_ITEM_TYPE_ETH,
- RTE_FLOW_ITEM_TYPE_VLAN,
- RTE_FLOW_ITEM_TYPE_IPV4,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_eth_vlan_ip6[] = {
- RTE_FLOW_ITEM_TYPE_ETH,
- RTE_FLOW_ITEM_TYPE_VLAN,
- RTE_FLOW_ITEM_TYPE_IPV6,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_eth_ip4[] = {
- RTE_FLOW_ITEM_TYPE_ETH,
- RTE_FLOW_ITEM_TYPE_IPV4,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_eth_ip4_tcp[] = {
- RTE_FLOW_ITEM_TYPE_ETH,
- RTE_FLOW_ITEM_TYPE_IPV4,
- RTE_FLOW_ITEM_TYPE_TCP,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_eth_ip4_udp[] = {
- RTE_FLOW_ITEM_TYPE_ETH,
- RTE_FLOW_ITEM_TYPE_IPV4,
- RTE_FLOW_ITEM_TYPE_UDP,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_eth_ip6[] = {
- RTE_FLOW_ITEM_TYPE_ETH,
- RTE_FLOW_ITEM_TYPE_IPV6,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_eth_ip6_tcp[] = {
- RTE_FLOW_ITEM_TYPE_ETH,
- RTE_FLOW_ITEM_TYPE_IPV6,
- RTE_FLOW_ITEM_TYPE_TCP,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_eth_ip6_udp[] = {
- RTE_FLOW_ITEM_TYPE_ETH,
- RTE_FLOW_ITEM_TYPE_IPV6,
- RTE_FLOW_ITEM_TYPE_UDP,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_vlan[] = {
- RTE_FLOW_ITEM_TYPE_VLAN,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_vlan_ip[] = {
- RTE_FLOW_ITEM_TYPE_VLAN,
- RTE_FLOW_ITEM_TYPE_IPV4,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_vlan_ip_tcp[] = {
- RTE_FLOW_ITEM_TYPE_VLAN,
- RTE_FLOW_ITEM_TYPE_IPV4,
- RTE_FLOW_ITEM_TYPE_TCP,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_vlan_ip_udp[] = {
- RTE_FLOW_ITEM_TYPE_VLAN,
- RTE_FLOW_ITEM_TYPE_IPV4,
- RTE_FLOW_ITEM_TYPE_UDP,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_vlan_ip6[] = {
- RTE_FLOW_ITEM_TYPE_VLAN,
- RTE_FLOW_ITEM_TYPE_IPV6,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_vlan_ip6_tcp[] = {
- RTE_FLOW_ITEM_TYPE_VLAN,
- RTE_FLOW_ITEM_TYPE_IPV6,
- RTE_FLOW_ITEM_TYPE_TCP,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_vlan_ip6_udp[] = {
- RTE_FLOW_ITEM_TYPE_VLAN,
- RTE_FLOW_ITEM_TYPE_IPV6,
- RTE_FLOW_ITEM_TYPE_UDP,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_ip[] = {
- RTE_FLOW_ITEM_TYPE_IPV4,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_ip6[] = {
- RTE_FLOW_ITEM_TYPE_IPV6,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_ip_tcp[] = {
- RTE_FLOW_ITEM_TYPE_IPV4,
- RTE_FLOW_ITEM_TYPE_TCP,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_ip6_tcp[] = {
- RTE_FLOW_ITEM_TYPE_IPV6,
- RTE_FLOW_ITEM_TYPE_TCP,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_ip_udp[] = {
- RTE_FLOW_ITEM_TYPE_IPV4,
- RTE_FLOW_ITEM_TYPE_UDP,
- RTE_FLOW_ITEM_TYPE_END
-};
-
-static const enum rte_flow_item_type pattern_ip6_udp[] = {
- RTE_FLOW_ITEM_TYPE_IPV6,
- RTE_FLOW_ITEM_TYPE_UDP,
- RTE_FLOW_ITEM_TYPE_END
Re: [dpdk-dev] [PATCH v1 21/38] net/mvpp2: flow: build table key along with rule
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 21/38] net/mvpp2: flow: build table key along
with rule
From: Liron Himi
build table key along with rule
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.h | 33 +---
drivers/net/mvpp2/mrvl_flow.c | 257 +---
2 files changed, 106 insertions(+), 184 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h
index db6632f5b..e7f75067f 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.h
+++ b/drivers/net/mvpp2/mrvl_ethdev.h
@@ -82,43 +82,13 @@
/** Maximum length of a match string */ #define MRVL_MATCH_LEN 16
-/** Parsed fields in processed rte_flow_item. */ -enum mrvl_parsed_fields {
- /* eth flags */
- F_DMAC = BIT(0),
- F_SMAC = BIT(1),
- F_TYPE = BIT(2),
- /* vlan flags */
- F_VLAN_PRI = BIT(3),
- F_VLAN_ID = BIT(4),
- F_VLAN_TCI = BIT(5), /* not supported by MUSDK yet */
- /* ip4 flags */
- F_IP4_TOS = BIT(6),
- F_IP4_SIP = BIT(7),
- F_IP4_DIP = BIT(8),
- F_IP4_PROTO =BIT(9),
- /* ip6 flags */
- F_IP6_TC = BIT(10), /* not supported by MUSDK yet */
- F_IP6_SIP = BIT(11),
- F_IP6_DIP = BIT(12),
- F_IP6_FLOW = BIT(13),
- F_IP6_NEXT_HDR = BIT(14),
- /* tcp flags */
- F_TCP_SPORT =BIT(15),
- F_TCP_DPORT =BIT(16),
- /* udp flags */
- F_UDP_SPORT =BIT(17),
- F_UDP_DPORT =BIT(18),
-};
-
/** PMD-specific definition of a flow rule handle. */ struct mrvl_mtr;
struct rte_flow {
LIST_ENTRY(rte_flow) next;
struct mrvl_mtr *mtr;
- enum mrvl_parsed_fields pattern;
-
+ struct pp2_cls_tbl_key table_key;
struct pp2_cls_tbl_rule rule;
struct pp2_cls_cos_desc cos;
struct pp2_cls_tbl_action action;
@@ -197,7 +167,6 @@ struct mrvl_priv {
struct pp2_cls_tbl_params cls_tbl_params;
struct pp2_cls_tbl *cls_tbl;
- uint32_t cls_tbl_pattern;
LIST_HEAD(mrvl_flows, rte_flow) flows;
struct pp2_cls_plcr *default_policer;
diff --git a/drivers/net/mvpp2/mrvl_flow.c b/drivers/net/mvpp2/mrvl_flow.c
index a1a748529..ffa47a12e 100644
--- a/drivers/net/mvpp2/mrvl_flow.c
+++ b/drivers/net/mvpp2/mrvl_flow.c
@@ -192,12 +192,14 @@ mrvl_parse_mac(const struct rte_flow_item_eth *spec,
k = spec->dst.addr_bytes;
m = mask->dst.addr_bytes;
- flow->pattern |= F_DMAC;
+ flow->table_key.proto_field[flow->rule.num_fields].field.eth =
+ MV_NET_ETH_F_DA;
} else {
k = spec->src.addr_bytes;
m = mask->src.addr_bytes;
- flow->pattern |= F_SMAC;
+ flow->table_key.proto_field[flow->rule.num_fields].field.eth =
+ MV_NET_ETH_F_SA;
}
key_field = &flow->rule.fields[flow->rule.num_fields];
@@ -212,6 +214,10 @@ mrvl_parse_mac(const struct rte_flow_item_eth *spec,
"%02x:%02x:%02x:%02x:%02x:%02x",
m[0], m[1], m[2], m[3], m[4], m[5]);
+ flow->table_key.proto_field[flow->rule.num_fields].proto =
+ MV_NET_PROTO_ETH;
+ flow->table_key.key_size += key_field->size;
+
flow->rule.num_fields += 1;
return 0;
@@ -272,7 +278,12 @@ mrvl_parse_type(const struct rte_flow_item_eth *spec,
k = rte_be_to_cpu_16(spec->type);
snprintf((char *)key_field->key, MRVL_CLS_STR_SIZE_MAX, "%u", k);
- flow->pattern |= F_TYPE;
+ flow->table_key.proto_field[flow->rule.num_fields].proto =
+ MV_NET_PROTO_ETH;
+ flow->table_key.proto_field[flow->rule.num_fields].field.eth =
+ MV_NET_ETH_F_TYPE;
+ flow->table_key.key_size += key_field->size;
+
flow->rule.num_fields += 1;
return 0;
@@ -303,7 +314,12 @@ mrvl_parse_vlan_id(const struct rte_flow_item_vlan *spec,
k = rte_be_to_cpu_16(spec->tci) & MRVL_VLAN_ID_MASK;
snprintf((char *)key_field->key, MRVL_CLS_STR_SIZE_MAX, "%u", k);
- flow->pattern |= F_VLAN_ID;
+ flow->table_key.proto_field[flow->rule.num_fields].proto =
+ MV_NET_PROTO_VLAN;
+ flow->table_key.proto_field[flow->rule.num_fields].field.vlan =
+ MV_NET_VLAN_F_ID;
+ flow->table_key.key_size += key_field->size;
+
flow->rule.num_fields += 1;
return 0;
@@ -334,7 +350,12 @@ mrvl_parse_vlan_pri(const struct rte_flow_item_vlan *spec,
k = (rte_b
Re: [dpdk-dev] [PATCH v1 14/38] net/mvpp2: add vlan offload support
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 14/38] net/mvpp2: add vlan offload support
From: Yuri Chipchev
enable vlan filter configuration
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 110 +---
1 file changed, 86 insertions(+), 24 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 5cd9ee38d..a87336a4c 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -620,6 +620,51 @@ mrvl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t
queue_id)
return 0;
}
+/**
+ * Populate Vlan Filter configuration.
+ *
+ * @param dev
+ * Pointer to Ethernet device structure.
+ * @param on
+ * Toggle filter.
+ *
+ * @return
+ * 0 on success, negative error value otherwise.
+ */
+static int mrvl_populate_vlan_table(struct rte_eth_dev *dev, int on) {
+ uint32_t j;
+ int ret;
+ struct rte_vlan_filter_conf *vfc;
+
+ vfc = &dev->data->vlan_filter_conf;
+ for (j = 0; j < RTE_DIM(vfc->ids); j++) {
+ uint64_t vlan;
+ uint64_t vbit;
+ uint64_t ids = vfc->ids[j];
+
+ if (ids == 0)
+ continue;
+
+ while (ids) {
+ vlan = 64 * j;
+ /* count trailing zeroes */
+ vbit = ~ids & (ids - 1);
+ /* clear least significant bit set */
+ ids ^= (ids ^ (ids - 1)) ^ vbit;
+ for (; vbit; vlan++)
+ vbit >>= 1;
+ ret = mrvl_vlan_filter_set(dev, vlan, on);
+ if (ret) {
+ MRVL_LOG(ERR, "Failed to setup VLAN filter\n");
+ return ret;
+ }
+ }
+ }
+
+ return 0;
+}
+
/**
* DPDK callback to start the device.
*
@@ -635,8 +680,6 @@ mrvl_dev_start(struct rte_eth_dev *dev)
struct mrvl_priv *priv = dev->data->dev_private;
char match[MRVL_MATCH_LEN];
int ret = 0, i, def_init_size;
- uint32_t j;
- struct rte_vlan_filter_conf *vfc;
struct rte_ether_addr *mac_addr;
if (priv->ppio)
@@ -731,28 +774,11 @@ mrvl_dev_start(struct rte_eth_dev *dev)
if (dev->data->all_multicast == 1)
mrvl_allmulticast_enable(dev);
- vfc = &dev->data->vlan_filter_conf;
- for (j = 0; j < RTE_DIM(vfc->ids); j++) {
- uint64_t vlan;
- uint64_t vbit;
- uint64_t ids = vfc->ids[j];
-
- if (ids == 0)
- continue;
-
- while (ids) {
- vlan = 64 * j;
- /* count trailing zeroes */
- vbit = ~ids & (ids - 1);
- /* clear least significant bit set */
- ids ^= (ids ^ (ids - 1)) ^ vbit;
- for (; vbit; vlan++)
- vbit >>= 1;
- ret = mrvl_vlan_filter_set(dev, vlan, 1);
- if (ret) {
- MRVL_LOG(ERR, "Failed to setup VLAN filter\n");
- goto out;
- }
+ if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_VLAN_FILTER) {
+ ret = mrvl_populate_vlan_table(dev, 1);
+ if (ret) {
+ MRVL_LOG(ERR, "Failed to populate vlan table");
+ goto out;
}
}
@@ -1687,6 +1713,41 @@ mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t
vlan_id, int on)
pp2_ppio_remove_vlan(priv->ppio, vlan_id); }
+/**
+ * DPDK callback to Configure VLAN offload.
+ *
+ * @param dev
+ * Pointer to Ethernet device structure.
+ * @param mask
+ * VLAN offload mask.
+ *
+ * @return
+ * 0 on success, negative error value otherwise.
+ */
+static int mrvl_vlan_offload_set(struct rte_eth_dev *dev, int mask) {
+ uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
+ int ret;
+
+ if (mask & ETH_VLAN_STRIP_MASK)
+ MRVL_LOG(ERR, "VLAN stripping is not supported\n");
+
+ if (mask & ETH_VLAN_FILTER_MASK) {
+ if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
+ ret = mrvl_populate_vlan_table(dev, 1);
+ else
+ ret = mrvl_populate_vlan_table(dev, 0);
+
+ if (ret)
+ r
Re: [dpdk-dev] [PATCH v1 19/38] net/mvpp2: replace 'qos_cfg' with 'cfg'
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 19/38] net/mvpp2: replace 'qos_cfg' with 'cfg'
From: Liron Himi
as the config file is not just for 'qos'
it is more accurate to replace the name from 'qos_cfg'
to 'cfg'
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 12 ++--
drivers/net/mvpp2/mrvl_qos.c| 31 +++
drivers/net/mvpp2/mrvl_qos.h| 13 ++---
3 files changed, 27 insertions(+), 29 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 1be607b61..6bd3b0430 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -696,9 +696,9 @@ mrvl_dev_start(struct rte_eth_dev *dev)
priv->pp_id, priv->ppio_id);
priv->ppio_params.match = match;
priv->ppio_params.eth_start_hdr = PP2_PPIO_HDR_ETH;
- if (mrvl_qos_cfg)
+ if (mrvl_cfg)
priv->ppio_params.eth_start_hdr =
- mrvl_qos_cfg->port[dev->data->port_id].eth_start_hdr;
+ mrvl_cfg->port[dev->data->port_id].eth_start_hdr;
/*
* Calculate the minimum bpool size for refill feature as follows:
@@ -794,8 +794,8 @@ mrvl_dev_start(struct rte_eth_dev *dev)
}
/* For default QoS config, don't start classifier. */
- if (mrvl_qos_cfg &&
- mrvl_qos_cfg->port[dev->data->port_id].use_global_defaults == 0) {
+ if (mrvl_cfg &&
+ mrvl_cfg->port[dev->data->port_id].use_global_defaults == 0) {
ret = mrvl_start_qos_mapping(priv);
if (ret) {
MRVL_LOG(ERR, "Failed to setup QoS mapping"); @@
-3237,7 +3237,7 @@ rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
* The below system initialization should be done only once,
* on the first provided configuration file
*/
- if (!mrvl_qos_cfg) {
+ if (!mrvl_cfg) {
cfgnum = rte_kvargs_count(kvlist, MRVL_CFG_ARG);
MRVL_LOG(INFO, "Parsing config file!");
if (cfgnum > 1) {
@@ -3245,7 +3245,7 @@ rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
goto out_free_kvlist;
} else if (cfgnum == 1) {
rte_kvargs_process(kvlist, MRVL_CFG_ARG,
- mrvl_get_qoscfg, &mrvl_qos_cfg);
+ mrvl_get_cfg, &mrvl_cfg);
}
}
diff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index
976cb06a8..18cf470dd 100644
--- a/drivers/net/mvpp2/mrvl_qos.c
+++ b/drivers/net/mvpp2/mrvl_qos.c
@@ -71,8 +71,8 @@
/** Maximum possible value of DSCP. */
#define MAX_DSCP 63
-/** Global QoS configuration. */
-struct mrvl_qos_cfg *mrvl_qos_cfg;
+/** Global configuration. */
+struct mrvl_cfg *mrvl_cfg;
/**
* Convert string to uint32_t with extra checks for result correctness.
@@ -104,12 +104,12 @@ get_val_securely(const char *string, uint32_t *val)
* @param file Path to the configuration file.
* @param port Port number.
* @param outq Out queue number.
- * @param cfg Pointer to the Marvell QoS configuration structure.
+ * @param cfg Pointer to the Marvell configuration structure.
* @returns 0 in case of success, negative value otherwise.
*/
static int
get_outq_cfg(struct rte_cfgfile *file, int port, int outq,
- struct mrvl_qos_cfg *cfg)
+ struct mrvl_cfg *cfg)
{
char sec_name[32];
const char *entry;
@@ -315,7 +315,7 @@ get_entry_values(const char *entry, uint8_t *tab,
*/
static int
parse_tc_cfg(struct rte_cfgfile *file, int port, int tc,
- struct mrvl_qos_cfg *cfg)
+ struct mrvl_cfg *cfg)
{
char sec_name[32];
const char *entry;
@@ -409,7 +409,7 @@ parse_tc_cfg(struct rte_cfgfile *file, int port, int tc,
*/
static int
parse_policer(struct rte_cfgfile *file, int port, const char *sec_name,
- struct mrvl_qos_cfg *cfg)
+ struct mrvl_cfg *cfg)
{
const char *entry;
uint32_t val;
@@ -478,7 +478,7 @@ parse_policer(struct rte_cfgfile *file, int port, const
char *sec_name, }
/**
- * Parse QoS configuration - rte_kvargs_process handler.
+ * Parse configuration - rte_kvargs_process handler.
*
* Opens configuration file and parses its content.
*
@@ -488,10 +488,9 @@ parse_policer(struct rte_cfgfile *file, int port, const
char *sec_name,
* @returns 0 in case of success, exits otherwise.
*/
int
-mrvl_get_qoscfg(const char *key __rte_unused
Re: [dpdk-dev] [PATCH v1 18/38] net/mvpp2: adjust the number of unicast address
Reviewed-by: Michael Shamis -Original Message- From: dev On Behalf Of lir...@marvell.com Sent: Wednesday, December 2, 2020 12:12 PM To: Jerin Jacob Kollanukkaran Cc: dev@dpdk.org; Liron Himi Subject: [dpdk-dev] [PATCH v1 18/38] net/mvpp2: adjust the number of unicast address From: Liron Himi HW support 25 mac address for filtering plus one for the primary mac address. Signed-off-by: Liron Himi Reviewed-by: Liron Himi --- drivers/net/mvpp2/mrvl_ethdev.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index f80843c63..1be607b61 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -40,8 +40,10 @@ /* prefetch shift */ #define MRVL_MUSDK_PREFETCH_SHIFT 2 -/* TCAM has 25 entries reserved for uc/mc filter entries */ -#define MRVL_MAC_ADDRS_MAX 25 +/* TCAM has 25 entries reserved for uc/mc filter entries + * + 1 for primary mac address + */ +#define MRVL_MAC_ADDRS_MAX (1 + 25) #define MRVL_MATCH_LEN 16 #define MRVL_PKT_EFFEC_OFFS (MRVL_PKT_OFFS + MV_MH_SIZE) /* Maximum allowable packet size */ -- 2.28.0
Re: [dpdk-dev] [PATCH v1 16/38] net/mvpp2: add dsa mode support
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 16/38] net/mvpp2: add dsa mode support
From: Liron Himi
extend the config file with 'start-hdr' field.
currently 'eth' (default) and 'dsa' headers are supported.
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 4 ++
drivers/net/mvpp2/mrvl_qos.c| 65 ++---
drivers/net/mvpp2/mrvl_qos.h| 1 +
3 files changed, 57 insertions(+), 13 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index a03d39aee..d1bb4c35a 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -693,6 +693,10 @@ mrvl_dev_start(struct rte_eth_dev *dev)
snprintf(match, sizeof(match), "ppio-%d:%d",
priv->pp_id, priv->ppio_id);
priv->ppio_params.match = match;
+ priv->ppio_params.eth_start_hdr = PP2_PPIO_HDR_ETH;
+ if (mrvl_qos_cfg)
+ priv->ppio_params.eth_start_hdr =
+ mrvl_qos_cfg->port[dev->data->port_id].eth_start_hdr;
/*
* Calculate the minimum bpool size for refill feature as follows:
diff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index
7fd970309..976cb06a8 100644
--- a/drivers/net/mvpp2/mrvl_qos.c
+++ b/drivers/net/mvpp2/mrvl_qos.c
@@ -19,6 +19,10 @@
/* Parsing tokens. Defined conveniently, so that any correction is easy. */
#define MRVL_TOK_DEFAULT "default"
+#define MRVL_TOK_DSA_MODE "dsa_mode"
+#define MRVL_TOK_DSA_MODE_NONE "none"
+#define MRVL_TOK_DSA_MODE_DSA "dsa"
+#define MRVL_TOK_DSA_MODE_EXT_DSA "ext_dsa"
#define MRVL_TOK_DEFAULT_TC "default_tc"
#define MRVL_TOK_DSCP "dscp"
#define MRVL_TOK_MAPPING_PRIORITY "mapping_priority"
@@ -494,16 +498,19 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char
*path,
const char *entry;
char sec_name[32];
- if (file == NULL)
- rte_exit(EXIT_FAILURE, "Cannot load configuration %s\n", path);
+ if (file == NULL) {
+ MRVL_LOG(ERR, "Cannot load configuration %s\n", path);
+ return -1;
+ }
/* Create configuration. This is never accessed on the fast path,
* so we can ignore socket.
*/
*cfg = rte_zmalloc("mrvl_qos_cfg", sizeof(struct mrvl_qos_cfg), 0);
- if (*cfg == NULL)
- rte_exit(EXIT_FAILURE, "Cannot allocate configuration %s\n",
- path);
+ if (*cfg == NULL) {
+ MRVL_LOG(ERR, "Cannot allocate configuration %s\n", path);
+ return -1;
+ }
n = rte_cfgfile_num_sections(file, MRVL_TOK_PORT,
sizeof(MRVL_TOK_PORT) - 1);
@@ -528,6 +535,31 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char
*path,
continue;
}
+ entry = rte_cfgfile_get_entry(file, sec_name,
+ MRVL_TOK_DSA_MODE);
+ if (entry) {
+ if (!strncmp(entry, MRVL_TOK_DSA_MODE_NONE,
+ sizeof(MRVL_TOK_DSA_MODE_NONE)))
+ (*cfg)->port[n].eth_start_hdr =
+ PP2_PPIO_HDR_ETH;
+ else if (!strncmp(entry, MRVL_TOK_DSA_MODE_DSA,
+ sizeof(MRVL_TOK_DSA_MODE_DSA)))
+ (*cfg)->port[n].eth_start_hdr =
+ PP2_PPIO_HDR_ETH_DSA;
+ else if (!strncmp(entry, MRVL_TOK_DSA_MODE_EXT_DSA,
+ sizeof(MRVL_TOK_DSA_MODE_EXT_DSA))) {
+ (*cfg)->port[n].eth_start_hdr =
+ PP2_PPIO_HDR_ETH_EXT_DSA;
+ } else {
+ MRVL_LOG(ERR,
+ "Error in parsing %s value (%s)!\n",
+ MRVL_TOK_DSA_MODE, entry);
+ return -1;
+ }
+ } else {
+ (*cfg)->port[n].eth_start_hdr = PP2_PPIO_HDR_ETH;
+ }
+
/*
* Read per-port rate limiting. Setting that will
* disable per-queue rate limiting.
@@ -575,13 +607,15 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char
*path,
(*cfg)->port[n].mapping_priority =
PP2_CLS_QOS_TBL_IP_PRI;
Re: [dpdk-dev] [PATCH v1 17/38] net/mvpp2: add TX flow control
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 17/38] net/mvpp2: add TX flow control
From: Yuri Chipchev
add tx flow control operations.
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 59 -
1 file changed, 51 insertions(+), 8 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index d1bb4c35a..f80843c63 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -2049,6 +2049,19 @@ mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct
rte_eth_fc_conf *fc_conf)
fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE;
+ ret = pp2_ppio_get_tx_pause(priv->ppio, &en);
+ if (ret) {
+ MRVL_LOG(ERR, "Failed to read tx pause state");
+ return ret;
+ }
+
+ if (en) {
+ if (fc_conf->mode == RTE_FC_NONE)
+ fc_conf->mode = RTE_FC_TX_PAUSE;
+ else
+ fc_conf->mode = RTE_FC_FULL;
+ }
+
return 0;
}
@@ -2067,6 +2080,9 @@ static int
mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) {
struct mrvl_priv *priv = dev->data->dev_private;
+ struct pp2_ppio_tx_pause_params mrvl_pause_params;
+ int ret;
+ int rx_en, tx_en;
if (!priv)
return -EPERM;
@@ -2081,16 +2097,43 @@ mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct
rte_eth_fc_conf *fc_conf)
return -EINVAL;
}
- if (fc_conf->mode == RTE_FC_NONE ||
- fc_conf->mode == RTE_FC_RX_PAUSE) {
- int ret, en;
+ switch (fc_conf->mode) {
+ case RTE_FC_FULL:
+ rx_en = 1;
+ tx_en = 1;
+ break;
+ case RTE_FC_TX_PAUSE:
+ rx_en = 0;
+ tx_en = 1;
+ break;
+ case RTE_FC_RX_PAUSE:
+ rx_en = 1;
+ tx_en = 0;
+ break;
+ case RTE_FC_NONE:
+ rx_en = 0;
+ tx_en = 0;
+ break;
+ default:
+ MRVL_LOG(ERR, "Incorrect Flow control flag (%d)",
+fc_conf->mode);
+ return -EINVAL;
+ }
- en = fc_conf->mode == RTE_FC_NONE ? 0 : 1;
- ret = pp2_ppio_set_rx_pause(priv->ppio, en);
- if (ret)
- MRVL_LOG(ERR,
- "Failed to change flowctrl on RX side");
+ /* Set RX flow control */
+ ret = pp2_ppio_set_rx_pause(priv->ppio, rx_en);
+ if (ret) {
+ MRVL_LOG(ERR, "Failed to change RX flowctrl");
+ return ret;
+ }
+ /* Set TX flow control */
+ mrvl_pause_params.en = tx_en;
+ /* all inqs participate in xon/xoff decision */
+ mrvl_pause_params.use_tc_pause_inqs = 0;
+ ret = pp2_ppio_set_tx_pause(priv->ppio, &mrvl_pause_params);
+ if (ret) {
+ MRVL_LOG(ERR, "Failed to change TX flowctrl");
return ret;
}
--
2.28.0
Re: [dpdk-dev] [PATCH v1 15/38] net/mvpp2: only use ol_flags for checksum generation offload
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi
Subject: [dpdk-dev] [PATCH v1 15/38] net/mvpp2: only use ol_flags for checksum
generation offload
From: Liron Himi
according to the dpdk spec, only 'ol_flags'
should be used for tx checksum generation
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 60 ++---
1 file changed, 26 insertions(+), 34 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index a87336a4c..a03d39aee 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -63,11 +63,16 @@
DEV_RX_OFFLOAD_CHECKSUM)
/** Port Tx offloads capabilities */
-#define MRVL_TX_OFFLOADS (DEV_TX_OFFLOAD_IPV4_CKSUM | \
- DEV_TX_OFFLOAD_UDP_CKSUM | \
- DEV_TX_OFFLOAD_TCP_CKSUM | \
+#define MRVL_TX_OFFLOAD_CHECKSUM (DEV_TX_OFFLOAD_IPV4_CKSUM | \
+ DEV_TX_OFFLOAD_UDP_CKSUM | \
+ DEV_TX_OFFLOAD_TCP_CKSUM)
+#define MRVL_TX_OFFLOADS (MRVL_TX_OFFLOAD_CHECKSUM | \
DEV_TX_OFFLOAD_MULTI_SEGS)
+#define MRVL_TX_PKT_OFFLOADS (PKT_TX_IP_CKSUM | \
+ PKT_TX_TCP_CKSUM | \
+ PKT_TX_UDP_CKSUM)
+
static const char * const valid_args[] = {
MRVL_IFACE_NAME_ARG,
MRVL_CFG_ARG,
@@ -2596,8 +2601,6 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
*
* @param ol_flags
* Offload flags.
- * @param packet_type
- * Packet type bitfield.
* @param l3_type
* Pointer to the pp2_ouq_l3_type structure.
* @param l4_type
@@ -2606,12 +2609,9 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
* Will be set to 1 in case l3 checksum is computed.
* @param l4_cksum
* Will be set to 1 in case l4 checksum is computed.
- *
- * @return
- * 0 on success, negative error value otherwise.
*/
-static inline int
-mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t packet_type,
+static inline void
+mrvl_prepare_proto_info(uint64_t ol_flags,
enum pp2_outq_l3_type *l3_type,
enum pp2_outq_l4_type *l4_type,
int *gen_l3_cksum,
@@ -2621,26 +2621,22 @@ mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t
packet_type,
* Based on ol_flags prepare information
* for pp2_ppio_outq_desc_set_proto_info() which setups descriptor
* for offloading.
+* in most of the checksum cases ipv4 must be set, so this is the
+* default value
*/
- if (ol_flags & PKT_TX_IPV4) {
- *l3_type = PP2_OUTQ_L3_TYPE_IPV4;
- *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0;
- } else if (ol_flags & PKT_TX_IPV6) {
+ *l3_type = PP2_OUTQ_L3_TYPE_IPV4;
+ *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0;
+
+ if (ol_flags & PKT_TX_IPV6) {
*l3_type = PP2_OUTQ_L3_TYPE_IPV6;
/* no checksum for ipv6 header */
*gen_l3_cksum = 0;
- } else {
- /* if something different then stop processing */
- return -1;
}
- ol_flags &= PKT_TX_L4_MASK;
- if ((packet_type & RTE_PTYPE_L4_TCP) &&
- ol_flags == PKT_TX_TCP_CKSUM) {
+ if ((ol_flags & PKT_TX_L4_MASK) == PKT_TX_TCP_CKSUM) {
*l4_type = PP2_OUTQ_L4_TYPE_TCP;
*gen_l4_cksum = 1;
- } else if ((packet_type & RTE_PTYPE_L4_UDP) &&
- ol_flags == PKT_TX_UDP_CKSUM) {
+ } else if ((ol_flags & PKT_TX_L4_MASK) == PKT_TX_UDP_CKSUM) {
*l4_type = PP2_OUTQ_L4_TYPE_UDP;
*gen_l4_cksum = 1;
} else {
@@ -2648,8 +2644,6 @@ mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t
packet_type,
/* no checksum for other type */
*gen_l4_cksum = 0;
}
-
- return 0;
}
/**
@@ -2750,7 +2744,7 @@ mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
struct pp2_hif *hif;
struct pp2_ppio_desc descs[nb_pkts];
unsigned int core_id = rte_lcore_id();
- int i, ret, bytes_sent = 0;
+ int i, bytes_sent = 0;
uint16_t num, sq_free_size;
uint64_t addr;
@@ -2794,11 +2788,10 @@ mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
* in case unsupported ol_flags were passed
* do not update descriptor offload information
*/
- ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,
-
Re: [dpdk-dev] [PATCH v1 17/38] net/mvpp2: add TX flow control
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 17/38] net/mvpp2: add TX flow control
From: Yuri Chipchev
add tx flow control operations.
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 59 -
1 file changed, 51 insertions(+), 8 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index d1bb4c35a..f80843c63 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -2049,6 +2049,19 @@ mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct
rte_eth_fc_conf *fc_conf)
fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE;
+ ret = pp2_ppio_get_tx_pause(priv->ppio, &en);
+ if (ret) {
+ MRVL_LOG(ERR, "Failed to read tx pause state");
+ return ret;
+ }
+
+ if (en) {
+ if (fc_conf->mode == RTE_FC_NONE)
+ fc_conf->mode = RTE_FC_TX_PAUSE;
+ else
+ fc_conf->mode = RTE_FC_FULL;
+ }
+
return 0;
}
@@ -2067,6 +2080,9 @@ static int
mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) {
struct mrvl_priv *priv = dev->data->dev_private;
+ struct pp2_ppio_tx_pause_params mrvl_pause_params;
+ int ret;
+ int rx_en, tx_en;
if (!priv)
return -EPERM;
@@ -2081,16 +2097,43 @@ mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct
rte_eth_fc_conf *fc_conf)
return -EINVAL;
}
- if (fc_conf->mode == RTE_FC_NONE ||
- fc_conf->mode == RTE_FC_RX_PAUSE) {
- int ret, en;
+ switch (fc_conf->mode) {
+ case RTE_FC_FULL:
+ rx_en = 1;
+ tx_en = 1;
+ break;
+ case RTE_FC_TX_PAUSE:
+ rx_en = 0;
+ tx_en = 1;
+ break;
+ case RTE_FC_RX_PAUSE:
+ rx_en = 1;
+ tx_en = 0;
+ break;
+ case RTE_FC_NONE:
+ rx_en = 0;
+ tx_en = 0;
+ break;
+ default:
+ MRVL_LOG(ERR, "Incorrect Flow control flag (%d)",
+fc_conf->mode);
+ return -EINVAL;
+ }
- en = fc_conf->mode == RTE_FC_NONE ? 0 : 1;
- ret = pp2_ppio_set_rx_pause(priv->ppio, en);
- if (ret)
- MRVL_LOG(ERR,
- "Failed to change flowctrl on RX side");
+ /* Set RX flow control */
+ ret = pp2_ppio_set_rx_pause(priv->ppio, rx_en);
+ if (ret) {
+ MRVL_LOG(ERR, "Failed to change RX flowctrl");
+ return ret;
+ }
+ /* Set TX flow control */
+ mrvl_pause_params.en = tx_en;
+ /* all inqs participate in xon/xoff decision */
+ mrvl_pause_params.use_tc_pause_inqs = 0;
+ ret = pp2_ppio_set_tx_pause(priv->ppio, &mrvl_pause_params);
+ if (ret) {
+ MRVL_LOG(ERR, "Failed to change TX flowctrl");
return ret;
}
--
2.28.0
Re: [dpdk-dev] [PATCH v1 13/38] net/mvpp2: add loopback support
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 13/38] net/mvpp2: add loopback support
From: Yuri Chipchev
add support for loopback mode
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index c70a8fe93..5cd9ee38d 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -766,6 +766,12 @@ mrvl_dev_start(struct rte_eth_dev *dev)
}
}
+ ret = pp2_ppio_set_loopback(priv->ppio, dev->data->dev_conf.lpbk_mode);
+ if (ret) {
+ MRVL_LOG(ERR, "Failed to set loopback");
+ goto out;
+ }
+
if (dev->data->promiscuous == 1)
mrvl_promiscuous_enable(dev);
--
2.28.0
Re: [dpdk-dev] [PATCH v1 12/38] net/mvpp2: save initial configuration
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 12/38] net/mvpp2: save initial configuration
From: Yuri Chipchev
save configuration that was done prior 'start' as only then the ppio is being
configured.
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 107 +++-
1 file changed, 92 insertions(+), 15 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 76847b303..c70a8fe93 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2017 Marvell International Ltd.
- * Copyright(c) 2017 Semihalf.
+ * Copyright(c) 2018 Marvell International Ltd.
+ * Copyright(c) 2018 Semihalf.
* All rights reserved.
*/
@@ -146,6 +146,15 @@ static int rte_pmd_mrvl_remove(struct rte_vdev_device
*vdev); static void mrvl_deinit_pp2(void); static void mrvl_deinit_hifs(void);
+static int
+mrvl_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
+ uint32_t index, uint32_t vmdq __rte_unused); static int
+mrvl_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr
+*mac_addr); static int mrvl_vlan_filter_set(struct rte_eth_dev *dev,
+uint16_t vlan_id, int on); static int mrvl_promiscuous_enable(struct
+rte_eth_dev *dev); static int mrvl_allmulticast_enable(struct
+rte_eth_dev *dev);
#define MRVL_XSTATS_TBL_ENTRY(name) { \
#name, offsetof(struct pp2_ppio_statistics, name), \
@@ -402,8 +411,12 @@ mrvl_dev_configure(struct rte_eth_dev *dev)
return 0;
}
- return mrvl_configure_rss(priv,
- &dev->data->dev_conf.rx_adv_conf.rss_conf);
+ ret = mrvl_configure_rss(priv,
+&dev->data->dev_conf.rx_adv_conf.rss_conf);
+ if (ret < 0)
+ return ret;
+
+ return 0;
}
/**
@@ -490,8 +503,10 @@ mrvl_dev_set_link_up(struct rte_eth_dev *dev)
struct mrvl_priv *priv = dev->data->dev_private;
int ret;
- if (!priv->ppio)
- return -EPERM;
+ if (!priv->ppio) {
+ dev->data->dev_link.link_status = ETH_LINK_UP;
+ return 0;
+ }
ret = pp2_ppio_enable(priv->ppio);
if (ret)
@@ -505,10 +520,13 @@ mrvl_dev_set_link_up(struct rte_eth_dev *dev)
* Set mtu to default DPDK value here.
*/
ret = mrvl_mtu_set(dev, dev->data->mtu);
- if (ret)
+ if (ret) {
pp2_ppio_disable(priv->ppio);
+ return ret;
+ }
- return ret;
+ dev->data->dev_link.link_status = ETH_LINK_UP;
+ return 0;
}
/**
@@ -524,11 +542,18 @@ static int
mrvl_dev_set_link_down(struct rte_eth_dev *dev) {
struct mrvl_priv *priv = dev->data->dev_private;
+ int ret;
- if (!priv->ppio)
- return -EPERM;
+ if (!priv->ppio) {
+ dev->data->dev_link.link_status = ETH_LINK_DOWN;
+ return 0;
+ }
+ ret = pp2_ppio_disable(priv->ppio);
+ if (ret)
+ return ret;
- return pp2_ppio_disable(priv->ppio);
+ dev->data->dev_link.link_status = ETH_LINK_DOWN;
+ return 0;
}
/**
@@ -610,6 +635,9 @@ mrvl_dev_start(struct rte_eth_dev *dev)
struct mrvl_priv *priv = dev->data->dev_private;
char match[MRVL_MATCH_LEN];
int ret = 0, i, def_init_size;
+ uint32_t j;
+ struct rte_vlan_filter_conf *vfc;
+ struct rte_ether_addr *mac_addr;
if (priv->ppio)
return mrvl_dev_set_link_up(dev);
@@ -687,6 +715,47 @@ mrvl_dev_start(struct rte_eth_dev *dev)
if (ret)
MRVL_LOG(ERR, "Failed to set MTU to %d", dev->data->mtu);
+ if (!rte_is_zero_ether_addr(&dev->data->mac_addrs[0]))
+ mrvl_mac_addr_set(dev, &dev->data->mac_addrs[0]);
+
+ for (i = 1; i < MRVL_MAC_ADDRS_MAX; i++) {
+ mac_addr = &dev->data->mac_addrs[i];
+
+ /* skip zero address */
+ if (rte_is_zero_ether_addr(mac_addr))
+ continue;
+
+ mrvl_mac_addr_add(dev, mac_addr, i, 0);
+ }
+
+ if (dev->data->all_multicast == 1)
+ mrvl_allmulticast_enable(dev);
+
+ vfc = &dev->data->vlan_filter_conf;
+ for (j = 0; j < RTE_DIM(vfc->ids); j++) {
+ uint64_t vlan;
+ uint64_t vbit;
+ uint64_t ids = vfc->ids[j];
+
+
Re: [dpdk-dev] [PATCH v1 11/38] net/mvpp2: align checking order
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 11/38] net/mvpp2: align checking order
From: Yuri Chipchev
first check for 'isolated' and then for '!ppio'
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 30 ++
1 file changed, 18 insertions(+), 12 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 130f5221d..76847b303 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -1007,10 +1007,10 @@ mrvl_promiscuous_enable(struct rte_eth_dev *dev)
struct mrvl_priv *priv = dev->data->dev_private;
int ret;
- if (!priv->ppio)
+ if (priv->isolated)
return 0;
- if (priv->isolated)
+ if (!priv->ppio)
return 0;
ret = pp2_ppio_set_promisc(priv->ppio, 1); @@ -1037,10 +1037,10 @@
mrvl_allmulticast_enable(struct rte_eth_dev *dev)
struct mrvl_priv *priv = dev->data->dev_private;
int ret;
- if (!priv->ppio)
+ if (priv->isolated)
return 0;
- if (priv->isolated)
+ if (!priv->ppio)
return 0;
ret = pp2_ppio_set_mc_promisc(priv->ppio, 1); @@ -1067,6 +1067,9 @@
mrvl_promiscuous_disable(struct rte_eth_dev *dev)
struct mrvl_priv *priv = dev->data->dev_private;
int ret;
+ if (priv->isolated)
+ return 0;
+
if (!priv->ppio)
return 0;
@@ -1094,6 +1097,9 @@ mrvl_allmulticast_disable(struct rte_eth_dev *dev)
struct mrvl_priv *priv = dev->data->dev_private;
int ret;
+ if (priv->isolated)
+ return 0;
+
if (!priv->ppio)
return 0;
@@ -1121,10 +1127,10 @@ mrvl_mac_addr_remove(struct rte_eth_dev *dev, uint32_t
index)
char buf[RTE_ETHER_ADDR_FMT_SIZE];
int ret;
- if (!priv->ppio)
+ if (priv->isolated)
return;
- if (priv->isolated)
+ if (!priv->ppio)
return;
ret = pp2_ppio_remove_mac_addr(priv->ppio,
@@ -1209,12 +1215,12 @@ mrvl_mac_addr_set(struct rte_eth_dev *dev, struct
rte_ether_addr *mac_addr)
struct mrvl_priv *priv = dev->data->dev_private;
int ret;
- if (!priv->ppio)
- return 0;
-
if (priv->isolated)
return -ENOTSUP;
+ if (!priv->ppio)
+ return 0;
+
ret = pp2_ppio_set_mac_addr(priv->ppio, mac_addr->addr_bytes);
if (ret) {
char buf[RTE_ETHER_ADDR_FMT_SIZE];
@@ -1590,12 +1596,12 @@ mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t
vlan_id, int on) {
struct mrvl_priv *priv = dev->data->dev_private;
- if (!priv->ppio)
- return -EPERM;
-
if (priv->isolated)
return -ENOTSUP;
+ if (!priv->ppio)
+ return 0;
+
return on ? pp2_ppio_add_vlan(priv->ppio, vlan_id) :
pp2_ppio_remove_vlan(priv->ppio, vlan_id); }
--
2.28.0
Re: [dpdk-dev] [PATCH v1 10/38] net/mvpp2: cosmetic changes to cookie usage
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 10/38] net/mvpp2: cosmetic changes to cookie usage
From: Yuri Chipchev
No need to add high address to cookie on transmit side, as it has already 64bit
value
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index e81d5ee91..130f5221d 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -1643,14 +1643,16 @@ mrvl_fill_bpool(struct mrvl_rxq *rxq, int num)
if (((uint64_t)mbufs[i] & MRVL_COOKIE_HIGH_ADDR_MASK)
!= cookie_addr_high) {
MRVL_LOG(ERR,
- "mbuf virtual addr high 0x%lx out of range",
- (uint64_t)mbufs[i] >> 32);
+ "mbuf virtual addr high is out of range "
+ "0x%x instead of 0x%x\n",
+ (uint32_t)((uint64_t)mbufs[i] >> 32),
+ (uint32_t)(cookie_addr_high >> 32));
goto out;
}
entries[i].buff.addr =
rte_mbuf_data_iova_default(mbufs[i]);
- entries[i].buff.cookie = (uint64_t)mbufs[i];
+ entries[i].buff.cookie = (uintptr_t)mbufs[i];
entries[i].bpool = bpool;
}
@@ -2549,8 +2551,7 @@ mrvl_free_sent_buffers(struct pp2_ppio *ppio, struct
pp2_hif *hif,
if (unlikely(!entry->bpool)) {
struct rte_mbuf *mbuf;
- mbuf = (struct rte_mbuf *)
- (cookie_addr_high | entry->buff.cookie);
+ mbuf = (struct rte_mbuf *)entry->buff.cookie;
rte_pktmbuf_free(mbuf);
skip_bufs = 1;
goto skip;
@@ -2663,7 +2664,7 @@ mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
for (i = nb_pkts; i < num; i++) {
sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
MRVL_PP2_TX_SHADOWQ_MASK;
- addr = cookie_addr_high | sq->ent[sq->head].buff.cookie;
+ addr = sq->ent[sq->head].buff.cookie;
bytes_sent -=
rte_pktmbuf_pkt_len((struct rte_mbuf *)addr);
}
--
2.28.0
Re: [dpdk-dev] [PATCH v1 09/38] net/mvpp2: extend xstats support
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; Liron Himi
Subject: [dpdk-dev] [PATCH v1 09/38] net/mvpp2: extend xstats support
From: Yuri Chipchev
add xstats_by_id callbacks
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 90 +
1 file changed, 90 insertions(+)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 46e7260be..e81d5ee91 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -2027,6 +2027,94 @@ mrvl_eth_filter_ctrl(struct rte_eth_dev *dev
__rte_unused,
}
}
+/**
+ * DPDK callback to get xstats by id.
+ *
+ * @param dev
+ * Pointer to the device structure.
+ * @param ids
+ * Pointer to the ids table.
+ * @param values
+ * Pointer to the values table.
+ * @param n
+ * Values table size.
+ * @returns
+ * Number of read values, negative value otherwise.
+ */
+static int
+mrvl_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
+ uint64_t *values, unsigned int n) {
+ unsigned int i, num = RTE_DIM(mrvl_xstats_tbl);
+ uint64_t vals[n];
+ int ret;
+
+ if (!ids) {
+ struct rte_eth_xstat xstats[num];
+ int j;
+
+ ret = mrvl_xstats_get(dev, xstats, num);
+ for (j = 0; j < ret; i++)
+ values[j] = xstats[j].value;
+
+ return ret;
+ }
+
+ ret = mrvl_xstats_get_by_id(dev, NULL, vals, n);
+ if (ret < 0)
+ return ret;
+
+ for (i = 0; i < n; i++) {
+ if (ids[i] >= num) {
+ MRVL_LOG(ERR, "id value is not valid\n");
+ return -1;
+ }
+
+ values[i] = vals[ids[i]];
+ }
+
+ return n;
+}
+
+/**
+ * DPDK callback to get xstats names by ids.
+ *
+ * @param dev
+ * Pointer to the device structure.
+ * @param xstats_names
+ * Pointer to table with xstats names.
+ * @param ids
+ * Pointer to table with ids.
+ * @param size
+ * Xstats names table size.
+ * @returns
+ * Number of names read, negative value otherwise.
+ */
+static int
+mrvl_xstats_get_names_by_id(struct rte_eth_dev *dev,
+ struct rte_eth_xstat_name *xstats_names,
+ const uint64_t *ids, unsigned int size) {
+ unsigned int i, num = RTE_DIM(mrvl_xstats_tbl);
+ struct rte_eth_xstat_name names[num];
+
+ if (!ids)
+ return mrvl_xstats_get_names(dev, xstats_names, size);
+
+ mrvl_xstats_get_names(dev, names, size);
+ for (i = 0; i < size; i++) {
+ if (ids[i] >= num) {
+ MRVL_LOG(ERR, "id value is not valid");
+ return -1;
+ }
+
+ snprintf(xstats_names[i].name, RTE_ETH_XSTATS_NAME_SIZE,
+"%s", names[ids[i]].name);
+ }
+
+ return size;
+}
+
/**
* DPDK callback to get rte_mtr callbacks.
*
@@ -2102,6 +2190,8 @@ static const struct eth_dev_ops mrvl_ops = {
.rss_hash_update = mrvl_rss_hash_update,
.rss_hash_conf_get = mrvl_rss_hash_conf_get,
.filter_ctrl = mrvl_eth_filter_ctrl,
+ .xstats_get_by_id = mrvl_xstats_get_by_id,
+ .xstats_get_names_by_id = mrvl_xstats_get_names_by_id,
.mtr_ops_get = mrvl_mtr_ops_get,
.tm_ops_get = mrvl_tm_ops_get,
};
--
2.28.0
Re: [dpdk-dev] [PATCH v1 08/38] net/mvpp2: rss reservation
Reviewed-by: Michael Shamis -Original Message- From: dev On Behalf Of lir...@marvell.com Sent: Wednesday, December 2, 2020 12:12 PM To: Jerin Jacob Kollanukkaran Cc: dev@dpdk.org; Yuri Chipchev ; Liron Himi Subject: [dpdk-dev] [PATCH v1 08/38] net/mvpp2: rss reservation From: Yuri Chipchev reserve 4 rss tables for lk-4.14 support Signed-off-by: Yuri Chipchev Reviewed-by: Liron Himi --- drivers/net/mvpp2/mrvl_ethdev.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index d81b86c02..46e7260be 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -33,7 +33,7 @@ /* bitmask with reserved bpools */ #define MRVL_MUSDK_BPOOLS_RESERVED 0x07 /* bitmask with reserved kernel RSS tables */ -#define MRVL_MUSDK_RSS_RESERVED 0x01 +#define MRVL_MUSDK_RSS_RESERVED 0x0F /* maximum number of available hifs */ #define MRVL_MUSDK_HIFS_MAX 9 -- 2.28.0
Re: [dpdk-dev] [PATCH v1 05/38] net/mvpp2: remove CRC len from MRU validation
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi ; sta...@dpdk.org; Yuri
Chipchev
Subject: [dpdk-dev] [PATCH v1 05/38] net/mvpp2: remove CRC len from MRU
validation
From: Liron Himi
CRC is being removed by HW before packet get write to the buffer, so CRC len
should not be included in MRU validation
Fixes: 79ec62028 ("net/mvpp2: update MTU and MRU related calculations")
Cc: sta...@dpdk.org
Signed-off-by: Liron Himi
Reviewed-by: Yuri Chipchev
---
drivers/net/mvpp2/mrvl_ethdev.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 0985ccebe..dbb193496 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -441,8 +441,8 @@ mrvl_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
* when this feature has not been enabled/supported so far
* (TODO check scattered_rx flag here once scattered RX is supported).
*/
- if (mru + MRVL_PKT_OFFS > mbuf_data_size) {
- mru = mbuf_data_size - MRVL_PKT_OFFS;
+ if (mru - RTE_ETHER_CRC_LEN + MRVL_PKT_OFFS > mbuf_data_size) {
+ mru = mbuf_data_size + RTE_ETHER_CRC_LEN - MRVL_PKT_OFFS;
mtu = MRVL_PP2_MRU_TO_MTU(mru);
MRVL_LOG(WARNING, "MTU too big, max MTU possible limitted "
"by current mbuf size: %u. Set MTU to %u, MRU to %u",
--
2.28.0
Re: [dpdk-dev] [PATCH v1 06/38] net/mvpp2: fix frame size checking
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi ; sta...@dpdk.org; Yuri
Chipchev
Subject: [dpdk-dev] [PATCH v1 06/38] net/mvpp2: fix frame size checking
From: Liron Himi
need to add CRC len to the frame-size to compare against max_rx_pkt_len which
includes it.
Fixes: 79ec62028 ("net/mvpp2: update MTU and MRU related calculations")
Cc: sta...@dpdk.org
Signed-off-by: Liron Himi
Reviewed-by: Yuri Chipchev
---
drivers/net/mvpp2/mrvl_ethdev.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index dbb193496..3f05ebe00 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -1711,7 +1711,8 @@ mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t
idx, uint16_t desc,
return -EFAULT;
}
- frame_size = buf_size - RTE_PKTMBUF_HEADROOM - MRVL_PKT_EFFEC_OFFS;
+ frame_size = buf_size - RTE_PKTMBUF_HEADROOM -
+MRVL_PKT_EFFEC_OFFS + RTE_ETHER_CRC_LEN;
if (frame_size < max_rx_pkt_len) {
MRVL_LOG(WARNING,
"Mbuf size must be increased to %u bytes to hold up "
--
2.28.0
Re: [dpdk-dev] [PATCH v1 07/38] net/mvpp2: reduce prints on rx path
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi ; sta...@dpdk.org; Dana Vardi
Subject: [dpdk-dev] [PATCH v1 07/38] net/mvpp2: reduce prints on rx path
From: Liron Himi
Fixes: acab7d58c ("net/mvpp2: convert to dynamic logging")
Cc: sta...@dpdk.org
Signed-off-by: Liron Himi
Reviewed-by: Dana Tearosh
---
drivers/net/mvpp2/mrvl_ethdev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 3f05ebe00..d81b86c02 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -2320,7 +2320,7 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts)
(!rx_done && num < q->priv->bpool_init_size))) {
ret = mrvl_fill_bpool(q, MRVL_BURST_SIZE);
if (ret)
- MRVL_LOG(ERR, "Failed to fill bpool");
+ MRVL_LOG(DEBUG, "Failed to fill bpool");
} else if (unlikely(num > q->priv->bpool_max_size)) {
int i;
int pkt_to_remove = num - q->priv->bpool_init_size;
--
2.28.0
Re: [dpdk-dev] [PATCH v1 04/38] net/mvpp2: skip vlan flush
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi ; sta...@dpdk.org
Subject: [dpdk-dev] [PATCH v1 04/38] net/mvpp2: skip vlan flush
From: Liron Himi
vlan-flush in MUSDK is not supported yet.
until it does, the code should be skipped as currently an redundant error
message is displayed.
Fixes: a8f3d6783 ("net/mrvl: support VLAN filtering")
Cc: sta...@dpdk.org
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index ebd2bb1c8..0985ccebe 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -672,15 +672,15 @@ mrvl_dev_start(struct rte_eth_dev *dev)
}
if (!priv->vlan_flushed) {
- ret = pp2_ppio_flush_vlan(priv->ppio);
- if (ret) {
- MRVL_LOG(ERR, "Failed to flush vlan list");
- /*
-* TODO
-* once pp2_ppio_flush_vlan() is supported jump to out
-* goto out;
-*/
- }
+ /*
+* TODO
+* once pp2_ppio_flush_vlan() is supported call it
+* ret = pp2_ppio_flush_vlan(priv->ppio);
+* if (ret) {
+* MRVL_LOG(ERR, "Failed to flush vlan list");
+* goto out;
+* }
+*/
priv->vlan_flushed = 1;
}
ret = mrvl_mtu_set(dev, dev->data->mtu);
--
2.28.0
Re: [dpdk-dev] [PATCH v1 03/38] net/mvpp2: fix rx/tx bytes statistics
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; sta...@dpdk.org; Liron
Himi
Subject: [dpdk-dev] [PATCH v1 03/38] net/mvpp2: fix rx/tx bytes statistics
From: Yuri Chipchev
4B of CRC was not included in the bytes statistics
Fixes: bdffe0c70 ("net/mrvl: support basic stats")
Cc: sta...@dpdk.org
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 8c3278ec4..ebd2bb1c8 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -1278,7 +1278,6 @@ mrvl_stats_get(struct rte_eth_dev *dev, struct
rte_eth_stats *stats)
rx_stats.drop_fullq +
rx_stats.drop_bm +
rxq->drop_mac;
- stats->ibytes += rxq->bytes_recv;
drop_mac += rxq->drop_mac;
}
@@ -1306,7 +1305,6 @@ mrvl_stats_get(struct rte_eth_dev *dev, struct
rte_eth_stats *stats)
stats->q_opackets[idx] = tx_stats.deq_desc;
stats->q_obytes[idx] = txq->bytes_sent;
- stats->obytes += txq->bytes_sent;
}
ret = pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0); @@ -1315,6
+1313,8 @@ mrvl_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
return ret;
}
+ stats->ibytes += ppio_stats.rx_bytes;
+ stats->obytes += ppio_stats.tx_bytes;
stats->ipackets += ppio_stats.rx_packets - drop_mac;
stats->opackets += ppio_stats.tx_packets;
stats->imissed += ppio_stats.rx_fullq_dropped +
--
2.28.0
Re: [dpdk-dev] [PATCH v1 01/38] net/mvpp2: fix stack corruption
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; sta...@dpdk.org; Liron
Himi
Subject: [dpdk-dev] [PATCH v1 01/38] net/mvpp2: fix stack corruption
From: Yuri Chipchev
Fixes stack corruption in mrvl_fill_bpool function in case num >
MRVL_PP2_RXD_MAX
Fixes: c3637258d894 ("net/mrvl: fix Rx descriptors number")
Cc: sta...@dpdk.org
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index f25cf9e46..93fb30cdb 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -1614,8 +1614,8 @@ mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t
vlan_id, int on) static int mrvl_fill_bpool(struct mrvl_rxq *rxq, int num) {
- struct buff_release_entry entries[MRVL_PP2_RXD_MAX];
- struct rte_mbuf *mbufs[MRVL_PP2_RXD_MAX];
+ struct buff_release_entry entries[num];
+ struct rte_mbuf *mbufs[num];
int i, ret;
unsigned int core_id;
struct pp2_hif *hif;
--
2.28.0
Re: [dpdk-dev] [PATCH v1 02/38] net/mvpp2: remove debug log on fast-path
Reviewed-by: Michael Shamis
-Original Message-
From: dev On Behalf Of lir...@marvell.com
Sent: Wednesday, December 2, 2020 12:12 PM
To: Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Liron Himi ; sta...@dpdk.org
Subject: [dpdk-dev] [PATCH v1 02/38] net/mvpp2: remove debug log on fast-path
From: Liron Himi
in case of non-ip frame the current code reached the 'default'
case which result with function call to log a msg.
those kind of calls should not be performed on fast-path.
The performance for this kind of frames increased by 50%
Fixes: acab7d58c ("net/mvpp2: convert to dynamic logging")
Cc: sta...@dpdk.org
Signed-off-by: Liron Himi
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c
index 93fb30cdb..8c3278ec4 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.c
+++ b/drivers/net/mvpp2/mrvl_ethdev.c
@@ -2171,7 +2171,6 @@ mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc
*desc,
*l4_offset = *l3_offset + MRVL_ARP_LENGTH;
break;
default:
- MRVL_LOG(DEBUG, "Failed to recognise l3 packet type");
break;
}
@@ -2183,7 +2182,6 @@ mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc
*desc,
packet_type |= RTE_PTYPE_L4_UDP;
break;
default:
- MRVL_LOG(DEBUG, "Failed to recognise l4 packet type");
break;
}
--
2.28.0
[dpdk-dev] [EXT] RE: [PATCH] crypto/mvsam: remove crypto end enumerators
Thanks! --- Sent from Workspace ONE Boxer<https://whatisworkspaceone.com/boxer> On 9 October 2020 at 22:51:52 GMT+3, Akhil Goyal wrote: External Email -- > From: Michael Shamis > > Remove enumerators RTE_CRYPTO_CIPHER_LIST_END, > RTE_CRYPTO_AUTH_LIST_END, RTE_CRYPTO_AEAD_LIST_END to prevent > some problems that may arise when adding new crypto algorithms. > > Signed-off-by: Michael Shamis > --- Applied to dpdk-next-crypto Thanks.
