[PATCH] D40864: [Darwin] Add a new -mstack-probe option and enable by default

[Amara Emerson via Phabricator via cfe-commits]

aemerson abandoned this revision.
aemerson added a comment.

In https://reviews.llvm.org/D40864#1100492, @dexonsmith wrote:

> Did this eventually go in?


No, this approach was superseded. I will upstream a new implementation in the 
near future.


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https://reviews.llvm.org/D40864



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[PATCH] D46863: [X86] Use __builtin_convertvector to implement some of the packed integer to packed float conversion intrinsics.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

Hi Craig,

The `__builtin_ia32_cvtdq2ps` builtin seems to be supported by gcc, and this 
change breaks code which has been using this without problems for years. Can we 
restore it?

Amara


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[PATCH] D43108: Support for the mno-stack-arg-probe flag

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

Can we clarify the meaning of this option a bit. The doc you've added here is 
saying that `-mno-stack-arg-probe` disables stack probes. Then what does 
`-mstack-arg-probe` mean specifically? Does it mean that only stack probes for 
ABI required reasons are enabled, or probes are done even in cases where the 
ABI doesn't require them? Either way, the doc needs to be clearer on the exact 
purpose.

I'm currently working on enabling stack probes for reasons other than ABI, and 
so if the answer is that this option is only concerned with ABI, we will need 
another option like `-fstack-check`.


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https://reviews.llvm.org/D43108



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[PATCH] D43108: Support for the mno-stack-arg-probe flag

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

In https://reviews.llvm.org/D43108#1023300, @nruslan wrote:

> By default, stack probes are enabled (i.e., -mstack-arg-probe is the default 
> behavior) and have the size of 4K in x86.


This part what I wanted to clarify, `-mstack-probe-arg` is enabling stack 
probes if the ABI requires it only, not for other reasons like security.


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[PATCH] D58320: [Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the builtins library.

[Amara Emerson via Phabricator via cfe-commits]

aemerson updated this revision to Diff 189237.
aemerson retitled this revision from "[Darwin] Introduce a new flag, 
-flink-builtins-rt that forces linking of the builtins library." to "[Darwin] 
Introduce a new flag, -fapple-link-rtlib that forces linking of the builtins 
library.".
aemerson edited the summary of this revision.
aemerson added a comment.

Since we can't use the proposed alternatives of -nolibc and -nostdlib++ 
reviving this patch as an Apple specific flag.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58320/new/

https://reviews.llvm.org/D58320

Files:
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/Darwin.cpp
  clang/lib/Driver/ToolChains/Darwin.h
  clang/test/Driver/darwin-fapple-link-rtlib.c

Index: clang/test/Driver/darwin-fapple-link-rtlib.c
===
--- /dev/null
+++ clang/test/Driver/darwin-fapple-link-rtlib.c
@@ -0,0 +1,6 @@
+// RUN: %clang -target arm64-apple-ios12.0 %s -nostdlib -fapple-link-rtlib -resource-dir=%S/Inputs/resource_dir -### 2>&1 | FileCheck %s
+// RUN: %clang -target arm64-apple-ios12.0 %s -static -fapple-link-rtlib -resource-dir=%S/Inputs/resource_dir -### 2>&1 | FileCheck %s
+// RUN: %clang -target arm64-apple-ios12.0 %s -fapple-link-rtlib -resource-dir=%S/Inputs/resource_dir -### 2>&1 | FileCheck %s --check-prefix=DEFAULT
+// CHECK-NOT: "-lSystem"
+// DEFAULT: "-lSystem"
+// CHECK: libclang_rt.ios.a
Index: clang/lib/Driver/ToolChains/Darwin.h
===
--- clang/lib/Driver/ToolChains/Darwin.h
+++ clang/lib/Driver/ToolChains/Darwin.h
@@ -157,7 +157,8 @@
   /// FIXME: This API is intended for use with embedded libraries only, and is
   /// misleadingly named.
   virtual void AddLinkRuntimeLibArgs(const llvm::opt::ArgList &Args,
- llvm::opt::ArgStringList &CmdArgs) const;
+ llvm::opt::ArgStringList &CmdArgs,
+ bool ForceLinkBuiltinRT = false) const;
 
   virtual void addStartObjectFileArgs(const llvm::opt::ArgList &Args,
   llvm::opt::ArgStringList &CmdArgs) const {
@@ -495,7 +496,8 @@
   RuntimeLibType GetRuntimeLibType(const llvm::opt::ArgList &Args) const override;
 
   void AddLinkRuntimeLibArgs(const llvm::opt::ArgList &Args,
- llvm::opt::ArgStringList &CmdArgs) const override;
+ llvm::opt::ArgStringList &CmdArgs,
+ bool ForceLinkBuiltinRT = false) const override;
 
   void AddClangCXXStdlibIncludeArgs(
   const llvm::opt::ArgList &DriverArgs,
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -568,15 +568,26 @@
 
   if (getToolChain().ShouldLinkCXXStdlib(Args))
 getToolChain().AddCXXStdlibLibArgs(Args, CmdArgs);
-  if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nodefaultlibs)) {
+
+  bool NoStdOrDefaultLibs =
+  Args.hasArg(options::OPT_nostdlib, options::OPT_nodefaultlibs);
+  bool ForceLinkBuiltins = Args.hasArg(options::OPT_fapple_link_rtlib);
+  if (!NoStdOrDefaultLibs || ForceLinkBuiltins) {
 // link_ssp spec is empty.
 
-// Let the tool chain choose which runtime library to link.
-getMachOToolChain().AddLinkRuntimeLibArgs(Args, CmdArgs);
+// If we have both -nostdlib/nodefaultlibs and -fapple-link-rtlib then
+// we just want to link the builtins, not the other libs like libSystem.
+if (NoStdOrDefaultLibs && ForceLinkBuiltins) {
+  getMachOToolChain().AddLinkRuntimeLib(Args, CmdArgs, "builtins");
+} else {
+  // Let the tool chain choose which runtime library to link.
+  getMachOToolChain().AddLinkRuntimeLibArgs(Args, CmdArgs,
+ForceLinkBuiltins);
 
-// No need to do anything for pthreads. Claim argument to avoid warning.
-Args.ClaimAllArgs(options::OPT_pthread);
-Args.ClaimAllArgs(options::OPT_pthreads);
+  // No need to do anything for pthreads. Claim argument to avoid warning.
+  Args.ClaimAllArgs(options::OPT_pthread);
+  Args.ClaimAllArgs(options::OPT_pthreads);
+}
   }
 
   if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nostartfiles)) {
@@ -1074,7 +1085,8 @@
 }
 
 void DarwinClang::AddLinkRuntimeLibArgs(const ArgList &Args,
-ArgStringList &CmdArgs) const {
+ArgStringList &CmdArgs,
+bool ForceLinkBuiltinRT) const {
   // Call once to ensure diagnostic is printed if wrong value was specified
   GetRuntimeLibType(Args);
 
@@ -1082,8 +1094,11 @@
   // libraries with -static.
   if (Args.hasArg(options::OPT_static) ||
   Args.hasArg(opti

[PATCH] D58320: [Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the builtins library.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

In D58320#1418477 , @peter.smith wrote:

> I've no objections to adding the command line as a Darwin only option. 
> Implementation looks fine to me although I've not got any prior experience 
> with Darwin.


Thanks, @ab ok for Darwin?


Repository:
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[PATCH] D59615: [AArch64] When creating SISD intrinsic calls widen scalar args into a zero vectors, not undef

[Amara Emerson via Phabricator via cfe-commits]

aemerson created this revision.
aemerson added reviewers: kristof.beyls, t.p.northover, olista01.
aemerson added a project: clang.
Herald added subscribers: arphaman, javed.absar.

Some intrinsics like saturating operations may set flags, so if the scalar arg 
is inserted into an undef vector, the undef elements may trigger unwanted side 
effects. Using zero should be safer than undef.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D59615

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/aarch64-neon-intrinsics.c
  clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
  clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c

Index: clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
===
--- clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
+++ clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
@@ -39,12 +39,12 @@
 
 // CHECK-LABEL: test_vqrdmlahh_s16
 int16_t test_vqrdmlahh_s16(int16_t a, int16_t b, int16_t c) {
-// CHECK: [[insb:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insc:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insb:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insc:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
 // CHECK: [[mul:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[insb]], <4 x i16> [[insc]])
 // CHECK: extractelement <4 x i16> [[mul]], i64 0
-// CHECK: [[insa:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insmul:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insa:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insmul:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
 // CHECK: [[add:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqadd.v4i16(<4 x i16> [[insa]], <4 x i16> [[insmul]])
 // CHECK: extractelement <4 x i16> [[add]], i64 0
   return vqrdmlahh_s16(a, b, c);
@@ -60,12 +60,12 @@
 // CHECK-LABEL: test_vqrdmlahh_lane_s16
 int16_t test_vqrdmlahh_lane_s16(int16_t a, int16_t b, int16x4_t c) {
 // CHECK: extractelement <4 x i16> {{%.*}}, i32 3
-// CHECK: [[insb:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insc:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insb:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insc:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
 // CHECK: [[mul:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[insb]], <4 x i16> [[insc]])
 // CHECK: extractelement <4 x i16> [[mul]], i64 0
-// CHECK: [[insa:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insmul:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insa:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insmul:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
 // CHECK: [[add:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqadd.v4i16(<4 x i16> [[insa]], <4 x i16> [[insmul]])
 // CHECK: extractelement <4 x i16> [[add]], i64 0
   return vqrdmlahh_lane_s16(a, b, c, 3);
@@ -82,12 +82,12 @@
 // CHECK-LABEL: test_vqrdmlahh_laneq_s16
 int16_t test_vqrdmlahh_laneq_s16(int16_t a, int16_t b, int16x8_t c) {
 // CHECK: extractelement <8 x i16> {{%.*}}, i32 7
-// CHECK: [[insb:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insc:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insb:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insc:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
 // CHECK: [[mul:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[insb]], <4 x i16> [[insc]])
 // CHECK: extractelement <4 x i16> [[mul]], i64 0
-// CHECK: [[insa:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insmul:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insa:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insmul:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
 // CHECK: [[add:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqadd.v4i16(<4 x i16> [[insa]], <4 x i16> [[insmul]])
 // CHECK: extractelement <4 x i16> [[add]], i64 0
   return vqrdmlahh_laneq_s16(a, b, c, 7);
@@ -135,12 +135,12 @@
 
 // CHECK-LABEL: test_vqrdmlshh_s16
 int16_t test_vqrdmlshh_s16(int16_t a, int16_t b, int16_t c) {
-// CHECK: [[insb:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insc:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insb:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insc:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
 // CHECK: [[mul:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[insb]], <4 x i16> 

[PATCH] D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants

[Amara Emerson via Phabricator via cfe-commits]

aemerson created this revision.
aemerson added reviewers: paquette, eli.friedman, t.p.northover.
aemerson added projects: LLVM, clang.
Herald added subscribers: Petar.Avramovic, hiraditya, kristof.beyls, 
javed.absar.

This is the result of discussions on the list about how to deal with intrinsics 
which require codegen to disambiguate them via only the integer/fp overloads. 
It causes problems for GlobalISel as some of that information is lost during 
translation, while with other operations like IR instructions the information 
is encoded into the instruction opcode.

This patch changes clang to emit the new faddp intrinsic if the vector operands 
to the builtin have FP element types. LLVM IR AutoUpgrade has been taught to 
upgrade existing calls to aarch64.neon.addp with fp vector arguments, and we 
remove the workarounds introduced for GlobalISel in r355865.

This is a more permanent solution to PR40968.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D59655

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/aarch64-neon-intrinsics.c
  clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/IR/AutoUpgrade.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
  llvm/lib/Target/AArch64/AArch64LegalizerInfo.h
  llvm/test/CodeGen/AArch64/GlobalISel/fallback-ambiguous-addp-intrinsic.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
  llvm/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
  llvm/test/CodeGen/AArch64/arm64-vadd.ll
  llvm/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll

Index: llvm/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll
===
--- /dev/null
+++ llvm/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll
@@ -0,0 +1,10 @@
+; RUN: opt -S < %s -mtriple=arm64 | FileCheck %s
+declare <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float>, <4 x float>)
+declare <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float>, <4 x float>)
+
+; CHECK: @llvm.aarch64.neon.faddp.v4f32
+define <4 x float> @upgrade_aarch64_neon_addp_float(<4 x float> %a, <4 x float> %b) {
+  %res = call <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float> %a, <4 x float> %b)
+  ret <4 x float> %res
+}
+
Index: llvm/test/CodeGen/AArch64/arm64-vadd.ll
===
--- llvm/test/CodeGen/AArch64/arm64-vadd.ll
+++ llvm/test/CodeGen/AArch64/arm64-vadd.ll
@@ -712,7 +712,7 @@
 ;CHECK: faddp.2s
 %tmp1 = load <2 x float>, <2 x float>* %A
 %tmp2 = load <2 x float>, <2 x float>* %B
-%tmp3 = call <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+%tmp3 = call <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
 ret <2 x float> %tmp3
 }
 
@@ -721,7 +721,7 @@
 ;CHECK: faddp.4s
 %tmp1 = load <4 x float>, <4 x float>* %A
 %tmp2 = load <4 x float>, <4 x float>* %B
-%tmp3 = call <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
+%tmp3 = call <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
 ret <4 x float> %tmp3
 }
 
@@ -730,13 +730,13 @@
 ;CHECK: faddp.2d
 %tmp1 = load <2 x double>, <2 x double>* %A
 %tmp2 = load <2 x double>, <2 x double>* %B
-%tmp3 = call <2 x double> @llvm.aarch64.neon.addp.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
+%tmp3 = call <2 x double> @llvm.aarch64.neon.faddp.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
 ret <2 x double> %tmp3
 }
 
-declare <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float>, <2 x float>) nounwind readnone
-declare <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float>, <4 x float>) nounwind readnone
-declare <2 x double> @llvm.aarch64.neon.addp.v2f64(<2 x double>, <2 x double>) nounwind readnone
+declare <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float>, <2 x float>) nounwind readnone
+declare <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float>, <4 x float>) nounwind readnone
+declare <2 x double> @llvm.aarch64.neon.faddp.v2f64(<2 x double>, <2 x double>) nounwind readnone
 
 define <2 x i64> @uaddl_duprhs(<4 x i32> %lhs, i32 %rhs) {
 ; CHECK-LABEL: uaddl_duprhs
Index: llvm/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
===
--- llvm/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
+++ llvm/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
@@ -65,27 +65,27 @@
 ret <2 x i64> %val
 }
 
-declare <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float>, <2 x float>)
-declare <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float>, <4 x float>)
-declare <2 x double> @llvm.aarch64.neon.addp.v2f64(<2 x double>, <2 x double>)
+declare <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float>, <2 x float>)
+d

[PATCH] D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants

[Amara Emerson via Phabricator via cfe-commits]

aemerson updated this revision to Diff 191745.
aemerson added a comment.

Minor test tweak.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59655/new/

https://reviews.llvm.org/D59655

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/aarch64-neon-intrinsics.c
  clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/IR/AutoUpgrade.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
  llvm/lib/Target/AArch64/AArch64LegalizerInfo.h
  llvm/test/CodeGen/AArch64/GlobalISel/fallback-ambiguous-addp-intrinsic.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
  llvm/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
  llvm/test/CodeGen/AArch64/arm64-vadd.ll
  llvm/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll

Index: llvm/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll
===
--- /dev/null
+++ llvm/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll
@@ -0,0 +1,9 @@
+; RUN: opt -S < %s -mtriple=arm64 | FileCheck %s
+declare <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float>, <4 x float>)
+
+; CHECK: call <4 x float> @llvm.aarch64.neon.faddp.v4f32
+define <4 x float> @upgrade_aarch64_neon_addp_float(<4 x float> %a, <4 x float> %b) {
+  %res = call <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float> %a, <4 x float> %b)
+  ret <4 x float> %res
+}
+
Index: llvm/test/CodeGen/AArch64/arm64-vadd.ll
===
--- llvm/test/CodeGen/AArch64/arm64-vadd.ll
+++ llvm/test/CodeGen/AArch64/arm64-vadd.ll
@@ -712,7 +712,7 @@
 ;CHECK: faddp.2s
 %tmp1 = load <2 x float>, <2 x float>* %A
 %tmp2 = load <2 x float>, <2 x float>* %B
-%tmp3 = call <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+%tmp3 = call <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
 ret <2 x float> %tmp3
 }
 
@@ -721,7 +721,7 @@
 ;CHECK: faddp.4s
 %tmp1 = load <4 x float>, <4 x float>* %A
 %tmp2 = load <4 x float>, <4 x float>* %B
-%tmp3 = call <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
+%tmp3 = call <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
 ret <4 x float> %tmp3
 }
 
@@ -730,13 +730,13 @@
 ;CHECK: faddp.2d
 %tmp1 = load <2 x double>, <2 x double>* %A
 %tmp2 = load <2 x double>, <2 x double>* %B
-%tmp3 = call <2 x double> @llvm.aarch64.neon.addp.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
+%tmp3 = call <2 x double> @llvm.aarch64.neon.faddp.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
 ret <2 x double> %tmp3
 }
 
-declare <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float>, <2 x float>) nounwind readnone
-declare <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float>, <4 x float>) nounwind readnone
-declare <2 x double> @llvm.aarch64.neon.addp.v2f64(<2 x double>, <2 x double>) nounwind readnone
+declare <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float>, <2 x float>) nounwind readnone
+declare <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float>, <4 x float>) nounwind readnone
+declare <2 x double> @llvm.aarch64.neon.faddp.v2f64(<2 x double>, <2 x double>) nounwind readnone
 
 define <2 x i64> @uaddl_duprhs(<4 x i32> %lhs, i32 %rhs) {
 ; CHECK-LABEL: uaddl_duprhs
Index: llvm/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
===
--- llvm/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
+++ llvm/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
@@ -65,27 +65,27 @@
 ret <2 x i64> %val
 }
 
-declare <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float>, <2 x float>)
-declare <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float>, <4 x float>)
-declare <2 x double> @llvm.aarch64.neon.addp.v2f64(<2 x double>, <2 x double>)
+declare <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float>, <2 x float>)
+declare <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float>, <4 x float>)
+declare <2 x double> @llvm.aarch64.neon.faddp.v2f64(<2 x double>, <2 x double>)
 
 define <2 x float> @test_faddp_v2f32(<2 x float> %lhs, <2 x float> %rhs) {
 ; CHECK: test_faddp_v2f32:
-%val = call <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float> %lhs, <2 x float> %rhs)
+%val = call <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float> %lhs, <2 x float> %rhs)
 ; CHECK: faddp v0.2s, v0.2s, v1.2s
 ret <2 x float> %val
 }
 
 define <4 x float> @test_faddp_v4f32(<4 x float> %lhs, <4 x float> %rhs) {
 ; CHECK: test_faddp_v4f32:
-%val = call <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float> %lhs, <4 x float> %rhs)
+%val = call <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float> %lhs, <4 x flo

[PATCH] D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

I've put up a langref change as a separate review: D59657 



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[PATCH] D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants

[Amara Emerson via Phabricator via cfe-commits]

aemerson marked an inline comment as done.
aemerson added inline comments.



Comment at: llvm/lib/IR/AutoUpgrade.cpp:574
+  if (ArgTy->getElementType()->isFloatingPointTy()) {
+auto fArgs = F->getFunctionType()->params();
+Type *Tys[] = {fArgs[0], fArgs[1]};

efriedma wrote:
> This code is weird... you're computing the types in two different ways.  
> Also, missing a check for F->arg_size() (so we don't crash on invalid IR).
I'll consolidate the logic, but none of the other code here checks for IR 
validity. By the time we reach here the IR should be valid, we're just 
translating it to a newer version. I can put an assert anyway.


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[PATCH] D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants

[Amara Emerson via Phabricator via cfe-commits]

aemerson updated this revision to Diff 191774.
aemerson added a comment.

Simplify logic and don't try to upgrade if IR is invalid.


Repository:
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Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/aarch64-neon-intrinsics.c
  clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/IR/AutoUpgrade.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
  llvm/lib/Target/AArch64/AArch64LegalizerInfo.h
  llvm/test/CodeGen/AArch64/GlobalISel/fallback-ambiguous-addp-intrinsic.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
  llvm/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
  llvm/test/CodeGen/AArch64/arm64-vadd.ll
  llvm/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll

Index: llvm/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll
===
--- /dev/null
+++ llvm/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll
@@ -0,0 +1,9 @@
+; RUN: opt -S < %s -mtriple=arm64 | FileCheck %s
+declare <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float>, <4 x float>)
+
+; CHECK: call <4 x float> @llvm.aarch64.neon.faddp.v4f32
+define <4 x float> @upgrade_aarch64_neon_addp_float(<4 x float> %a, <4 x float> %b) {
+  %res = call <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float> %a, <4 x float> %b)
+  ret <4 x float> %res
+}
+
Index: llvm/test/CodeGen/AArch64/arm64-vadd.ll
===
--- llvm/test/CodeGen/AArch64/arm64-vadd.ll
+++ llvm/test/CodeGen/AArch64/arm64-vadd.ll
@@ -712,7 +712,7 @@
 ;CHECK: faddp.2s
 %tmp1 = load <2 x float>, <2 x float>* %A
 %tmp2 = load <2 x float>, <2 x float>* %B
-%tmp3 = call <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+%tmp3 = call <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
 ret <2 x float> %tmp3
 }
 
@@ -721,7 +721,7 @@
 ;CHECK: faddp.4s
 %tmp1 = load <4 x float>, <4 x float>* %A
 %tmp2 = load <4 x float>, <4 x float>* %B
-%tmp3 = call <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
+%tmp3 = call <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
 ret <4 x float> %tmp3
 }
 
@@ -730,13 +730,13 @@
 ;CHECK: faddp.2d
 %tmp1 = load <2 x double>, <2 x double>* %A
 %tmp2 = load <2 x double>, <2 x double>* %B
-%tmp3 = call <2 x double> @llvm.aarch64.neon.addp.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
+%tmp3 = call <2 x double> @llvm.aarch64.neon.faddp.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
 ret <2 x double> %tmp3
 }
 
-declare <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float>, <2 x float>) nounwind readnone
-declare <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float>, <4 x float>) nounwind readnone
-declare <2 x double> @llvm.aarch64.neon.addp.v2f64(<2 x double>, <2 x double>) nounwind readnone
+declare <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float>, <2 x float>) nounwind readnone
+declare <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float>, <4 x float>) nounwind readnone
+declare <2 x double> @llvm.aarch64.neon.faddp.v2f64(<2 x double>, <2 x double>) nounwind readnone
 
 define <2 x i64> @uaddl_duprhs(<4 x i32> %lhs, i32 %rhs) {
 ; CHECK-LABEL: uaddl_duprhs
Index: llvm/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
===
--- llvm/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
+++ llvm/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
@@ -65,27 +65,27 @@
 ret <2 x i64> %val
 }
 
-declare <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float>, <2 x float>)
-declare <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float>, <4 x float>)
-declare <2 x double> @llvm.aarch64.neon.addp.v2f64(<2 x double>, <2 x double>)
+declare <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float>, <2 x float>)
+declare <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float>, <4 x float>)
+declare <2 x double> @llvm.aarch64.neon.faddp.v2f64(<2 x double>, <2 x double>)
 
 define <2 x float> @test_faddp_v2f32(<2 x float> %lhs, <2 x float> %rhs) {
 ; CHECK: test_faddp_v2f32:
-%val = call <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float> %lhs, <2 x float> %rhs)
+%val = call <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float> %lhs, <2 x float> %rhs)
 ; CHECK: faddp v0.2s, v0.2s, v1.2s
 ret <2 x float> %val
 }
 
 define <4 x float> @test_faddp_v4f32(<4 x float> %lhs, <4 x float> %rhs) {
 ; CHECK: test_faddp_v4f32:
-%val = call <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float> %lhs, <4 x float> %rhs)
+%val = call <4 x float> @llvm.aarch64.neo

[PATCH] D59655: [AArch64] Split the neon.addp intrinsic into integer and fp variants

[Amara Emerson via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL356722: [AArch64] Split the neon.addp intrinsic into integer 
and fp variants. (authored by aemerson, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D59655?vs=191774&id=191792#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
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Files:
  cfe/trunk/lib/CodeGen/CGBuiltin.cpp
  cfe/trunk/test/CodeGen/aarch64-neon-intrinsics.c
  cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
  llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
  llvm/trunk/lib/IR/AutoUpgrade.cpp
  llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp
  llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.h
  
llvm/trunk/test/CodeGen/AArch64/GlobalISel/fallback-ambiguous-addp-intrinsic.mir
  llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
  llvm/trunk/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
  llvm/trunk/test/CodeGen/AArch64/arm64-vadd.ll
  llvm/trunk/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll

Index: llvm/trunk/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll
===
--- llvm/trunk/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll
+++ llvm/trunk/test/CodeGen/AArch64/autoupgrade-aarch64-neon-addp-float.ll
@@ -0,0 +1,9 @@
+; RUN: opt -S < %s -mtriple=arm64 | FileCheck %s
+declare <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float>, <4 x float>)
+
+; CHECK: call <4 x float> @llvm.aarch64.neon.faddp.v4f32
+define <4 x float> @upgrade_aarch64_neon_addp_float(<4 x float> %a, <4 x float> %b) {
+  %res = call <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float> %a, <4 x float> %b)
+  ret <4 x float> %res
+}
+
Index: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
===
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
@@ -151,7 +151,7 @@
 # DEBUG:  .. the first uncovered type index: 1, OK
 #
 # DEBUG-NEXT: G_INTRINSIC (opcode {{[0-9]+}}): 0 type indices
-# DEBUG:  .. type index coverage check SKIPPED: user-defined predicate detected
+# DEBUG:  .. type index coverage check SKIPPED: no rules defined
 #
 # DEBUG-NEXT: G_INTRINSIC_W_SIDE_EFFECTS (opcode {{[0-9]+}}): 0 type indices
 # DEBUG:  .. type index coverage check SKIPPED: no rules defined
Index: llvm/trunk/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
===
--- llvm/trunk/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
+++ llvm/trunk/test/CodeGen/AArch64/arm64-neon-add-pairwise.ll
@@ -65,27 +65,27 @@
 ret <2 x i64> %val
 }
 
-declare <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float>, <2 x float>)
-declare <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float>, <4 x float>)
-declare <2 x double> @llvm.aarch64.neon.addp.v2f64(<2 x double>, <2 x double>)
+declare <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float>, <2 x float>)
+declare <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float>, <4 x float>)
+declare <2 x double> @llvm.aarch64.neon.faddp.v2f64(<2 x double>, <2 x double>)
 
 define <2 x float> @test_faddp_v2f32(<2 x float> %lhs, <2 x float> %rhs) {
 ; CHECK: test_faddp_v2f32:
-%val = call <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float> %lhs, <2 x float> %rhs)
+%val = call <2 x float> @llvm.aarch64.neon.faddp.v2f32(<2 x float> %lhs, <2 x float> %rhs)
 ; CHECK: faddp v0.2s, v0.2s, v1.2s
 ret <2 x float> %val
 }
 
 define <4 x float> @test_faddp_v4f32(<4 x float> %lhs, <4 x float> %rhs) {
 ; CHECK: test_faddp_v4f32:
-%val = call <4 x float> @llvm.aarch64.neon.addp.v4f32(<4 x float> %lhs, <4 x float> %rhs)
+%val = call <4 x float> @llvm.aarch64.neon.faddp.v4f32(<4 x float> %lhs, <4 x float> %rhs)
 ; CHECK: faddp v0.4s, v0.4s, v1.4s
 ret <4 x float> %val
 }
 
 define <2 x double> @test_faddp_v2f64(<2 x double> %lhs, <2 x double> %rhs) {
 ; CHECK: test_faddp_v2f64:
-%val = call <2 x double> @llvm.aarch64.neon.addp.v2f64(<2 x double> %lhs, <2 x double> %rhs)
+%val = call <2 x double> @llvm.aarch64.neon.faddp.v2f64(<2 x double> %lhs, <2 x double> %rhs)
 ; CHECK: faddp v0.2d, v0.2d, v1.2d
 ret <2 x double> %val
 }
Index: llvm/trunk/test/CodeGen/AArch64/arm64-vadd.ll
===
--- llvm/trunk/test/CodeGen/AArch64/arm64-vadd.ll
+++ llvm/trunk/test/CodeGen/AArch64/arm64-vadd.ll
@@ -712,7 +712,7 @@
 ;CHECK: faddp.2s
 %tmp1 = load <2 x float>, <2 x float>* %A
 %tmp2 = load <2 x float>, <2 x float>* %B
-%tmp3 = call <2 x float> @llvm.aarch64.neon.addp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+  

[PATCH] D59615: [AArch64] When creating SISD intrinsic calls widen scalar args into a zero vectors, not undef

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

In D59615#1439153 , @t.p.northover 
wrote:

> Did you look into a scalar variant of the intrinsic call instead? These 
> instructions have non-vector variants (e.g. `sqadd s0, s0, s0`), and that's 
> actually why the intrinsics exist in the first place. It'd be a shame to 
> always require this extra work.


This looks quite involved as the scalar intrinsics have illegal types etc, and 
at the moment I don't have a lot of time to spend on this, it was just intended 
as a fix for the unstable tests: 
http://lab.llvm.org:8011/builders/clang-cmake-aarch64-lld/builds/6257


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[PATCH] D59615: [AArch64] When creating SISD intrinsic calls widen scalar args into a zero vectors, not undef

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

Ping. I've filed PR41260 for the code quality issue.


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[PATCH] D58320: [Darwin] Introduce a new flag, -flink-builtins-rt that forces linking of the builtins library.

[Amara Emerson via Phabricator via cfe-commits]

aemerson created this revision.
aemerson added reviewers: peter.smith, dexonsmith, ab.
aemerson added a project: clang.
Herald added subscribers: jdoerfert, jfb.

This driver flag is useful when users want to link against the compiler's 
builtins, but nothing else, and so use flags like -nostdlib.

Implemented only for Darwin at the moment.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D58320

Files:
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/Darwin.cpp
  clang/lib/Driver/ToolChains/Darwin.h
  clang/test/Driver/darwin-flink-builtins-rt.c

Index: clang/test/Driver/darwin-flink-builtins-rt.c
===
--- /dev/null
+++ clang/test/Driver/darwin-flink-builtins-rt.c
@@ -0,0 +1,6 @@
+// RUN: %clang -target arm64-apple-ios12.0 %s -nostdlib -flink-builtins-rt -### 2>&1 | FileCheck %s
+// RUN: %clang -target arm64-apple-ios12.0 %s -static -flink-builtins-rt -### 2>&1 | FileCheck %s
+// RUN: %clang -target arm64-apple-ios12.0 %s -flink-builtins-rt -### 2>&1 | FileCheck %s --check-prefix=DEFAULT
+// CHECK-NOT: "-lSystem"
+// DEFAULT: "-lSystem"
+// CHECK: libclang_rt.ios.a
Index: clang/lib/Driver/ToolChains/Darwin.h
===
--- clang/lib/Driver/ToolChains/Darwin.h
+++ clang/lib/Driver/ToolChains/Darwin.h
@@ -157,7 +157,8 @@
   /// FIXME: This API is intended for use with embedded libraries only, and is
   /// misleadingly named.
   virtual void AddLinkRuntimeLibArgs(const llvm::opt::ArgList &Args,
- llvm::opt::ArgStringList &CmdArgs) const;
+ llvm::opt::ArgStringList &CmdArgs,
+ bool ForceLinkBuiltinRT = false) const;
 
   virtual void addStartObjectFileArgs(const llvm::opt::ArgList &Args,
   llvm::opt::ArgStringList &CmdArgs) const {
@@ -495,7 +496,8 @@
   RuntimeLibType GetRuntimeLibType(const llvm::opt::ArgList &Args) const override;
 
   void AddLinkRuntimeLibArgs(const llvm::opt::ArgList &Args,
- llvm::opt::ArgStringList &CmdArgs) const override;
+ llvm::opt::ArgStringList &CmdArgs,
+ bool ForceLinkBuiltinRT = false) const override;
 
   void AddClangCXXStdlibIncludeArgs(
   const llvm::opt::ArgList &DriverArgs,
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -568,15 +568,26 @@
 
   if (getToolChain().ShouldLinkCXXStdlib(Args))
 getToolChain().AddCXXStdlibLibArgs(Args, CmdArgs);
-  if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nodefaultlibs)) {
+
+  bool NoStdOrDefaultLibs =
+  Args.hasArg(options::OPT_nostdlib, options::OPT_nodefaultlibs);
+  bool ForceLinkBuiltins = Args.hasArg(options::OPT_flink_builtins_rt);
+  if (!NoStdOrDefaultLibs || ForceLinkBuiltins) {
 // link_ssp spec is empty.
 
-// Let the tool chain choose which runtime library to link.
-getMachOToolChain().AddLinkRuntimeLibArgs(Args, CmdArgs);
+// If we have both -nostdlib/nodefaultlibs and -flink-builtins-rt then
+// we just want to link the builtins, not the other libs like libSystem.
+if (NoStdOrDefaultLibs && ForceLinkBuiltins) {
+  getMachOToolChain().AddLinkRuntimeLib(Args, CmdArgs, "builtins");
+} else {
+  // Let the tool chain choose which runtime library to link.
+  getMachOToolChain().AddLinkRuntimeLibArgs(Args, CmdArgs,
+ForceLinkBuiltins);
 
-// No need to do anything for pthreads. Claim argument to avoid warning.
-Args.ClaimAllArgs(options::OPT_pthread);
-Args.ClaimAllArgs(options::OPT_pthreads);
+  // No need to do anything for pthreads. Claim argument to avoid warning.
+  Args.ClaimAllArgs(options::OPT_pthread);
+  Args.ClaimAllArgs(options::OPT_pthreads);
+}
   }
 
   if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nostartfiles)) {
@@ -1074,7 +1085,8 @@
 }
 
 void DarwinClang::AddLinkRuntimeLibArgs(const ArgList &Args,
-ArgStringList &CmdArgs) const {
+ArgStringList &CmdArgs,
+bool ForceLinkBuiltinRT) const {
   // Call once to ensure diagnostic is printed if wrong value was specified
   GetRuntimeLibType(Args);
 
@@ -1082,8 +1094,11 @@
   // libraries with -static.
   if (Args.hasArg(options::OPT_static) ||
   Args.hasArg(options::OPT_fapple_kext) ||
-  Args.hasArg(options::OPT_mkernel))
+  Args.hasArg(options::OPT_mkernel)) {
+if (ForceLinkBuiltinRT)
+  AddLinkRuntimeLib(Args, CmdArgs, "builtins");
 return;
+  }
 
   // Reject -static-libgcc for now, we can deal with this when and if someone
   // cares. This is

[PATCH] D58320: [Darwin] Introduce a new flag, -flink-builtins-rt that forces linking of the builtins library.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

In D58320#1402254 , @peter.smith wrote:

> The implementation changes in the Darwin toolchain look fine to me, although 
> with respect to the command line option I think Petr Hosek's message on 
> cfe-dev is interesting:
>
> > GCC implements -nolibc which could be used to achieve the same effect when 
> > combined with -nostartfiles (and -nostdlib++ when compiling C++). I'd 
> > prefer that approach not only because it improves compatibility with with 
> > GCC, but also because it matches existing flag scheme which is subtractive 
> > rather than additive (i.e. -nodefaultlibs, -nostdlib, -nostdlib++, 
> > -nostartfiles). Clang already defines this flag but the only toolchain that 
> > currently supports it is DragonFly.
>
> Looking at https://gcc.gnu.org/onlinedocs/gcc/Link-Options.html (quoted here 
> for convenience)
>
> > -nostartfiles
> >  Do not use the standard system startup files when linking. The standard 
> > system libraries are used normally, unless -nostdlib, -nolibc, or 
> > -nodefaultlibs is used.
> > -nolibc
> >  Do not use the C library or system libraries tightly coupled with it when 
> > linking. Still link with the startup files, libgcc or toolchain provided 
> > language support libraries such as libgnat, libgfortran or libstdc++ unless 
> > options preventing their inclusion are used as well. This typically removes 
> > -lc from the link command line, as well as system libraries that normally 
> > go with it and become meaningless when absence of a C library is assumed, 
> > for example -lpthread or -lm in some configurations. This is intended for 
> > bare-board targets when there is indeed no C library available.
>
> It does seem like these options accomplish what -flink_builtins_rt do with 
> the added advantage of being more portable with gcc. If they don't work for 
> you it will be worth double checking with Petr.


Thanks for taking a look. I've replied on the thread for the problem that 
approach presents.


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[PATCH] D58320: [Darwin] Introduce a new flag, -flink-builtins-rt that forces linking of the builtins library.

[Amara Emerson via Phabricator via cfe-commits]

aemerson abandoned this revision.
aemerson added a comment.

After discussion on the thread, we can implement this requirement with -nolibc 
-nostdlib++ -nostartfiles


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[PATCH] D58320: [Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the builtins library.

[Amara Emerson via Phabricator via cfe-commits]

aemerson marked an inline comment as done.
aemerson added inline comments.



Comment at: clang/lib/Driver/ToolChains/Darwin.cpp:2084
 
   AddLinkRuntimeLib(Args, CmdArgs, CompilerRT, RLO_IsEmbedded);
 }

ab wrote:
> This is different from 'builtins'.  Are you OK with the difference?  
> Otherwise maybe this should be an error for now;  I wouldn't be surprised if 
> we never hit this path (this part, I'm not familiar with)
I'm ok with it because we'll just ignore the option for the ARM embedded case, 
if that ever changes we can implement it later. I don't think we'll need to 
though.


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[PATCH] D58320: [Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the builtins library.

[Amara Emerson via Phabricator via cfe-commits]

This revision was not accepted when it landed; it landed in state "Needs 
Review".
This revision was automatically updated to reflect the committed changes.
Closed by commit rL360483: [Darwin] Introduce a new flag, -fapple-link-rtlib 
that forces linking of the… (authored by aemerson, committed by ).
Herald added a project: LLVM.
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Changed prior to commit:
  https://reviews.llvm.org/D58320?vs=189237&id=199106#toc

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Files:
  cfe/trunk/include/clang/Driver/Options.td
  cfe/trunk/lib/Driver/ToolChains/Darwin.cpp
  cfe/trunk/lib/Driver/ToolChains/Darwin.h
  cfe/trunk/test/Driver/darwin-fapple-link-rtlib.c

Index: cfe/trunk/include/clang/Driver/Options.td
===
--- cfe/trunk/include/clang/Driver/Options.td
+++ cfe/trunk/include/clang/Driver/Options.td
@@ -1248,6 +1248,8 @@
 def flat__namespace : Flag<["-"], "flat_namespace">;
 def flax_vector_conversions : Flag<["-"], "flax-vector-conversions">, Group;
 def flimited_precision_EQ : Joined<["-"], "flimited-precision=">, Group;
+def fapple_link_rtlib : Flag<["-"], "fapple-link-rtlib">, Group,
+  HelpText<"Force linking the clang builtins runtime library">;
 def flto_EQ : Joined<["-"], "flto=">, Flags<[CoreOption, CC1Option]>, Group,
   HelpText<"Set LTO mode to either 'full' or 'thin'">, Values<"thin,full">;
 def flto : Flag<["-"], "flto">, Flags<[CoreOption, CC1Option]>, Group,
Index: cfe/trunk/test/Driver/darwin-fapple-link-rtlib.c
===
--- cfe/trunk/test/Driver/darwin-fapple-link-rtlib.c
+++ cfe/trunk/test/Driver/darwin-fapple-link-rtlib.c
@@ -0,0 +1,6 @@
+// RUN: %clang -target arm64-apple-ios12.0 %s -nostdlib -fapple-link-rtlib -resource-dir=%S/Inputs/resource_dir -### 2>&1 | FileCheck %s
+// RUN: %clang -target arm64-apple-ios12.0 %s -static -fapple-link-rtlib -resource-dir=%S/Inputs/resource_dir -### 2>&1 | FileCheck %s
+// RUN: %clang -target arm64-apple-ios12.0 %s -fapple-link-rtlib -resource-dir=%S/Inputs/resource_dir -### 2>&1 | FileCheck %s --check-prefix=DEFAULT
+// CHECK-NOT: "-lSystem"
+// DEFAULT: "-lSystem"
+// CHECK: libclang_rt.ios.a
Index: cfe/trunk/lib/Driver/ToolChains/Darwin.cpp
===
--- cfe/trunk/lib/Driver/ToolChains/Darwin.cpp
+++ cfe/trunk/lib/Driver/ToolChains/Darwin.cpp
@@ -593,15 +593,26 @@
 
   if (getToolChain().ShouldLinkCXXStdlib(Args))
 getToolChain().AddCXXStdlibLibArgs(Args, CmdArgs);
-  if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nodefaultlibs)) {
-// link_ssp spec is empty.
 
-// Let the tool chain choose which runtime library to link.
-getMachOToolChain().AddLinkRuntimeLibArgs(Args, CmdArgs);
+  bool NoStdOrDefaultLibs =
+  Args.hasArg(options::OPT_nostdlib, options::OPT_nodefaultlibs);
+  bool ForceLinkBuiltins = Args.hasArg(options::OPT_fapple_link_rtlib);
+  if (!NoStdOrDefaultLibs || ForceLinkBuiltins) {
+// link_ssp spec is empty.
 
-// No need to do anything for pthreads. Claim argument to avoid warning.
-Args.ClaimAllArgs(options::OPT_pthread);
-Args.ClaimAllArgs(options::OPT_pthreads);
+// If we have both -nostdlib/nodefaultlibs and -fapple-link-rtlib then
+// we just want to link the builtins, not the other libs like libSystem.
+if (NoStdOrDefaultLibs && ForceLinkBuiltins) {
+  getMachOToolChain().AddLinkRuntimeLib(Args, CmdArgs, "builtins");
+} else {
+  // Let the tool chain choose which runtime library to link.
+  getMachOToolChain().AddLinkRuntimeLibArgs(Args, CmdArgs,
+ForceLinkBuiltins);
+
+  // No need to do anything for pthreads. Claim argument to avoid warning.
+  Args.ClaimAllArgs(options::OPT_pthread);
+  Args.ClaimAllArgs(options::OPT_pthreads);
+}
   }
 
   if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nostartfiles)) {
@@ -1128,7 +1139,8 @@
 }
 
 void DarwinClang::AddLinkRuntimeLibArgs(const ArgList &Args,
-ArgStringList &CmdArgs) const {
+ArgStringList &CmdArgs,
+bool ForceLinkBuiltinRT) const {
   // Call once to ensure diagnostic is printed if wrong value was specified
   GetRuntimeLibType(Args);
 
@@ -1136,8 +1148,11 @@
   // libraries with -static.
   if (Args.hasArg(options::OPT_static) ||
   Args.hasArg(options::OPT_fapple_kext) ||
-  Args.hasArg(options::OPT_mkernel))
+  Args.hasArg(options::OPT_mkernel)) {
+if (ForceLinkBuiltinRT)
+  AddLinkRuntimeLib(Args, CmdArgs, "builtins");
 return;
+  }
 
   // Reject -static-libgcc for now, we can deal with this when and if someone
   // cares. This is useful in situations where someone wants to statically link
@@ -2106,7 +2121,8

[PATCH] D59615: [AArch64] When creating SISD intrinsic calls widen scalar args into a zero vectors, not undef

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.
Herald added a subscriber: danielkiss.

Does anyone object to this? I'd like to get it off my review dashboard one way 
or the other.


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[PATCH] D59615: [AArch64] When creating SISD intrinsic calls widen scalar args into a zero vectors, not undef

[Amara Emerson via Phabricator via cfe-commits]

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Seems no one is enthusiastic about this change, so I'm going to drop it.


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[PATCH] D40864: [Darwin] Add a new -mstack-probe option and enable by default

[Amara Emerson via Phabricator via cfe-commits]

aemerson created this revision.

Add a new -mstack-probe and -mno-stack-probe option to enable the generation of 
stack probing functions on non-Windows platforms, if supported. This patch only 
enables this for Darwin.


Repository:
  rC Clang

https://reviews.llvm.org/D40864

Files:
  include/clang/Driver/Options.td
  include/clang/Frontend/CodeGenOptions.def
  lib/CodeGen/BackendUtil.cpp
  lib/Driver/ToolChains/Clang.cpp
  lib/Frontend/CompilerInvocation.cpp
  test/Driver/generic-stack-probe.c
  test/Driver/rewrite-legacy-objc.m
  test/Driver/rewrite-objc.m

Index: test/Driver/rewrite-objc.m
===
--- test/Driver/rewrite-objc.m
+++ test/Driver/rewrite-objc.m
@@ -3,4 +3,4 @@
 // TEST0: clang{{.*}}" "-cc1"
 // TEST0: "-rewrite-objc"
 // FIXME: CHECK-NOT is broken somehow, it doesn't work here. Check adjacency instead.
-// TEST0: "-fmessage-length" "0" "-stack-protector" "1" "-fblocks" "-fencode-extended-block-signature" "-fobjc-runtime=macosx" "-fno-objc-infer-related-result-type" "-fobjc-exceptions" "-fexceptions" "-fmax-type-align=16" "-fdiagnostics-show-option"
+// TEST0: "-fmessage-length" "0" "-stack-protector" "1" "-mstack-probe" "-fblocks" "-fencode-extended-block-signature" "-fobjc-runtime=macosx" "-fno-objc-infer-related-result-type" "-fobjc-exceptions" "-fexceptions" "-fmax-type-align=16" "-fdiagnostics-show-option"
Index: test/Driver/rewrite-legacy-objc.m
===
--- test/Driver/rewrite-legacy-objc.m
+++ test/Driver/rewrite-legacy-objc.m
@@ -3,11 +3,11 @@
 // TEST0: clang{{.*}}" "-cc1"
 // TEST0: "-rewrite-objc"
 // FIXME: CHECK-NOT is broken somehow, it doesn't work here. Check adjacency instead.
-// TEST0: "-fmessage-length" "0" "-stack-protector" "1" "-fblocks" "-fencode-extended-block-signature" "-fobjc-runtime=macosx-fragile" "-fno-objc-infer-related-result-type" "-fobjc-exceptions" "-fexceptions" "-fmax-type-align=16" "-fdiagnostics-show-option"
+// TEST0: "-fmessage-length" "0" "-stack-protector" "1" "-mstack-probe" "-fblocks" "-fencode-extended-block-signature" "-fobjc-runtime=macosx-fragile" "-fno-objc-infer-related-result-type" "-fobjc-exceptions" "-fexceptions" "-fmax-type-align=16" "-fdiagnostics-show-option"
 // TEST0: rewrite-legacy-objc.m"
 // RUN: %clang -no-canonical-prefixes -target i386-apple-macosx10.9.0 -rewrite-legacy-objc %s -o - -### 2>&1 | \
 // RUN:   FileCheck -check-prefix=TEST1 %s
 // RUN: %clang -no-canonical-prefixes -target i386-apple-macosx10.6.0 -rewrite-legacy-objc %s -o - -### 2>&1 | \
 // RUN:   FileCheck -check-prefix=TEST2 %s
-// TEST1: "-fmessage-length" "0" "-stack-protector" "1" "-fblocks" "-fencode-extended-block-signature" "-fobjc-runtime=macosx-fragile" "-fobjc-subscripting-legacy-runtime" "-fno-objc-infer-related-result-type" "-fobjc-exceptions" "-fmax-type-align=16" "-fdiagnostics-show-option"
-// TEST2: "-fmessage-length" "0" "-stack-protector" "1" "-fblocks" "-fencode-extended-block-signature" "-fobjc-runtime=macosx-fragile" "-fno-objc-infer-related-result-type" "-fobjc-exceptions" "-fmax-type-align=16" "-fdiagnostics-show-option"
+// TEST1: "-fmessage-length" "0" "-stack-protector" "1" "-mstack-probe" "-fblocks" "-fencode-extended-block-signature" "-fobjc-runtime=macosx-fragile" "-fobjc-subscripting-legacy-runtime" "-fno-objc-infer-related-result-type" "-fobjc-exceptions" "-fmax-type-align=16" "-fdiagnostics-show-option"
+// TEST2: "-fmessage-length" "0" "-stack-protector" "1" "-mstack-probe" "-fblocks" "-fencode-extended-block-signature" "-fobjc-runtime=macosx-fragile" "-fno-objc-infer-related-result-type" "-fobjc-exceptions" "-fmax-type-align=16" "-fdiagnostics-show-option"
Index: test/Driver/generic-stack-probe.c
===
--- /dev/null
+++ test/Driver/generic-stack-probe.c
@@ -0,0 +1,8 @@
+// RUN: %clang -target x86_64-apple-darwin %s -### 2>&1 | FileCheck %s --check-prefix=CHECK-DEFAULT
+// CHECK-DEFAULT: "-mstack-probe"
+
+// RUN: %clang -target x86_64-apple-darwin %s -mstack-probe -### 2>&1 | FileCheck %s --check-prefix=CHECK-PROBE
+// CHECK-PROBE: "-mstack-probe"
+
+// RUN: %clang -target x86_64-apple-darwin %s -mno-stack-probe -### 2>&1 | FileCheck %s --check-prefix=CHECK-NO-PROBE
+// CHECK-NO-PROBE-NOT: "-mno-stack-probe"
Index: lib/Frontend/CompilerInvocation.cpp
===
--- lib/Frontend/CompilerInvocation.cpp
+++ lib/Frontend/CompilerInvocation.cpp
@@ -869,6 +869,8 @@
 Opts.StackAlignment = StackAlignment;
   }
 
+  Opts.StackProbe = Args.hasArg(OPT_mstack_probe);
+
   if (Arg *A = Args.getLastArg(OPT_mstack_probe_size)) {
 StringRef Val = A->getValue();
 unsigned StackProbeSize = Opts.StackProbeSize;
Index: lib/Driver/ToolChains/Clang.cpp
===
--- lib/Driver/ToolChains/Clang.cpp
+++ lib/Driver/ToolChains/Clang.cpp
@@ -3948,

[PATCH] D40864: [Darwin] Add a new -mstack-probe option and enable by default

[Amara Emerson via Phabricator via cfe-commits]

aemerson added inline comments.



Comment at: lib/CodeGen/BackendUtil.cpp:442
   Options.DebuggerTuning = CodeGenOpts.getDebuggerTuning();
+  Options.EnableStackProbe = CodeGenOpts.StackProbe;
 

ahatanak wrote:
> Is there a reason you can't use function attributes 
> "probe-stack"="___chkstk_darwin" and "stack-probe-size"=4096 instead of 
> setting a TargetOptions flag here? If you intend to use stack probing with 
> LTO, I think you need function attributes. Also, it looks like that would 
> simplify the changes made to X86 backend.
I don't think there's any reason not to. Is it worth specifying the probe size 
itself given that it'll be a known fixed value? It could be misleading to give 
a probe size which only has a single valid value for Darwin.



Comment at: lib/Driver/ToolChains/Clang.cpp:3955
+CmdArgs.push_back("-mstack-probe");
+
   if (Args.hasArg(options::OPT_mstack_probe_size)) {

ahatanak wrote:
> Just to confirm, is stack probing going to be enabled unconditionally on 
> Darwin unless the user disables it with mno-stack-probe?
Yes that's the intention. However on D40863 there's discussion that it might be 
better to restrict to newer Darwin targets.


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[PATCH] D128465: [llvm] add zstd to `llvm::compression` namespace

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

I just reverted this in 6e6be5f9504d 
 because 
it seems to have broken macOS builds:

  llvm/lib/Support/Compression.cpp:24:10: fatal error: 'zstd.h' file not found
  #include 
   ^~~~


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[PATCH] D137269: [Clang][AArch64][Darwin] Enable GlobalISel by default for Darwin ARM64 platforms.

[Amara Emerson via Phabricator via cfe-commits]

aemerson created this revision.
aemerson added reviewers: paquette, Gerolf, ab, t.p.northover, arsenm.
aemerson added a project: LLVM.
Herald added a subscriber: kristof.beyls.
Herald added a project: All.
aemerson requested review of this revision.
Herald added subscribers: MaskRay, wdng.
Herald added a project: clang.

We do this in the front-end instead of the backend so as to not change the 
default behavior for llc.


Repository:
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https://reviews.llvm.org/D137269

Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Driver/ToolChains/Darwin.cpp
  clang/test/Driver/global-isel.c


Index: clang/test/Driver/global-isel.c
===
--- clang/test/Driver/global-isel.c
+++ clang/test/Driver/global-isel.c
@@ -6,6 +6,7 @@
 // RUN: %clang -target aarch64 -fglobal-isel -S %s -### 2>&1 | FileCheck 
--check-prefix=ARM64-DEFAULT %s
 // RUN: %clang -target aarch64 -fglobal-isel -S -O0 %s -### 2>&1 | FileCheck 
--check-prefix=ARM64-O0 %s
 // RUN: %clang -target aarch64 -fglobal-isel -S -O2 %s -### 2>&1 | FileCheck 
--check-prefix=ARM64-O2 %s
+// RUN: %clang -arch arm64 -fglobal-isel -S -O2 %s -### 2>&1 | FileCheck 
--check-prefixes=DARWIN-ARM64-O2,ENABLED %s
 // RUN: %clang -target aarch64 -fglobal-isel -Wno-global-isel -S -O2 %s -### 
2>&1 | FileCheck --check-prefix=ARM64-O2-NOWARN %s
 
 // RUN: %clang -target x86_64 -fglobal-isel -S %s -### 2>&1 | FileCheck 
--check-prefix=X86_64 %s
@@ -27,6 +28,7 @@
 // ARM64-DEFAULT-NOT: warning: -fglobal-isel
 // ARM64-DEFAULT-NOT: "-global-isel-abort=2"
 // ARM64-O0-NOT: warning: -fglobal-isel
+// DARWIN-ARM64-O2-NOT: warning: -fglobal-isel
 // ARM64-O2: warning: -fglobal-isel support is incomplete for this 
architecture at the current optimization level
 // ARM64-O2: "-mllvm" "-global-isel-abort=2"
 // ARM64-O2-NOWARN-NOT: warning: -fglobal-isel
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -381,10 +381,11 @@
   D.Diag(diag::err_drv_bitcode_unsupported_on_toolchain);
   }
 
-  // If GlobalISel is enabled, pass it through to LLVM.
-  if (Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
-   options::OPT_fno_global_isel)) {
-if (A->getOption().matches(options::OPT_fglobal_isel)) {
+  // GlobalISel is enabled by default on AArch64 Darwin.
+  if (getToolChain().getArch() == llvm::Triple::aarch64) {
+Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
+ options::OPT_fno_global_isel);
+if (!A || !A->getOption().matches(options::OPT_fno_global_isel)) {
   CmdArgs.push_back("-mllvm");
   CmdArgs.push_back("-global-isel");
   // Disable abort and fall back to SDAG silently.
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -7203,15 +7203,29 @@
   if (SplitLTOUnit)
 CmdArgs.push_back("-fsplit-lto-unit");
 
-  if (Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
-   options::OPT_fno_global_isel)) {
+  A = Args.getLastArg(options::OPT_fglobal_isel, options::OPT_fno_global_isel);
+  // If a configuration is fully supported, we don't issue any warnings or
+  // remarks.
+  bool IsFullySupported = getToolChain().getTriple().isOSDarwin() &&
+  Triple.getArch() == llvm::Triple::aarch64;
+  if (IsFullySupported) {
+if (A && A->getOption().matches(options::OPT_fno_global_isel)) {
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel=0");
+} else {
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel=1");
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel-abort=0");
+}
+  } else if (A) {
 CmdArgs.push_back("-mllvm");
 if (A->getOption().matches(options::OPT_fglobal_isel)) {
   CmdArgs.push_back("-global-isel=1");
 
   // GISel is on by default on AArch64 -O0, so don't bother adding
   // the fallback remarks for it. Other combinations will add a warning of
-  // some kind.
+  // some kind, unless we're on Darwin.
   bool IsArchSupported = Triple.getArch() == llvm::Triple::aarch64;
   bool IsOptLevelSupported = false;
 


Index: clang/test/Driver/global-isel.c
===
--- clang/test/Driver/global-isel.c
+++ clang/test/Driver/global-isel.c
@@ -6,6 +6,7 @@
 // RUN: %clang -target aarch64 -fglobal-isel -S %s -### 2>&1 | FileCheck --check-prefix=ARM64-DEFAULT %s
 // RUN: %clang -target aarch64 -fglobal-isel -S -O0 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O0 %s
 // RUN: %clang -target aarch64 -fglobal-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O2 %s
+// RUN: %clang -arch arm64 -

[PATCH] D137269: [Clang][AArch64][Darwin] Enable GlobalISel by default for Darwin ARM64 platforms.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added inline comments.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:7218-7219
+  CmdArgs.push_back("-global-isel=1");
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel-abort=0");
+}

arsenm wrote:
> Why abort=0? I can understand abort=1 or 2
Abort=1 would mean the compiler crashes on fallback, and `2` would mean we emit 
diagnostics, neither of which we want for an on-by-default configuration.



Comment at: clang/lib/Driver/ToolChains/Darwin.cpp:388
+ options::OPT_fno_global_isel);
+if (!A || !A->getOption().matches(options::OPT_fno_global_isel)) {
   CmdArgs.push_back("-mllvm");

arsenm wrote:
> Actually I'm confused why we're duplicating this logic in both these places 
This one is for adding linker args which we need for LTO builds.


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[PATCH] D137269: [Clang][AArch64][Darwin] Enable GlobalISel by default for Darwin ARM64 platforms.

[Amara Emerson via Phabricator via cfe-commits]

aemerson updated this revision to Diff 472753.
aemerson added a comment.

Add a clang release note.


Repository:
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Files:
  clang/docs/ReleaseNotes.rst
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Driver/ToolChains/Darwin.cpp
  clang/test/Driver/global-isel.c


Index: clang/test/Driver/global-isel.c
===
--- clang/test/Driver/global-isel.c
+++ clang/test/Driver/global-isel.c
@@ -6,6 +6,7 @@
 // RUN: %clang -target aarch64 -fglobal-isel -S %s -### 2>&1 | FileCheck 
--check-prefix=ARM64-DEFAULT %s
 // RUN: %clang -target aarch64 -fglobal-isel -S -O0 %s -### 2>&1 | FileCheck 
--check-prefix=ARM64-O0 %s
 // RUN: %clang -target aarch64 -fglobal-isel -S -O2 %s -### 2>&1 | FileCheck 
--check-prefix=ARM64-O2 %s
+// RUN: %clang -arch arm64 -fglobal-isel -S -O2 %s -### 2>&1 | FileCheck 
--check-prefixes=DARWIN-ARM64-O2,ENABLED %s
 // RUN: %clang -target aarch64 -fglobal-isel -Wno-global-isel -S -O2 %s -### 
2>&1 | FileCheck --check-prefix=ARM64-O2-NOWARN %s
 
 // RUN: %clang -target x86_64 -fglobal-isel -S %s -### 2>&1 | FileCheck 
--check-prefix=X86_64 %s
@@ -27,6 +28,7 @@
 // ARM64-DEFAULT-NOT: warning: -fglobal-isel
 // ARM64-DEFAULT-NOT: "-global-isel-abort=2"
 // ARM64-O0-NOT: warning: -fglobal-isel
+// DARWIN-ARM64-O2-NOT: warning: -fglobal-isel
 // ARM64-O2: warning: -fglobal-isel support is incomplete for this 
architecture at the current optimization level
 // ARM64-O2: "-mllvm" "-global-isel-abort=2"
 // ARM64-O2-NOWARN-NOT: warning: -fglobal-isel
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -381,10 +381,11 @@
   D.Diag(diag::err_drv_bitcode_unsupported_on_toolchain);
   }
 
-  // If GlobalISel is enabled, pass it through to LLVM.
-  if (Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
-   options::OPT_fno_global_isel)) {
-if (A->getOption().matches(options::OPT_fglobal_isel)) {
+  // GlobalISel is enabled by default on AArch64 Darwin.
+  if (getToolChain().getArch() == llvm::Triple::aarch64) {
+Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
+ options::OPT_fno_global_isel);
+if (!A || !A->getOption().matches(options::OPT_fno_global_isel)) {
   CmdArgs.push_back("-mllvm");
   CmdArgs.push_back("-global-isel");
   // Disable abort and fall back to SDAG silently.
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -7203,15 +7203,29 @@
   if (SplitLTOUnit)
 CmdArgs.push_back("-fsplit-lto-unit");
 
-  if (Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
-   options::OPT_fno_global_isel)) {
+  A = Args.getLastArg(options::OPT_fglobal_isel, options::OPT_fno_global_isel);
+  // If a configuration is fully supported, we don't issue any warnings or
+  // remarks.
+  bool IsFullySupported = getToolChain().getTriple().isOSDarwin() &&
+  Triple.getArch() == llvm::Triple::aarch64;
+  if (IsFullySupported) {
+if (A && A->getOption().matches(options::OPT_fno_global_isel)) {
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel=0");
+} else {
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel=1");
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel-abort=0");
+}
+  } else if (A) {
 CmdArgs.push_back("-mllvm");
 if (A->getOption().matches(options::OPT_fglobal_isel)) {
   CmdArgs.push_back("-global-isel=1");
 
   // GISel is on by default on AArch64 -O0, so don't bother adding
   // the fallback remarks for it. Other combinations will add a warning of
-  // some kind.
+  // some kind, unless we're on Darwin.
   bool IsArchSupported = Triple.getArch() == llvm::Triple::aarch64;
   bool IsOptLevelSupported = false;
 
Index: clang/docs/ReleaseNotes.rst
===
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -714,6 +714,8 @@
   them, which it cannot.
 - Add driver and tuning support for Neoverse V2 via the flag 
``-mcpu=neoverse-v2``.
   Native detection is also supported via ``-mcpu=native``.
+- GlobalISel is now the default instruction selector for Darwin AArch64 
platforms. To disable this and
+  revert to the legacy SelectionDAG code generator, use ``-fno-global-isel``.
 
 Floating Point Support in Clang
 ---


Index: clang/test/Driver/global-isel.c
===
--- clang/test/Driver/global-isel.c
+++ clang/test

[PATCH] D137269: [Clang][AArch64][Darwin] Enable GlobalISel by default for Darwin ARM64 platforms.

[Amara Emerson via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGf64802e8d3e9: [Clang][AArch64][Darwin] Enable GlobalISel by 
default for Darwin ARM64… (authored by aemerson).

Changed prior to commit:
  https://reviews.llvm.org/D137269?vs=472753&id=473807#toc

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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Driver/ToolChains/Darwin.cpp
  clang/test/Driver/global-isel.c


Index: clang/test/Driver/global-isel.c
===
--- clang/test/Driver/global-isel.c
+++ clang/test/Driver/global-isel.c
@@ -6,6 +6,7 @@
 // RUN: %clang -target aarch64 -fglobal-isel -S %s -### 2>&1 | FileCheck 
--check-prefix=ARM64-DEFAULT %s
 // RUN: %clang -target aarch64 -fglobal-isel -S -O0 %s -### 2>&1 | FileCheck 
--check-prefix=ARM64-O0 %s
 // RUN: %clang -target aarch64 -fglobal-isel -S -O2 %s -### 2>&1 | FileCheck 
--check-prefix=ARM64-O2 %s
+// RUN: %clang -arch arm64 -fglobal-isel -S -O2 %s -### 2>&1 | FileCheck 
--check-prefixes=DARWIN-ARM64-O2,ENABLED %s
 // RUN: %clang -target aarch64 -fglobal-isel -Wno-global-isel -S -O2 %s -### 
2>&1 | FileCheck --check-prefix=ARM64-O2-NOWARN %s
 
 // RUN: %clang -target x86_64 -fglobal-isel -S %s -### 2>&1 | FileCheck 
--check-prefix=X86_64 %s
@@ -27,6 +28,7 @@
 // ARM64-DEFAULT-NOT: warning: -fglobal-isel
 // ARM64-DEFAULT-NOT: "-global-isel-abort=2"
 // ARM64-O0-NOT: warning: -fglobal-isel
+// DARWIN-ARM64-O2-NOT: warning: -fglobal-isel
 // ARM64-O2: warning: -fglobal-isel support is incomplete for this 
architecture at the current optimization level
 // ARM64-O2: "-mllvm" "-global-isel-abort=2"
 // ARM64-O2-NOWARN-NOT: warning: -fglobal-isel
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -381,10 +381,11 @@
   D.Diag(diag::err_drv_bitcode_unsupported_on_toolchain);
   }
 
-  // If GlobalISel is enabled, pass it through to LLVM.
-  if (Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
-   options::OPT_fno_global_isel)) {
-if (A->getOption().matches(options::OPT_fglobal_isel)) {
+  // GlobalISel is enabled by default on AArch64 Darwin.
+  if (getToolChain().getArch() == llvm::Triple::aarch64) {
+Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
+ options::OPT_fno_global_isel);
+if (!A || !A->getOption().matches(options::OPT_fno_global_isel)) {
   CmdArgs.push_back("-mllvm");
   CmdArgs.push_back("-global-isel");
   // Disable abort and fall back to SDAG silently.
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -7209,15 +7209,29 @@
   if (SplitLTOUnit)
 CmdArgs.push_back("-fsplit-lto-unit");
 
-  if (Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
-   options::OPT_fno_global_isel)) {
+  A = Args.getLastArg(options::OPT_fglobal_isel, options::OPT_fno_global_isel);
+  // If a configuration is fully supported, we don't issue any warnings or
+  // remarks.
+  bool IsFullySupported = getToolChain().getTriple().isOSDarwin() &&
+  Triple.getArch() == llvm::Triple::aarch64;
+  if (IsFullySupported) {
+if (A && A->getOption().matches(options::OPT_fno_global_isel)) {
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel=0");
+} else {
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel=1");
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel-abort=0");
+}
+  } else if (A) {
 CmdArgs.push_back("-mllvm");
 if (A->getOption().matches(options::OPT_fglobal_isel)) {
   CmdArgs.push_back("-global-isel=1");
 
   // GISel is on by default on AArch64 -O0, so don't bother adding
   // the fallback remarks for it. Other combinations will add a warning of
-  // some kind.
+  // some kind, unless we're on Darwin.
   bool IsArchSupported = Triple.getArch() == llvm::Triple::aarch64;
   bool IsOptLevelSupported = false;
 


Index: clang/test/Driver/global-isel.c
===
--- clang/test/Driver/global-isel.c
+++ clang/test/Driver/global-isel.c
@@ -6,6 +6,7 @@
 // RUN: %clang -target aarch64 -fglobal-isel -S %s -### 2>&1 | FileCheck --check-prefix=ARM64-DEFAULT %s
 // RUN: %clang -target aarch64 -fglobal-isel -S -O0 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O0 %s
 // RUN: %clang -target aarch64 -fglobal-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O2 %s
+// RUN: %clang -arch arm64 -fglobal-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefixes=DARWIN-A

[PATCH] D137269: [Clang][AArch64][Darwin] Enable GlobalISel by default for Darwin ARM64 platforms.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

Sorry, for some reason I hadn’t received any emails about this so I only 
noticed now. I’ll look into the issues and come back once the issues are 
resolved.


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[PATCH] D127762: [Clang][AArch64] Add ACLE attributes for SME.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

Gentle ping on this discussion. @aaron.ballman


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[PATCH] D77103: Add a new -fglobal-isel option and make -fexperimental-isel an alias for it.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

Sorry, forgot to add cfe-commits to the original diff.


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[PATCH] D77103: Add a new -fglobal-isel option and make -fexperimental-isel an alias for it.

[Amara Emerson via Phabricator via cfe-commits]

aemerson created this revision.
aemerson added reviewers: paquette, arsenm, qcolombet, bogner.
aemerson added a project: LLVM.
Herald added subscribers: cfe-commits, danielkiss, kristof.beyls, wdng.
Herald added a project: clang.
aemerson added a comment.

Sorry, forgot to add cfe-commits to the original diff.


Since GlobalISel is maturing and is already on at -O0 for AArch64, it's not 
completely "experimental". Create a more appropriate driver flag and make the 
older option an alias for it.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77103

Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Basic/DiagnosticGroups.td
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/global-isel.c

Index: clang/test/Driver/global-isel.c
===
--- clang/test/Driver/global-isel.c
+++ clang/test/Driver/global-isel.c
@@ -1,24 +1,35 @@
 // REQUIRES: x86-registered-target,aarch64-registered-target
 
+// RUN: %clang -fglobal-isel -S -### %s 2>&1 | FileCheck --check-prefix=ENABLED %s
+// RUN: %clang -fno-global-isel -S -### %s 2>&1 | FileCheck --check-prefix=DISABLED %s
+
+// RUN: %clang -target aarch64 -fglobal-isel -S %s -### 2>&1 | FileCheck --check-prefix=ARM64-DEFAULT %s
+// RUN: %clang -target aarch64 -fglobal-isel -S -O0 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O0 %s
+// RUN: %clang -target aarch64 -fglobal-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O2 %s
+// RUN: %clang -target aarch64 -fglobal-isel -Wno-global-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O2-NOWARN %s
+
+// RUN: %clang -target x86_64 -fglobal-isel -S %s -### 2>&1 | FileCheck --check-prefix=X86_64 %s
+
+// Now test the aliases.
+
 // RUN: %clang -fexperimental-isel -S -### %s 2>&1 | FileCheck --check-prefix=ENABLED %s
 // RUN: %clang -fno-experimental-isel -S -### %s 2>&1 | FileCheck --check-prefix=DISABLED %s
 
 // RUN: %clang -target aarch64 -fexperimental-isel -S %s -### 2>&1 | FileCheck --check-prefix=ARM64-DEFAULT %s
 // RUN: %clang -target aarch64 -fexperimental-isel -S -O0 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O0 %s
 // RUN: %clang -target aarch64 -fexperimental-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O2 %s
-// RUN: %clang -target aarch64 -fexperimental-isel -Wno-experimental-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O2-NOWARN %s
 
 // RUN: %clang -target x86_64 -fexperimental-isel -S %s -### 2>&1 | FileCheck --check-prefix=X86_64 %s
 
 // ENABLED: "-mllvm" "-global-isel=1"
 // DISABLED: "-mllvm" "-global-isel=0"
 
-// ARM64-DEFAULT-NOT: warning: -fexperimental-sel
+// ARM64-DEFAULT-NOT: warning: -fglobal-isel
 // ARM64-DEFAULT-NOT: "-global-isel-abort=2"
-// ARM64-O0-NOT: warning: -fexperimental-sel
-// ARM64-O2: warning: -fexperimental-isel support is incomplete for this architecture at the current optimization level
+// ARM64-O0-NOT: warning: -fglobal-isel
+// ARM64-O2: warning: -fglobal-isel support is incomplete for this architecture at the current optimization level
 // ARM64-O2: "-mllvm" "-global-isel-abort=2"
-// ARM64-O2-NOWARN-NOT: warning: -fexperimental-isel
+// ARM64-O2-NOWARN-NOT: warning: -fglobal-isel
 
-// X86_64: -fexperimental-isel support for the 'x86_64' architecture is incomplete
+// X86_64: -fglobal-isel support for the 'x86_64' architecture is incomplete
 // X86_64: "-mllvm" "-global-isel-abort=2"
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -6062,10 +6062,10 @@
   if (SplitLTOUnit)
 CmdArgs.push_back("-fsplit-lto-unit");
 
-  if (Arg *A = Args.getLastArg(options::OPT_fexperimental_isel,
-   options::OPT_fno_experimental_isel)) {
+  if (Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
+   options::OPT_fno_global_isel)) {
 CmdArgs.push_back("-mllvm");
-if (A->getOption().matches(options::OPT_fexperimental_isel)) {
+if (A->getOption().matches(options::OPT_fglobal_isel)) {
   CmdArgs.push_back("-global-isel=1");
 
   // GISel is on by default on AArch64 -O0, so don't bother adding
@@ -6084,9 +6084,9 @@
 CmdArgs.push_back("-global-isel-abort=2");
 
 if (!IsArchSupported)
-  D.Diag(diag::warn_drv_experimental_isel_incomplete) << Triple.getArchName();
+  D.Diag(diag::warn_drv_global_isel_incomplete) << Triple.getArchName();
 else
-  D.Diag(diag::warn_drv_experimental_isel_incomplete_opt);
+  D.Diag(diag::warn_drv_global_isel_incomplete_opt);
   }
 } else {
   CmdArgs.push_back("-global-isel=0");
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -1

[PATCH] D77103: Add a new -fglobal-isel option and make -fexperimental-isel an alias for it.

[Amara Emerson via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG7f1ea924c695: Add a new -fglobal-isel option and make 
-fexperimental-isel an alias for it. (authored by aemerson).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77103/new/

https://reviews.llvm.org/D77103

Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Basic/DiagnosticGroups.td
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/global-isel.c

Index: clang/test/Driver/global-isel.c
===
--- clang/test/Driver/global-isel.c
+++ clang/test/Driver/global-isel.c
@@ -1,24 +1,35 @@
 // REQUIRES: x86-registered-target,aarch64-registered-target
 
+// RUN: %clang -fglobal-isel -S -### %s 2>&1 | FileCheck --check-prefix=ENABLED %s
+// RUN: %clang -fno-global-isel -S -### %s 2>&1 | FileCheck --check-prefix=DISABLED %s
+
+// RUN: %clang -target aarch64 -fglobal-isel -S %s -### 2>&1 | FileCheck --check-prefix=ARM64-DEFAULT %s
+// RUN: %clang -target aarch64 -fglobal-isel -S -O0 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O0 %s
+// RUN: %clang -target aarch64 -fglobal-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O2 %s
+// RUN: %clang -target aarch64 -fglobal-isel -Wno-global-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O2-NOWARN %s
+
+// RUN: %clang -target x86_64 -fglobal-isel -S %s -### 2>&1 | FileCheck --check-prefix=X86_64 %s
+
+// Now test the aliases.
+
 // RUN: %clang -fexperimental-isel -S -### %s 2>&1 | FileCheck --check-prefix=ENABLED %s
 // RUN: %clang -fno-experimental-isel -S -### %s 2>&1 | FileCheck --check-prefix=DISABLED %s
 
 // RUN: %clang -target aarch64 -fexperimental-isel -S %s -### 2>&1 | FileCheck --check-prefix=ARM64-DEFAULT %s
 // RUN: %clang -target aarch64 -fexperimental-isel -S -O0 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O0 %s
 // RUN: %clang -target aarch64 -fexperimental-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O2 %s
-// RUN: %clang -target aarch64 -fexperimental-isel -Wno-experimental-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O2-NOWARN %s
 
 // RUN: %clang -target x86_64 -fexperimental-isel -S %s -### 2>&1 | FileCheck --check-prefix=X86_64 %s
 
 // ENABLED: "-mllvm" "-global-isel=1"
 // DISABLED: "-mllvm" "-global-isel=0"
 
-// ARM64-DEFAULT-NOT: warning: -fexperimental-sel
+// ARM64-DEFAULT-NOT: warning: -fglobal-isel
 // ARM64-DEFAULT-NOT: "-global-isel-abort=2"
-// ARM64-O0-NOT: warning: -fexperimental-sel
-// ARM64-O2: warning: -fexperimental-isel support is incomplete for this architecture at the current optimization level
+// ARM64-O0-NOT: warning: -fglobal-isel
+// ARM64-O2: warning: -fglobal-isel support is incomplete for this architecture at the current optimization level
 // ARM64-O2: "-mllvm" "-global-isel-abort=2"
-// ARM64-O2-NOWARN-NOT: warning: -fexperimental-isel
+// ARM64-O2-NOWARN-NOT: warning: -fglobal-isel
 
-// X86_64: -fexperimental-isel support for the 'x86_64' architecture is incomplete
+// X86_64: -fglobal-isel support for the 'x86_64' architecture is incomplete
 // X86_64: "-mllvm" "-global-isel-abort=2"
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -6062,10 +6062,10 @@
   if (SplitLTOUnit)
 CmdArgs.push_back("-fsplit-lto-unit");
 
-  if (Arg *A = Args.getLastArg(options::OPT_fexperimental_isel,
-   options::OPT_fno_experimental_isel)) {
+  if (Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
+   options::OPT_fno_global_isel)) {
 CmdArgs.push_back("-mllvm");
-if (A->getOption().matches(options::OPT_fexperimental_isel)) {
+if (A->getOption().matches(options::OPT_fglobal_isel)) {
   CmdArgs.push_back("-global-isel=1");
 
   // GISel is on by default on AArch64 -O0, so don't bother adding
@@ -6084,9 +6084,9 @@
 CmdArgs.push_back("-global-isel-abort=2");
 
 if (!IsArchSupported)
-  D.Diag(diag::warn_drv_experimental_isel_incomplete) << Triple.getArchName();
+  D.Diag(diag::warn_drv_global_isel_incomplete) << Triple.getArchName();
 else
-  D.Diag(diag::warn_drv_experimental_isel_incomplete_opt);
+  D.Diag(diag::warn_drv_global_isel_incomplete_opt);
   }
 } else {
   CmdArgs.push_back("-global-isel=0");
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -1249,8 +1249,10 @@
 def finline_hint_functions: Flag<["-"], "finline-hint-functions">, Group, Flags<[CC1Option]>,
   HelpText<"Inline functions which are (explicitly or implicitly) marked inline">;
 def finline : Flag<["-"], "f

[PATCH] D143624: Inlining: Run the legacy AlwaysInliner before the regular inliner.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

In D143624#4115986 , @aeubanks wrote:

> __clang_hip_math.hip is annoying...
>
> We'll need to remove the `MandatoryFirst` inliner in 
> `ModuleInlinerWrapperPass`, although not sure if @mtrofin has any issues with 
> that or not
>
> This isn't quite what I had initially thought, but this might be better. (I 
> was thinking that we sort the calls in the inliner to visit alwaysinline 
> calls first, but that might cause more compile time issues since we have to 
> update the call graph after visiting all the calls in a function, but we 
> might be visiting every function twice if we first batch process the 
> alwaysinline calls then all other calls)

I think that doesn't actually do the same thing as this, since the `Calls` 
vector is populated by visiting the functions in the current SCC. What we're 
trying to do with this patch is to ensure that all always-inline calls globally 
are processed first.


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[PATCH] D143624: Inlining: Run the legacy AlwaysInliner before the regular inliner.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

In D143624#4116114 , @aeubanks wrote:

> In D143624#4116080 , @aemerson 
> wrote:
>
>> In D143624#4115986 , @aeubanks 
>> wrote:
>>
>>> __clang_hip_math.hip is annoying...
>>>
>>> We'll need to remove the `MandatoryFirst` inliner in 
>>> `ModuleInlinerWrapperPass`, although not sure if @mtrofin has any issues 
>>> with that or not
>>>
>>> This isn't quite what I had initially thought, but this might be better. (I 
>>> was thinking that we sort the calls in the inliner to visit alwaysinline 
>>> calls first, but that might cause more compile time issues since we have to 
>>> update the call graph after visiting all the calls in a function, but we 
>>> might be visiting every function twice if we first batch process the 
>>> alwaysinline calls then all other calls)
>>
>> I think that doesn't actually do the same thing as this, since the `Calls` 
>> vector is populated by visiting the functions in the current SCC. What we're 
>> trying to do with this patch is to ensure that all always-inline calls 
>> globally are processed first.
>
> That's true, but the legacy pass manager where the inliner explosion didn't 
> happen in your case didn't process always-inline calls before other calls. So 
> I don't think it's necessary to process alwaysinline calls globally first to 
> fix your case. However, given that we still do two more rounds of inlining in 
> the inliner pipeline after the alwaysinliner pass you added and your case 
> still doesn't blow up, this solution does seem robust.

Sure, the exponential compile time case is actually just a side benefit here. 
The motivating reason for this change is actually to improve code size when 
building codebases that make heavy use of always_inline.


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[PATCH] D143624: Inlining: Run the legacy AlwaysInliner before the regular inliner.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

In D143624#4116546 , @aeubanks wrote:

> Had a chat offline with @mtrofin, wanted to be clear for future purposes that 
> we do need the separate AlwaysInliner pass because it's used in -O0 and 
> constructing a call graph there is non-trivial in terms of compile time. 
> Originally the mandatory mode of the normal inliner was added to maybe remove 
> the separate AlwaysInliner pass in the future, but that's not going to happen 
> because of what I just said. Given that, we can eventually remove the 
> mandatory mode of the normal inliner after this patch goes through. So this 
> patch should also make `mandatory-inlining-first` false by default, then we 
> remove it in a separate patch.

Ok, sounds good. I'll make the changes.


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[PATCH] D143624: Inlining: Run the legacy AlwaysInliner before the regular inliner.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added inline comments.



Comment at: llvm/lib/Passes/PassBuilderPipelines.cpp:1082
 
+  MPM.addPass(AlwaysInlinerPass(/*InsertLifetimeIntrinsics=*/false));
+

aeubanks wrote:
> aeubanks wrote:
> > I think we want to insert lifetime intrinsics when optimizing
> this will never be called with `Level == OptimizationLevel::O0`, `true` is 
> good enough
Ok.



Comment at: llvm/test/Transforms/Inline/always-inline-newpm.ll:1
+; RUN: opt --Os -pass-remarks=inline -S < %s 2>&1 | FileCheck %s
+target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

aeubanks wrote:
> a better file name is `always-inline-phase-ordering`, legacy PM is deprecated 
> anyway
> 
> was this file exploding before?
Ok I'll rename, this one is demonstrating different/smaller code size with this 
change.


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[PATCH] D143624: Inlining: Run the legacy AlwaysInliner before the regular inliner.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

In D143624#4118257 , @dmgreen wrote:

> Hello - I had to revert this because of some large regressions we got from 
> routines in CMSIS-DSP.
>
> The llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll test shows the 
> problem - that's why that test exists to ensure that any pipeline changes 
> don't negatively affect these routines. Unfortunately you just changed the 
> test as opposed to showing the problems that this causes.  They might be 
> fixable with some other tweaks elsewhere, but the ordering of inlining seems 
> important for getting the correct code that can be vectorized nicely.
>
> There are some other cases around inlining this thing on v6m cores: 
> https://github.com/ARM-software/CMSIS-DSP/blob/809202bf185280a322efc2e2c850a544747f9d79/Include/arm_math_memory.h#L76,
>  but I'm not sure about the details yet. The mult examples were the really 
> large regressions.

It’s not clear from the original commit message why the test is related to 
inlining order? It seems entirely testing vectorization cost model which should 
be insensitive to these kind of changes, right?


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[PATCH] D143624: Inlining: Run the legacy AlwaysInliner before the regular inliner.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

In D143624#4118341 , @dmgreen wrote:

>> It’s not clear from the original commit message why the test is related to 
>> inlining order? It seems entirely testing vectorization cost model which 
>> should be insensitive to these kind of changes, right?
>
> It's a phase ordering test - it's testing the entire pipeline including all 
> the inlining and simplification that needs to happen :)
>
> You can run update_test_checks of the file to see the differences. I believe 
> the inlining causes differences in the code that then cause different vector 
> factors to be chosen. I can try to add a similar test for the other case that 
> got worse, if they are similar.

I’ll take a look, but this indicates to me that there’s something missing from 
the vectoriser or later passes rather than a problem with the inliners 
behaviour.


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[PATCH] D143624: Inlining: Run the legacy AlwaysInliner before the regular inliner.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

I have another attempt at fixing this in D149918 



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[PATCH] D143624: Inlining: Run the legacy AlwaysInliner before the regular inliner.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.
Herald added a subscriber: jplehr.

@dmgreen I've been looking at this test again trying to see what's missing. The 
problem now is that only a VF of 4 is chosen. In the good case, 
instcombine/simplifyCFG runs so that it simplifies down to an `smin` intrinsic. 
After this change `__SSAT()` is inlined first. We then have:

  target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
  target triple = "aarch64-linux-gnu"
  
  define void @arm_mult_q15(ptr %pSrcA, ptr %pSrcB, ptr noalias %pDst, i32 
%blockSize) {
  entry:
br label %while.cond
  
  while.cond:   ; preds = %while.body, 
%entry
%pSrcB.addr.0 = phi ptr [ %pSrcB, %entry ], [ %incdec.ptr1, %while.body ]
%pDst.addr.0 = phi ptr [ %pDst, %entry ], [ %incdec.ptr4, %while.body ]
%pSrcA.addr.0 = phi ptr [ %pSrcA, %entry ], [ %incdec.ptr, %while.body ]
%blkCnt.0 = phi i32 [ %blockSize, %entry ], [ %dec, %while.body ]
%cmp.not = icmp eq i32 %blkCnt.0, 0
br i1 %cmp.not, label %while.end, label %while.body
  
  while.body:   ; preds = %while.cond
%incdec.ptr = getelementptr inbounds i16, ptr %pSrcA.addr.0, i32 1
%0 = load i16, ptr %pSrcA.addr.0, align 2
%conv = sext i16 %0 to i32
%incdec.ptr1 = getelementptr inbounds i16, ptr %pSrcB.addr.0, i32 1
%1 = load i16, ptr %pSrcB.addr.0, align 2
%conv2 = sext i16 %1 to i32
%mul = mul nsw i32 %conv, %conv2
%shr = ashr i32 %mul, 15
%cmp4.i = icmp sgt i32 %shr, 32767
%switch.i = icmp ult i1 %cmp4.i, true
%spec.select.i = select i1 %switch.i, i32 %shr, i32 32767
%conv3 = trunc i32 %spec.select.i to i16
%incdec.ptr4 = getelementptr inbounds i16, ptr %pDst.addr.0, i32 1
store i16 %conv3, ptr %pDst.addr.0, align 2
%dec = add i32 %blkCnt.0, -1
br label %while.cond
  
  while.end:; preds = %while.cond
ret void
  }

These instructions are from the callee that should now be combined into `smin`:

  %cmp4.i = icmp sgt i32 %shr, 32767
  %switch.i = icmp ult i1 %cmp4.i, true
  %spec.select.i = select i1 %switch.i, i32 %shr, i32 32767

... except due to the surrounding instructions, the first icmp is optimized 
into 
`icmp sgt i32 %mul, 1073741823` by 
`InstCombinerImpl::foldICmpInstWithConstant()`

This breaks the smin recognition. I'm not sure what the best approach is to fix 
this. InstCombine already has this chunk of code to try to avoid messing with 
compares that might form min/max patterns but it expects further simplification 
to fire:

  // Test if the ICmpInst instruction is used exclusively by a select as
  // part of a minimum or maximum operation. If so, refrain from doing
  // any other folding. This helps out other analyses which understand
  // non-obfuscated minimum and maximum idioms, such as ScalarEvolution
  // and CodeGen. And in this case, at least one of the comparison
  // operands has at least one user besides the compare (the select),
  // which would often largely negate the benefit of folding anyway.
  //
  // Do the same for the other patterns recognized by matchSelectPattern.
  if (I.hasOneUse())
if (SelectInst *SI = dyn_cast(I.user_back())) {
  Value *A, *B;
  SelectPatternResult SPR = matchSelectPattern(SI, A, B);
  if (SPR.Flavor != SPF_UNKNOWN)
return nullptr;
}

Any ideas? I'd really like to get this inliner change in because it's 
fundamentally a good change to have.


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[PATCH] D143624: Inlining: Run the legacy AlwaysInliner before the regular inliner.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

In D143624#4312905 , @dmgreen wrote:

> Hello. It sounds like it is really close to being OK. The combine of the 
> shift just seem to make things more difficult.
>
> The `icmp ult i1 %cmp4.i, true` is just a not, would it help if it was 
> actually an xor? Or if the `not(icmp sgt)` was changed to a slt earlier?
>
> I was taking a look at the example but I am not super sure what to suggest. 
> Would it be best if the code that detect min/max looked through not's?

I posted an attempt at this: https://reviews.llvm.org/D149725


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[PATCH] D35118: [AArch64] Add support for handling the +sve target feature

[Amara Emerson via Phabricator via cfe-commits]

aemerson created this revision.
aemerson added a project: clang.
Herald added subscribers: kristof.beyls, tschuett, javed.absar.

[AArch64] Add support for handling the +sve target feature.

This also adds the appropriate predefine for SVE if enabled.

Depends on https://reviews.llvm.org/D35076


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Files:
  lib/Basic/Targets.cpp
  test/Preprocessor/aarch64-target-features.c


Index: test/Preprocessor/aarch64-target-features.c
===
--- test/Preprocessor/aarch64-target-features.c
+++ test/Preprocessor/aarch64-target-features.c
@@ -37,6 +37,7 @@
 // CHECK-NOT: __ARM_PCS_VFP 1
 // CHECK-NOT: __ARM_SIZEOF_MINIMAL_ENUM 1
 // CHECK-NOT: __ARM_SIZEOF_WCHAR_T 2
+// CHECK-NOT: __ARM_FEATURE_SVE
 
 // RUN: %clang -target aarch64_be-eabi -x c -E -dM %s -o - | FileCheck %s 
-check-prefix CHECK-BIGENDIAN
 // CHECK-BIGENDIAN: __ARM_BIG_ENDIAN 1
@@ -84,6 +85,10 @@
 // CHECK-GENERIC: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" 
"+neon"
 
 // RUN: %clang -target aarch64 -mtune=cyclone -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-MTUNE-CYCLONE %s
+
+// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve -x c -E -dM 
%s -o - | FileCheck --check-prefix=CHECK-SVE %s
+// CHECK-SVE: __ARM_FEATURE_SVE 1
+
 // == Check whether -mtune accepts mixed-case features.
 // RUN: %clang -target aarch64 -mtune=CYCLONE -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-MTUNE-CYCLONE %s
 // CHECK-MTUNE-CYCLONE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+neon" "-target-feature" "+zcm" "-target-feature" "+zcz"
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -6242,8 +6242,8 @@
   static const char *const GCCRegNames[];
 
   enum FPUModeEnum {
-FPUMode,
-NeonMode
+NeonMode = (1 << 0),
+SveMode = (1 << 1)
   };
 
   unsigned FPU;
@@ -6377,12 +6377,15 @@
 Builder.defineMacro("__ARM_SIZEOF_MINIMAL_ENUM",
 Opts.ShortEnums ? "1" : "4");
 
-if (FPU == NeonMode) {
+if (FPU & NeonMode) {
   Builder.defineMacro("__ARM_NEON", "1");
   // 64-bit NEON supports half, single and double precision operations.
   Builder.defineMacro("__ARM_NEON_FP", "0xE");
 }
 
+if (FPU & SveMode)
+  Builder.defineMacro("__ARM_FEATURE_SVE", "1");
+
 if (CRC)
   Builder.defineMacro("__ARM_FEATURE_CRC32", "1");
 
@@ -6418,21 +6421,24 @@
 return Feature == "aarch64" ||
   Feature == "arm64" ||
   Feature == "arm" ||
-  (Feature == "neon" && FPU == NeonMode);
+  (Feature == "neon" && (FPU & NeonMode)) ||
+  (Feature == "sve" && (FPU & SveMode));
   }
 
   bool handleTargetFeatures(std::vector &Features,
 DiagnosticsEngine &Diags) override {
-FPU = FPUMode;
+FPU = 0;
 CRC = 0;
 Crypto = 0;
 Unaligned = 1;
 HasFullFP16 = 0;
 ArchKind = llvm::AArch64::ArchKind::AK_ARMV8A;
 
 for (const auto &Feature : Features) {
   if (Feature == "+neon")
-FPU = NeonMode;
+FPU |= NeonMode;
+  if (Feature == "+sve")
+FPU |= SveMode;
   if (Feature == "+crc")
 CRC = 1;
   if (Feature == "+crypto")


Index: test/Preprocessor/aarch64-target-features.c
===
--- test/Preprocessor/aarch64-target-features.c
+++ test/Preprocessor/aarch64-target-features.c
@@ -37,6 +37,7 @@
 // CHECK-NOT: __ARM_PCS_VFP 1
 // CHECK-NOT: __ARM_SIZEOF_MINIMAL_ENUM 1
 // CHECK-NOT: __ARM_SIZEOF_WCHAR_T 2
+// CHECK-NOT: __ARM_FEATURE_SVE
 
 // RUN: %clang -target aarch64_be-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-BIGENDIAN
 // CHECK-BIGENDIAN: __ARM_BIG_ENDIAN 1
@@ -84,6 +85,10 @@
 // CHECK-GENERIC: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon"
 
 // RUN: %clang -target aarch64 -mtune=cyclone -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MTUNE-CYCLONE %s
+
+// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE %s
+// CHECK-SVE: __ARM_FEATURE_SVE 1
+
 // == Check whether -mtune accepts mixed-case features.
 // RUN: %clang -target aarch64 -mtune=CYCLONE -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MTUNE-CYCLONE %s
 // CHECK-MTUNE-CYCLONE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+zcm" "-target-feature" "+zcz"
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -6242,8 +6242,8 @@
   static const char *const GCCRegNames[];
 
   enum FPUModeEnum {
-FPUMode,
-NeonMode
+NeonMode = (1 << 0),
+SveMode = (1 << 1)
   };
 
   unsigned FPU;
@@ -6377,12 +6377,15 @@
 Builder.defineMacro("__ARM_SIZEOF_MINIMAL_ENUM",

[PATCH] D35118: [AArch64] Add support for handling the +sve target feature

[Amara Emerson via Phabricator via cfe-commits]

aemerson added inline comments.



Comment at: lib/Basic/Targets.cpp:6245
   enum FPUModeEnum {
-FPUMode,
-NeonMode
+NeonMode = (1 << 0),
+SveMode = (1 << 1)

rengolin wrote:
> Is there any AArch64 arch without SIMD?
> 
> Anyway, that seems deliberate, @t.p.northover any idea?
SIMD support can be disabled with +nosimd. This change doesn't affect how that 
works.


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[PATCH] D35118: [AArch64] Add support for handling the +sve target feature

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

In https://reviews.llvm.org/D35118#806730, @rengolin wrote:

> @jmolloy Can you check this change, please?


I'm not really removing FPUMode, I'm just converting an enum to a bit field. 
FPUMode, i.e. no NEON, after this change is now represented by simply having 
all bits be 0. See the equivalent implementation for ARM which does the same 
thing.


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[PATCH] D35118: [AArch64] Add support for handling the +sve target feature

[Amara Emerson via Phabricator via cfe-commits]

aemerson updated this revision to Diff 106386.
aemerson added a comment.

The reason it's removed is because it's not actually used anywhere, just as a 
default value. I'm not going to debate it further though so I've put it back in.


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Files:
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  test/Preprocessor/aarch64-target-features.c


Index: test/Preprocessor/aarch64-target-features.c
===
--- test/Preprocessor/aarch64-target-features.c
+++ test/Preprocessor/aarch64-target-features.c
@@ -37,6 +37,7 @@
 // CHECK-NOT: __ARM_PCS_VFP 1
 // CHECK-NOT: __ARM_SIZEOF_MINIMAL_ENUM 1
 // CHECK-NOT: __ARM_SIZEOF_WCHAR_T 2
+// CHECK-NOT: __ARM_FEATURE_SVE
 
 // RUN: %clang -target aarch64_be-eabi -x c -E -dM %s -o - | FileCheck %s 
-check-prefix CHECK-BIGENDIAN
 // CHECK-BIGENDIAN: __ARM_BIG_ENDIAN 1
@@ -84,6 +85,10 @@
 // CHECK-GENERIC: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" 
"+neon"
 
 // RUN: %clang -target aarch64 -mtune=cyclone -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-MTUNE-CYCLONE %s
+
+// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve -x c -E -dM 
%s -o - | FileCheck --check-prefix=CHECK-SVE %s
+// CHECK-SVE: __ARM_FEATURE_SVE 1
+
 // == Check whether -mtune accepts mixed-case features.
 // RUN: %clang -target aarch64 -mtune=CYCLONE -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-MTUNE-CYCLONE %s
 // CHECK-MTUNE-CYCLONE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+neon" "-target-feature" "+zcm" "-target-feature" "+zcz"
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -6243,7 +6243,8 @@
 
   enum FPUModeEnum {
 FPUMode,
-NeonMode
+NeonMode = (1 << 0),
+SveMode = (1 << 1)
   };
 
   unsigned FPU;
@@ -6377,12 +6378,15 @@
 Builder.defineMacro("__ARM_SIZEOF_MINIMAL_ENUM",
 Opts.ShortEnums ? "1" : "4");
 
-if (FPU == NeonMode) {
+if (FPU & NeonMode) {
   Builder.defineMacro("__ARM_NEON", "1");
   // 64-bit NEON supports half, single and double precision operations.
   Builder.defineMacro("__ARM_NEON_FP", "0xE");
 }
 
+if (FPU & SveMode)
+  Builder.defineMacro("__ARM_FEATURE_SVE", "1");
+
 if (CRC)
   Builder.defineMacro("__ARM_FEATURE_CRC32", "1");
 
@@ -6418,7 +6422,8 @@
 return Feature == "aarch64" ||
   Feature == "arm64" ||
   Feature == "arm" ||
-  (Feature == "neon" && FPU == NeonMode);
+  (Feature == "neon" && (FPU & NeonMode)) ||
+  (Feature == "sve" && (FPU & SveMode));
   }
 
   bool handleTargetFeatures(std::vector &Features,
@@ -6432,7 +6437,9 @@
 
 for (const auto &Feature : Features) {
   if (Feature == "+neon")
-FPU = NeonMode;
+FPU |= NeonMode;
+  if (Feature == "+sve")
+FPU |= SveMode;
   if (Feature == "+crc")
 CRC = 1;
   if (Feature == "+crypto")


Index: test/Preprocessor/aarch64-target-features.c
===
--- test/Preprocessor/aarch64-target-features.c
+++ test/Preprocessor/aarch64-target-features.c
@@ -37,6 +37,7 @@
 // CHECK-NOT: __ARM_PCS_VFP 1
 // CHECK-NOT: __ARM_SIZEOF_MINIMAL_ENUM 1
 // CHECK-NOT: __ARM_SIZEOF_WCHAR_T 2
+// CHECK-NOT: __ARM_FEATURE_SVE
 
 // RUN: %clang -target aarch64_be-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-BIGENDIAN
 // CHECK-BIGENDIAN: __ARM_BIG_ENDIAN 1
@@ -84,6 +85,10 @@
 // CHECK-GENERIC: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon"
 
 // RUN: %clang -target aarch64 -mtune=cyclone -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MTUNE-CYCLONE %s
+
+// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE %s
+// CHECK-SVE: __ARM_FEATURE_SVE 1
+
 // == Check whether -mtune accepts mixed-case features.
 // RUN: %clang -target aarch64 -mtune=CYCLONE -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MTUNE-CYCLONE %s
 // CHECK-MTUNE-CYCLONE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+zcm" "-target-feature" "+zcz"
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -6243,7 +6243,8 @@
 
   enum FPUModeEnum {
 FPUMode,
-NeonMode
+NeonMode = (1 << 0),
+SveMode = (1 << 1)
   };
 
   unsigned FPU;
@@ -6377,12 +6378,15 @@
 Builder.defineMacro("__ARM_SIZEOF_MINIMAL_ENUM",
 Opts.ShortEnums ? "1" : "4");
 
-if (FPU == NeonMode) {
+if (FPU & NeonMode) {
   Builder.defineMacro("__ARM_NEON", "1");
   // 64-bit NEON supports half, single and double precision operations.
   Builder.defineMacro("__ARM_NEON_FP", "0xE");
 }
 
+if (FPU & SveMode)
+  Builder.defineMacro("__AR

[PATCH] D35118: [AArch64] Add support for handling the +sve target feature

[Amara Emerson via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL307919: [AArch64] Add support for handling the +sve target 
feature. (authored by aemerson).

Changed prior to commit:
  https://reviews.llvm.org/D35118?vs=106386&id=106432#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D35118

Files:
  cfe/trunk/lib/Basic/Targets.cpp
  cfe/trunk/test/Preprocessor/aarch64-target-features.c


Index: cfe/trunk/lib/Basic/Targets.cpp
===
--- cfe/trunk/lib/Basic/Targets.cpp
+++ cfe/trunk/lib/Basic/Targets.cpp
@@ -6251,7 +6251,8 @@
 
   enum FPUModeEnum {
 FPUMode,
-NeonMode
+NeonMode = (1 << 0),
+SveMode = (1 << 1)
   };
 
   unsigned FPU;
@@ -6385,12 +6386,15 @@
 Builder.defineMacro("__ARM_SIZEOF_MINIMAL_ENUM",
 Opts.ShortEnums ? "1" : "4");
 
-if (FPU == NeonMode) {
+if (FPU & NeonMode) {
   Builder.defineMacro("__ARM_NEON", "1");
   // 64-bit NEON supports half, single and double precision operations.
   Builder.defineMacro("__ARM_NEON_FP", "0xE");
 }
 
+if (FPU & SveMode)
+  Builder.defineMacro("__ARM_FEATURE_SVE", "1");
+
 if (CRC)
   Builder.defineMacro("__ARM_FEATURE_CRC32", "1");
 
@@ -6426,7 +6430,8 @@
 return Feature == "aarch64" ||
   Feature == "arm64" ||
   Feature == "arm" ||
-  (Feature == "neon" && FPU == NeonMode);
+  (Feature == "neon" && (FPU & NeonMode)) ||
+  (Feature == "sve" && (FPU & SveMode));
   }
 
   bool handleTargetFeatures(std::vector &Features,
@@ -6440,7 +6445,9 @@
 
 for (const auto &Feature : Features) {
   if (Feature == "+neon")
-FPU = NeonMode;
+FPU |= NeonMode;
+  if (Feature == "+sve")
+FPU |= SveMode;
   if (Feature == "+crc")
 CRC = 1;
   if (Feature == "+crypto")
Index: cfe/trunk/test/Preprocessor/aarch64-target-features.c
===
--- cfe/trunk/test/Preprocessor/aarch64-target-features.c
+++ cfe/trunk/test/Preprocessor/aarch64-target-features.c
@@ -37,6 +37,7 @@
 // CHECK-NOT: __ARM_PCS_VFP 1
 // CHECK-NOT: __ARM_SIZEOF_MINIMAL_ENUM 1
 // CHECK-NOT: __ARM_SIZEOF_WCHAR_T 2
+// CHECK-NOT: __ARM_FEATURE_SVE
 
 // RUN: %clang -target aarch64_be-eabi -x c -E -dM %s -o - | FileCheck %s 
-check-prefix CHECK-BIGENDIAN
 // CHECK-BIGENDIAN: __ARM_BIG_ENDIAN 1
@@ -84,6 +85,10 @@
 // CHECK-GENERIC: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" 
"+neon"
 
 // RUN: %clang -target aarch64 -mtune=cyclone -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-MTUNE-CYCLONE %s
+
+// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve -x c -E -dM 
%s -o - | FileCheck --check-prefix=CHECK-SVE %s
+// CHECK-SVE: __ARM_FEATURE_SVE 1
+
 // == Check whether -mtune accepts mixed-case features.
 // RUN: %clang -target aarch64 -mtune=CYCLONE -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-MTUNE-CYCLONE %s
 // CHECK-MTUNE-CYCLONE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+neon" "-target-feature" "+zcm" "-target-feature" "+zcz"


Index: cfe/trunk/lib/Basic/Targets.cpp
===
--- cfe/trunk/lib/Basic/Targets.cpp
+++ cfe/trunk/lib/Basic/Targets.cpp
@@ -6251,7 +6251,8 @@
 
   enum FPUModeEnum {
 FPUMode,
-NeonMode
+NeonMode = (1 << 0),
+SveMode = (1 << 1)
   };
 
   unsigned FPU;
@@ -6385,12 +6386,15 @@
 Builder.defineMacro("__ARM_SIZEOF_MINIMAL_ENUM",
 Opts.ShortEnums ? "1" : "4");
 
-if (FPU == NeonMode) {
+if (FPU & NeonMode) {
   Builder.defineMacro("__ARM_NEON", "1");
   // 64-bit NEON supports half, single and double precision operations.
   Builder.defineMacro("__ARM_NEON_FP", "0xE");
 }
 
+if (FPU & SveMode)
+  Builder.defineMacro("__ARM_FEATURE_SVE", "1");
+
 if (CRC)
   Builder.defineMacro("__ARM_FEATURE_CRC32", "1");
 
@@ -6426,7 +6430,8 @@
 return Feature == "aarch64" ||
   Feature == "arm64" ||
   Feature == "arm" ||
-  (Feature == "neon" && FPU == NeonMode);
+  (Feature == "neon" && (FPU & NeonMode)) ||
+  (Feature == "sve" && (FPU & SveMode));
   }
 
   bool handleTargetFeatures(std::vector &Features,
@@ -6440,7 +6445,9 @@
 
 for (const auto &Feature : Features) {
   if (Feature == "+neon")
-FPU = NeonMode;
+FPU |= NeonMode;
+  if (Feature == "+sve")
+FPU |= SveMode;
   if (Feature == "+crc")
 CRC = 1;
   if (Feature == "+crypto")
Index: cfe/trunk/test/Preprocessor/aarch64-target-features.c
===
--- cfe/trunk/test/Preprocessor/aarch64-target-features.c
+++ cfe/trunk/test/Preprocessor/aarch64-target-features.c
@@ -37,6 +37,7 @@
 // CHECK-NOT: __ARM_PCS_VFP 1
 // CHECK-NOT: __ARM_SIZEOF_MINIMAL_ENUM 1
 // CHECK-NOT: __ARM_SIZEOF_WCHAR_T 2
+// CHECK-NOT:

[PATCH] D42276: [Driver] Add an -fexperimental-isel driver option to enable/disable GlobalISel

[Amara Emerson via Phabricator via cfe-commits]

aemerson created this revision.
aemerson added reviewers: qcolombet, echristo.
Herald added subscribers: kristof.beyls, rovka.

Add an -fexperimental-isel driver option to enable/disable GlobalISel.

This is a more user friendly way of enabling GlobalISel instead of doing -mllvm 
-global-isel.


Repository:
  rC Clang

https://reviews.llvm.org/D42276

Files:
  include/clang/Driver/Options.td
  lib/Driver/ToolChains/Clang.cpp
  test/Driver/global-isel.c


Index: test/Driver/global-isel.c
===
--- /dev/null
+++ test/Driver/global-isel.c
@@ -0,0 +1,5 @@
+// RUN: %clang -fexperimental-isel -S -### %s 2>&1 | FileCheck 
-check-prefix=ENABLED %s
+// RUN: %clang -fno-experimental-isel -S -### %s 2>&1 | FileCheck 
-check-prefix=DISABLED %s
+
+// ENABLED: "-mllvm" "-global-isel=1"
+// DISABLED: "-mllvm" "-global-isel=0"
Index: lib/Driver/ToolChains/Clang.cpp
===
--- lib/Driver/ToolChains/Clang.cpp
+++ lib/Driver/ToolChains/Clang.cpp
@@ -4690,6 +4690,15 @@
 CmdArgs.push_back("-fwhole-program-vtables");
   }
 
+  if (Arg *A = Args.getLastArg(options::OPT_fexperimental_isel,
+   options::OPT_fno_experimental_isel)) {
+CmdArgs.push_back("-mllvm");
+if (A->getOption().matches(options::OPT_fexperimental_isel))
+  CmdArgs.push_back("-global-isel=1");
+else
+  CmdArgs.push_back("-global-isel=0");
+  }
+
   // Finally add the compile command to the compilation.
   if (Args.hasArg(options::OPT__SLASH_fallback) &&
   Output.getType() == types::TY_Object &&
Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1033,6 +1033,9 @@
 def finline_hint_functions: Flag<["-"], "finline-hint-functions">, 
Group, Flags<[CC1Option]>,
   HelpText<"Inline functions which are (explicitly or implicitly) marked 
inline">;
 def finline : Flag<["-"], "finline">, Group;
+def fexperimental_isel : Flag<["-"], "fexperimental-isel">,
+  Group, Flags<[CC1Option]>,
+  HelpText<"Enables the experimental global instruction selector">;
 def fexperimental_new_pass_manager : Flag<["-"], 
"fexperimental-new-pass-manager">,
   Group, Flags<[CC1Option]>,
   HelpText<"Enables an experimental new pass manager in LLVM.">;
@@ -1244,6 +1247,9 @@
 def fno_gnu_keywords : Flag<["-"], "fno-gnu-keywords">, Group, 
Flags<[CC1Option]>;
 def fno_inline_functions : Flag<["-"], "fno-inline-functions">, 
Group, Flags<[CC1Option]>;
 def fno_inline : Flag<["-"], "fno-inline">, Group, 
Flags<[CC1Option]>;
+def fno_experimental_isel : Flag<["-"], "fno-experimental-isel">,
+  Group, Flags<[CC1Option]>,
+  HelpText<"Disables the experimental global instruction selector">;
 def fno_experimental_new_pass_manager : Flag<["-"], 
"fno-experimental-new-pass-manager">,
   Group, Flags<[CC1Option]>,
   HelpText<"Disables an experimental new pass manager in LLVM.">;


Index: test/Driver/global-isel.c
===
--- /dev/null
+++ test/Driver/global-isel.c
@@ -0,0 +1,5 @@
+// RUN: %clang -fexperimental-isel -S -### %s 2>&1 | FileCheck -check-prefix=ENABLED %s
+// RUN: %clang -fno-experimental-isel -S -### %s 2>&1 | FileCheck -check-prefix=DISABLED %s
+
+// ENABLED: "-mllvm" "-global-isel=1"
+// DISABLED: "-mllvm" "-global-isel=0"
Index: lib/Driver/ToolChains/Clang.cpp
===
--- lib/Driver/ToolChains/Clang.cpp
+++ lib/Driver/ToolChains/Clang.cpp
@@ -4690,6 +4690,15 @@
 CmdArgs.push_back("-fwhole-program-vtables");
   }
 
+  if (Arg *A = Args.getLastArg(options::OPT_fexperimental_isel,
+   options::OPT_fno_experimental_isel)) {
+CmdArgs.push_back("-mllvm");
+if (A->getOption().matches(options::OPT_fexperimental_isel))
+  CmdArgs.push_back("-global-isel=1");
+else
+  CmdArgs.push_back("-global-isel=0");
+  }
+
   // Finally add the compile command to the compilation.
   if (Args.hasArg(options::OPT__SLASH_fallback) &&
   Output.getType() == types::TY_Object &&
Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1033,6 +1033,9 @@
 def finline_hint_functions: Flag<["-"], "finline-hint-functions">, Group, Flags<[CC1Option]>,
   HelpText<"Inline functions which are (explicitly or implicitly) marked inline">;
 def finline : Flag<["-"], "finline">, Group;
+def fexperimental_isel : Flag<["-"], "fexperimental-isel">,
+  Group, Flags<[CC1Option]>,
+  HelpText<"Enables the experimental global instruction selector">;
 def fexperimental_new_pass_manager : Flag<["-"], "fexperimental-new-pass-manager">,
   Group, Flags<[CC1Option]>,
   HelpText<"Enables an experimental new pass manager in LLVM.">;
@@ -12

[PATCH] D42276: [Driver] Add an -fexperimental-isel driver option to enable/disable GlobalISel

[Amara Emerson via Phabricator via cfe-commits]

aemerson updated this revision to Diff 130530.

Repository:
  rC Clang

https://reviews.llvm.org/D42276

Files:
  include/clang/Driver/Options.td
  lib/Driver/ToolChains/Clang.cpp
  test/Driver/global-isel.c


Index: test/Driver/global-isel.c
===
--- /dev/null
+++ test/Driver/global-isel.c
@@ -0,0 +1,5 @@
+// RUN: %clang -fexperimental-isel -S -### %s 2>&1 | FileCheck 
-check-prefix=ENABLED %s
+// RUN: %clang -fno-experimental-isel -S -### %s 2>&1 | FileCheck 
-check-prefix=DISABLED %s
+
+// ENABLED: "-mllvm" "-global-isel=1"
+// DISABLED: "-mllvm" "-global-isel=0"
Index: lib/Driver/ToolChains/Clang.cpp
===
--- lib/Driver/ToolChains/Clang.cpp
+++ lib/Driver/ToolChains/Clang.cpp
@@ -4690,6 +4690,15 @@
 CmdArgs.push_back("-fwhole-program-vtables");
   }
 
+  if (Arg *A = Args.getLastArg(options::OPT_fexperimental_isel,
+   options::OPT_fno_experimental_isel)) {
+CmdArgs.push_back("-mllvm");
+if (A->getOption().matches(options::OPT_fexperimental_isel))
+  CmdArgs.push_back("-global-isel=1");
+else
+  CmdArgs.push_back("-global-isel=0");
+  }
+
   // Finally add the compile command to the compilation.
   if (Args.hasArg(options::OPT__SLASH_fallback) &&
   Output.getType() == types::TY_Object &&
Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1033,6 +1033,8 @@
 def finline_hint_functions: Flag<["-"], "finline-hint-functions">, 
Group, Flags<[CC1Option]>,
   HelpText<"Inline functions which are (explicitly or implicitly) marked 
inline">;
 def finline : Flag<["-"], "finline">, Group;
+def fexperimental_isel : Flag<["-"], "fexperimental-isel">, 
Group,
+  HelpText<"Enables the experimental global instruction selector">;
 def fexperimental_new_pass_manager : Flag<["-"], 
"fexperimental-new-pass-manager">,
   Group, Flags<[CC1Option]>,
   HelpText<"Enables an experimental new pass manager in LLVM.">;
@@ -1244,6 +1246,8 @@
 def fno_gnu_keywords : Flag<["-"], "fno-gnu-keywords">, Group, 
Flags<[CC1Option]>;
 def fno_inline_functions : Flag<["-"], "fno-inline-functions">, 
Group, Flags<[CC1Option]>;
 def fno_inline : Flag<["-"], "fno-inline">, Group, 
Flags<[CC1Option]>;
+def fno_experimental_isel : Flag<["-"], "fno-experimental-isel">, 
Group,
+  HelpText<"Disables the experimental global instruction selector">;
 def fno_experimental_new_pass_manager : Flag<["-"], 
"fno-experimental-new-pass-manager">,
   Group, Flags<[CC1Option]>,
   HelpText<"Disables an experimental new pass manager in LLVM.">;


Index: test/Driver/global-isel.c
===
--- /dev/null
+++ test/Driver/global-isel.c
@@ -0,0 +1,5 @@
+// RUN: %clang -fexperimental-isel -S -### %s 2>&1 | FileCheck -check-prefix=ENABLED %s
+// RUN: %clang -fno-experimental-isel -S -### %s 2>&1 | FileCheck -check-prefix=DISABLED %s
+
+// ENABLED: "-mllvm" "-global-isel=1"
+// DISABLED: "-mllvm" "-global-isel=0"
Index: lib/Driver/ToolChains/Clang.cpp
===
--- lib/Driver/ToolChains/Clang.cpp
+++ lib/Driver/ToolChains/Clang.cpp
@@ -4690,6 +4690,15 @@
 CmdArgs.push_back("-fwhole-program-vtables");
   }
 
+  if (Arg *A = Args.getLastArg(options::OPT_fexperimental_isel,
+   options::OPT_fno_experimental_isel)) {
+CmdArgs.push_back("-mllvm");
+if (A->getOption().matches(options::OPT_fexperimental_isel))
+  CmdArgs.push_back("-global-isel=1");
+else
+  CmdArgs.push_back("-global-isel=0");
+  }
+
   // Finally add the compile command to the compilation.
   if (Args.hasArg(options::OPT__SLASH_fallback) &&
   Output.getType() == types::TY_Object &&
Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1033,6 +1033,8 @@
 def finline_hint_functions: Flag<["-"], "finline-hint-functions">, Group, Flags<[CC1Option]>,
   HelpText<"Inline functions which are (explicitly or implicitly) marked inline">;
 def finline : Flag<["-"], "finline">, Group;
+def fexperimental_isel : Flag<["-"], "fexperimental-isel">, Group,
+  HelpText<"Enables the experimental global instruction selector">;
 def fexperimental_new_pass_manager : Flag<["-"], "fexperimental-new-pass-manager">,
   Group, Flags<[CC1Option]>,
   HelpText<"Enables an experimental new pass manager in LLVM.">;
@@ -1244,6 +1246,8 @@
 def fno_gnu_keywords : Flag<["-"], "fno-gnu-keywords">, Group, Flags<[CC1Option]>;
 def fno_inline_functions : Flag<["-"], "fno-inline-functions">, Group, Flags<[CC1Option]>;
 def fno_inline : Flag<["-"], "fno-inline">, Group, Flags<[CC1Option]>;
+def fno_experimental_isel : Flag<["-"], "fno-experi

[PATCH] D42276: [Driver] Add an -fexperimental-isel driver option to enable/disable GlobalISel

[Amara Emerson via Phabricator via cfe-commits]

aemerson added inline comments.



Comment at: lib/Driver/ToolChains/Clang.cpp:4699
+else
+  CmdArgs.push_back("-global-isel=0");
+  }

qcolombet wrote:
> qcolombet wrote:
> > I think that it would be useful to also set -global-isel-abort=2, so that 
> > users can report problem early.
> > 
> > What do you think?
> > 
> > 
> Should we have some kind of "target validation"?
> What I'd like to avoid is people trying the new allocator on unsupported 
> target (as in the GISel base classes are not present) that would just crash 
> the compiler.
> 
> Alternatively, we could fix the backend to fallback gracefully/abort properly 
> in those situation.
> Right now I believe we would get a segfault on RegisterBankInfo or something 
> along those lines.
> I think that it would be useful to also set -global-isel-abort=2, so that 
> users can report problem early.
> 
> What do you think?

Yes that makes sense, although should we ignore it for ARM64 O0 since we will 
officially support it?

> 
> Should we have some kind of "target validation"?
> What I'd like to avoid is people trying the new allocator on unsupported 
> target (as in the GISel base classes are not present) that would just crash 
> the compiler.

Perhaps a warning like "GlobalISel support is incomplete for [target]"? I don't 
know the GISel status for other targets.




Repository:
  rC Clang

https://reviews.llvm.org/D42276



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[PATCH] D42276: [Driver] Add an -fexperimental-isel driver option to enable/disable GlobalISel

[Amara Emerson via Phabricator via cfe-commits]

aemerson updated this revision to Diff 131191.
aemerson added a comment.

I've added two kinds of warnings, one for targets which have incomplete GISel 
support, and another for unsupported optimisation levels (for ARM64 
-O{1,2,3,s,z}).


Repository:
  rC Clang

https://reviews.llvm.org/D42276

Files:
  include/clang/Basic/DiagnosticDriverKinds.td
  include/clang/Basic/DiagnosticGroups.td
  include/clang/Driver/Options.td
  lib/Driver/ToolChains/Clang.cpp
  test/Driver/global-isel.c

Index: test/Driver/global-isel.c
===
--- /dev/null
+++ test/Driver/global-isel.c
@@ -0,0 +1,24 @@
+// REQUIRES: x86-registered-target,aarch64-registered-target
+
+// RUN: %clang -fexperimental-isel -S -### %s 2>&1 | FileCheck --check-prefix=ENABLED %s
+// RUN: %clang -fno-experimental-isel -S -### %s 2>&1 | FileCheck --check-prefix=DISABLED %s
+
+// RUN: %clang -target aarch64 -fexperimental-isel -S %s -### 2>&1 | FileCheck --check-prefix=ARM64-DEFAULT %s
+// RUN: %clang -target aarch64 -fexperimental-isel -S -O0 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O0 %s
+// RUN: %clang -target aarch64 -fexperimental-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O2 %s
+// RUN: %clang -target aarch64 -fexperimental-isel -Wno-experimental-isel -S -O2 %s -### 2>&1 | FileCheck --check-prefix=ARM64-O2-NOWARN %s
+
+// RUN: %clang -target x86_64 -fexperimental-isel -S %s -### 2>&1 | FileCheck --check-prefix=X86_64 %s
+
+// ENABLED: "-mllvm" "-global-isel=1"
+// DISABLED: "-mllvm" "-global-isel=0"
+
+// ARM64-DEFAULT-NOT: warning: -fexperimental-sel
+// ARM64-DEFAULT-NOT: "-global-isel-abort=2"
+// ARM64-O0-NOT: warning: -fexperimental-sel
+// ARM64-O2: warning: -fexperimental-isel support is incomplete for this architecture at the current optimization level
+// ARM64-O2: "-mllvm" "-global-isel-abort=2"
+// ARM64-O2-NOWARN-NOT: warning: -fexperimental-isel
+
+// X86_64: -fexperimental-isel support for the 'x86_64' architecture is incomplete
+// X86_64: "-mllvm" "-global-isel-abort=2"
Index: lib/Driver/ToolChains/Clang.cpp
===
--- lib/Driver/ToolChains/Clang.cpp
+++ lib/Driver/ToolChains/Clang.cpp
@@ -4690,6 +4690,37 @@
 CmdArgs.push_back("-fwhole-program-vtables");
   }
 
+  if (Arg *A = Args.getLastArg(options::OPT_fexperimental_isel,
+   options::OPT_fno_experimental_isel)) {
+CmdArgs.push_back("-mllvm");
+if (A->getOption().matches(options::OPT_fexperimental_isel)) {
+  CmdArgs.push_back("-global-isel=1");
+
+  // GISel is on by default on AArch64 -O0, so don't bother adding
+  // the fallback remarks for it. Other combinations will add a warning of
+  // some kind.
+  bool IsArchSupported = Triple.getArch() == llvm::Triple::aarch64;
+  bool IsOptLevelSupported = false;
+
+  Arg *A = Args.getLastArg(options::OPT_O_Group);
+  if (Triple.getArch() == llvm::Triple::aarch64) {
+if (!A || A->getOption().matches(options::OPT_O0))
+  IsOptLevelSupported = true;
+  }
+  if (!IsArchSupported || !IsOptLevelSupported) {
+CmdArgs.push_back("-mllvm");
+CmdArgs.push_back("-global-isel-abort=2");
+
+if (!IsArchSupported)
+  D.Diag(diag::warn_drv_experimental_isel_incomplete) << Triple.getArchName();
+else
+  D.Diag(diag::warn_drv_experimental_isel_incomplete_opt);
+  }
+} else {
+  CmdArgs.push_back("-global-isel=0");
+}
+  }
+
   // Finally add the compile command to the compilation.
   if (Args.hasArg(options::OPT__SLASH_fallback) &&
   Output.getType() == types::TY_Object &&
Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1033,6 +1033,8 @@
 def finline_hint_functions: Flag<["-"], "finline-hint-functions">, Group, Flags<[CC1Option]>,
   HelpText<"Inline functions which are (explicitly or implicitly) marked inline">;
 def finline : Flag<["-"], "finline">, Group;
+def fexperimental_isel : Flag<["-"], "fexperimental-isel">, Group,
+  HelpText<"Enables the experimental global instruction selector">;
 def fexperimental_new_pass_manager : Flag<["-"], "fexperimental-new-pass-manager">,
   Group, Flags<[CC1Option]>,
   HelpText<"Enables an experimental new pass manager in LLVM.">;
@@ -1244,6 +1246,8 @@
 def fno_gnu_keywords : Flag<["-"], "fno-gnu-keywords">, Group, Flags<[CC1Option]>;
 def fno_inline_functions : Flag<["-"], "fno-inline-functions">, Group, Flags<[CC1Option]>;
 def fno_inline : Flag<["-"], "fno-inline">, Group, Flags<[CC1Option]>;
+def fno_experimental_isel : Flag<["-"], "fno-experimental-isel">, Group,
+  HelpText<"Disables the experimental global instruction selector">;
 def fno_experimental_new_pass_manager : Flag<["-"], "fno-experimental-new-pass-manager">,
   Group, Flags<[CC1Option]>,
   HelpText<"Disables 

[PATCH] D42276: [Driver] Add an -fexperimental-isel driver option to enable/disable GlobalISel

[Amara Emerson via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rC323485: [Driver] Add an -fexperimental-isel driver option to 
enable/disable GlobalISel. (authored by aemerson, committed by ).

Repository:
  rC Clang

https://reviews.llvm.org/D42276

Files:
  include/clang/Basic/DiagnosticDriverKinds.td
  include/clang/Basic/DiagnosticGroups.td
  include/clang/Driver/Options.td
  lib/Driver/ToolChains/Clang.cpp
  test/Driver/global-isel.c

Index: lib/Driver/ToolChains/Clang.cpp
===
--- lib/Driver/ToolChains/Clang.cpp
+++ lib/Driver/ToolChains/Clang.cpp
@@ -4694,6 +4694,37 @@
 CmdArgs.push_back("-fwhole-program-vtables");
   }
 
+  if (Arg *A = Args.getLastArg(options::OPT_fexperimental_isel,
+   options::OPT_fno_experimental_isel)) {
+CmdArgs.push_back("-mllvm");
+if (A->getOption().matches(options::OPT_fexperimental_isel)) {
+  CmdArgs.push_back("-global-isel=1");
+
+  // GISel is on by default on AArch64 -O0, so don't bother adding
+  // the fallback remarks for it. Other combinations will add a warning of
+  // some kind.
+  bool IsArchSupported = Triple.getArch() == llvm::Triple::aarch64;
+  bool IsOptLevelSupported = false;
+
+  Arg *A = Args.getLastArg(options::OPT_O_Group);
+  if (Triple.getArch() == llvm::Triple::aarch64) {
+if (!A || A->getOption().matches(options::OPT_O0))
+  IsOptLevelSupported = true;
+  }
+  if (!IsArchSupported || !IsOptLevelSupported) {
+CmdArgs.push_back("-mllvm");
+CmdArgs.push_back("-global-isel-abort=2");
+
+if (!IsArchSupported)
+  D.Diag(diag::warn_drv_experimental_isel_incomplete) << Triple.getArchName();
+else
+  D.Diag(diag::warn_drv_experimental_isel_incomplete_opt);
+  }
+} else {
+  CmdArgs.push_back("-global-isel=0");
+}
+  }
+
   // Finally add the compile command to the compilation.
   if (Args.hasArg(options::OPT__SLASH_fallback) &&
   Output.getType() == types::TY_Object &&
Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1033,6 +1033,8 @@
 def finline_hint_functions: Flag<["-"], "finline-hint-functions">, Group, Flags<[CC1Option]>,
   HelpText<"Inline functions which are (explicitly or implicitly) marked inline">;
 def finline : Flag<["-"], "finline">, Group;
+def fexperimental_isel : Flag<["-"], "fexperimental-isel">, Group,
+  HelpText<"Enables the experimental global instruction selector">;
 def fexperimental_new_pass_manager : Flag<["-"], "fexperimental-new-pass-manager">,
   Group, Flags<[CC1Option]>,
   HelpText<"Enables an experimental new pass manager in LLVM.">;
@@ -1244,6 +1246,8 @@
 def fno_gnu_keywords : Flag<["-"], "fno-gnu-keywords">, Group, Flags<[CC1Option]>;
 def fno_inline_functions : Flag<["-"], "fno-inline-functions">, Group, Flags<[CC1Option]>;
 def fno_inline : Flag<["-"], "fno-inline">, Group, Flags<[CC1Option]>;
+def fno_experimental_isel : Flag<["-"], "fno-experimental-isel">, Group,
+  HelpText<"Disables the experimental global instruction selector">;
 def fno_experimental_new_pass_manager : Flag<["-"], "fno-experimental-new-pass-manager">,
   Group, Flags<[CC1Option]>,
   HelpText<"Disables an experimental new pass manager in LLVM.">;
Index: include/clang/Basic/DiagnosticDriverKinds.td
===
--- include/clang/Basic/DiagnosticDriverKinds.td
+++ include/clang/Basic/DiagnosticDriverKinds.td
@@ -361,4 +361,12 @@
 def note_drv_verify_prefix_spelling : Note<
   "-verify prefixes must start with a letter and contain only alphanumeric"
   " characters, hyphens, and underscores">;
+
+def warn_drv_experimental_isel_incomplete : Warning<
+  "-fexperimental-isel support for the '%0' architecture is incomplete">,
+  InGroup;
+
+def warn_drv_experimental_isel_incomplete_opt : Warning<
+  "-fexperimental-isel support is incomplete for this architecture at the current optimization level">,
+  InGroup;
 }
Index: include/clang/Basic/DiagnosticGroups.td
===
--- include/clang/Basic/DiagnosticGroups.td
+++ include/clang/Basic/DiagnosticGroups.td
@@ -985,3 +985,6 @@
 // A warning group for warnings about code that clang accepts when
 // compiling OpenCL C/C++ but which is not compatible with the SPIR spec.
 def SpirCompat : DiagGroup<"spir-compat">;
+
+// Warning for the experimental-isel options.
+def ExperimentalISel : DiagGroup<"experimental-isel">;
Index: test/Driver/global-isel.c
===
--- test/Driver/global-isel.c
+++ test/Driver/global-isel.c
@@ -0,0 +1,24 @@
+// REQUIRES: x86-registered-target,aarch64-registered-target
+
+// RUN: %clang -fexperimental-isel -S -### %s 2>&1 | Fil

[PATCH] D42860: [ReleaseNotes] Add note for the new -fexperimental-isel flag.

[Amara Emerson via Phabricator via cfe-commits]

aemerson created this revision.
aemerson added reviewers: hans, qcolombet.

Add note for the new -fexperimental-isel flag.


Repository:
  rC Clang

https://reviews.llvm.org/D42860

Files:
  docs/ReleaseNotes.rst


Index: docs/ReleaseNotes.rst
===
--- docs/ReleaseNotes.rst
+++ docs/ReleaseNotes.rst
@@ -132,6 +132,11 @@
   difference between the ``-std=c17`` and ``-std=c11`` language modes is the
   value of the ``__STDC_VERSION__`` macro, as C17 is a bug fix release.
 
+- Added the ``-fexperimental-isel`` and ``-fno-experimental-isel`` flags to
+  enable/disable the new GlobalISel instruction selection framework. This
+  feature is enabled by default for AArch64 at the ``-O0`` optimization level.
+  Support for other targets or optimization levels is currently incomplete.
+
 Deprecated Compiler Flags
 -
 


Index: docs/ReleaseNotes.rst
===
--- docs/ReleaseNotes.rst
+++ docs/ReleaseNotes.rst
@@ -132,6 +132,11 @@
   difference between the ``-std=c17`` and ``-std=c11`` language modes is the
   value of the ``__STDC_VERSION__`` macro, as C17 is a bug fix release.
 
+- Added the ``-fexperimental-isel`` and ``-fno-experimental-isel`` flags to
+  enable/disable the new GlobalISel instruction selection framework. This
+  feature is enabled by default for AArch64 at the ``-O0`` optimization level.
+  Support for other targets or optimization levels is currently incomplete.
+
 Deprecated Compiler Flags
 -
 
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[PATCH] D42860: [ReleaseNotes] Add note for the new -fexperimental-isel flag.

[Amara Emerson via Phabricator via cfe-commits]

aemerson added a comment.

@Hans if you're happy with this could you commit to the branch?


Repository:
  rC Clang

https://reviews.llvm.org/D42860



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[PATCH] D99126: [darwin][driver] Pass through -global-isel LLVM flags to ld.

[Amara Emerson via Phabricator via cfe-commits]

aemerson created this revision.
aemerson added reviewers: paquette, ahmed, qcolombet, pete.
aemerson added a project: clang.
Herald added subscribers: steven_wu, hiraditya.
aemerson requested review of this revision.

GlobalISel is currently not enabled when using -flto since the front-end -mvllm 
flags don't get passed through. This change fixes this for Darwin platforms. We 
have to do this in the driver because the code generator choice isn't embedded 
into the bitcode file.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D99126

Files:
  clang/lib/Driver/ToolChains/Darwin.cpp
  clang/test/Driver/darwin-ld-lto.c


Index: clang/test/Driver/darwin-ld-lto.c
===
--- clang/test/Driver/darwin-ld-lto.c
+++ clang/test/Driver/darwin-ld-lto.c
@@ -30,3 +30,11 @@
 // THIN_LTO_OBJECT_PATH: {{ld(.exe)?"}}
 // THIN_LTO_OBJECT_PATH-SAME: "-object_path_lto"
 // THIN_LTO_OBJECT_PATH-SAME: {{thinlto\-[a-zA-Z0-9_]+}}
+
+
+// Check that we pass through -fglobal-isel flags to libLTO.
+// RUN: %clang -target arm64-apple-darwin %s -flto -fglobal-isel -### 2>&1 | \
+// RUN:   FileCheck --check-prefix=GISEL %s
+// GISEL: {{ld(.exe)?"}}
+// GISEL: "-mllvm" "-global-isel"
+// GISEL: "-mllvm" "-global-isel-abort=0"
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -373,6 +373,18 @@
   D.Diag(diag::err_drv_bitcode_unsupported_on_toolchain);
   }
 
+  // If GlobalISel is enabled, pass it through to LLVM.
+  if (Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
+   options::OPT_fno_global_isel)) {
+if (A->getOption().matches(options::OPT_fglobal_isel)) {
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel");
+  // Disable abort and fall back to SDAG silently.
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel-abort=0");
+}
+  }
+
   Args.AddLastArg(CmdArgs, options::OPT_prebind);
   Args.AddLastArg(CmdArgs, options::OPT_noprebind);
   Args.AddLastArg(CmdArgs, options::OPT_nofixprebinding);


Index: clang/test/Driver/darwin-ld-lto.c
===
--- clang/test/Driver/darwin-ld-lto.c
+++ clang/test/Driver/darwin-ld-lto.c
@@ -30,3 +30,11 @@
 // THIN_LTO_OBJECT_PATH: {{ld(.exe)?"}}
 // THIN_LTO_OBJECT_PATH-SAME: "-object_path_lto"
 // THIN_LTO_OBJECT_PATH-SAME: {{thinlto\-[a-zA-Z0-9_]+}}
+
+
+// Check that we pass through -fglobal-isel flags to libLTO.
+// RUN: %clang -target arm64-apple-darwin %s -flto -fglobal-isel -### 2>&1 | \
+// RUN:   FileCheck --check-prefix=GISEL %s
+// GISEL: {{ld(.exe)?"}}
+// GISEL: "-mllvm" "-global-isel"
+// GISEL: "-mllvm" "-global-isel-abort=0"
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -373,6 +373,18 @@
   D.Diag(diag::err_drv_bitcode_unsupported_on_toolchain);
   }
 
+  // If GlobalISel is enabled, pass it through to LLVM.
+  if (Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
+   options::OPT_fno_global_isel)) {
+if (A->getOption().matches(options::OPT_fglobal_isel)) {
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel");
+  // Disable abort and fall back to SDAG silently.
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel-abort=0");
+}
+  }
+
   Args.AddLastArg(CmdArgs, options::OPT_prebind);
   Args.AddLastArg(CmdArgs, options::OPT_noprebind);
   Args.AddLastArg(CmdArgs, options::OPT_nofixprebinding);
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[PATCH] D99126: [darwin][driver] Pass through -global-isel LLVM flags to ld.

[Amara Emerson via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG66af90b46e1f: [darwin][driver] Pass through -global-isel 
LLVM flags to ld. (authored by aemerson).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99126/new/

https://reviews.llvm.org/D99126

Files:
  clang/lib/Driver/ToolChains/Darwin.cpp
  clang/test/Driver/darwin-ld-lto.c


Index: clang/test/Driver/darwin-ld-lto.c
===
--- clang/test/Driver/darwin-ld-lto.c
+++ clang/test/Driver/darwin-ld-lto.c
@@ -30,3 +30,11 @@
 // THIN_LTO_OBJECT_PATH: {{ld(.exe)?"}}
 // THIN_LTO_OBJECT_PATH-SAME: "-object_path_lto"
 // THIN_LTO_OBJECT_PATH-SAME: {{thinlto\-[a-zA-Z0-9_]+}}
+
+
+// Check that we pass through -fglobal-isel flags to libLTO.
+// RUN: %clang -target arm64-apple-darwin %s -flto -fglobal-isel -### 2>&1 | \
+// RUN:   FileCheck --check-prefix=GISEL %s
+// GISEL: {{ld(.exe)?"}}
+// GISEL: "-mllvm" "-global-isel"
+// GISEL: "-mllvm" "-global-isel-abort=0"
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -373,6 +373,18 @@
   D.Diag(diag::err_drv_bitcode_unsupported_on_toolchain);
   }
 
+  // If GlobalISel is enabled, pass it through to LLVM.
+  if (Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
+   options::OPT_fno_global_isel)) {
+if (A->getOption().matches(options::OPT_fglobal_isel)) {
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel");
+  // Disable abort and fall back to SDAG silently.
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel-abort=0");
+}
+  }
+
   Args.AddLastArg(CmdArgs, options::OPT_prebind);
   Args.AddLastArg(CmdArgs, options::OPT_noprebind);
   Args.AddLastArg(CmdArgs, options::OPT_nofixprebinding);


Index: clang/test/Driver/darwin-ld-lto.c
===
--- clang/test/Driver/darwin-ld-lto.c
+++ clang/test/Driver/darwin-ld-lto.c
@@ -30,3 +30,11 @@
 // THIN_LTO_OBJECT_PATH: {{ld(.exe)?"}}
 // THIN_LTO_OBJECT_PATH-SAME: "-object_path_lto"
 // THIN_LTO_OBJECT_PATH-SAME: {{thinlto\-[a-zA-Z0-9_]+}}
+
+
+// Check that we pass through -fglobal-isel flags to libLTO.
+// RUN: %clang -target arm64-apple-darwin %s -flto -fglobal-isel -### 2>&1 | \
+// RUN:   FileCheck --check-prefix=GISEL %s
+// GISEL: {{ld(.exe)?"}}
+// GISEL: "-mllvm" "-global-isel"
+// GISEL: "-mllvm" "-global-isel-abort=0"
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -373,6 +373,18 @@
   D.Diag(diag::err_drv_bitcode_unsupported_on_toolchain);
   }
 
+  // If GlobalISel is enabled, pass it through to LLVM.
+  if (Arg *A = Args.getLastArg(options::OPT_fglobal_isel,
+   options::OPT_fno_global_isel)) {
+if (A->getOption().matches(options::OPT_fglobal_isel)) {
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel");
+  // Disable abort and fall back to SDAG silently.
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("-global-isel-abort=0");
+}
+  }
+
   Args.AddLastArg(CmdArgs, options::OPT_prebind);
   Args.AddLastArg(CmdArgs, options::OPT_noprebind);
   Args.AddLastArg(CmdArgs, options::OPT_nofixprebinding);
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