Hi
> -Original Message-
> From: Ferruh Yigit
> Sent: Monday, May 22, 2023 1:28 PM
>
> On 5/18/2023 10:48 PM, Alexander Kozyrev wrote:
> > Introduce the new rte_flow_update() API allowing users
> > to update the action list in the already existing rule.
>
> If the API is only to update
Minutes of Technical Board Meeting, 2023-April-19
Members Attending
-
-Aaron
-Bruce
-Hemant
-Honnappa
-Jerin
-Kevin
-Konstantin
-Maxime (Chair)
-Stephen
-Thomas
NOTE: The technical board meetings every second Wednesday at
https://meet.jit.si/DPDK at 3 pm UTC.
Meetings are publ
Originally, when vf received PF-to-VF reset event, the iavf PMD did not
perform special actions, resulting in vf being offline and unavailable.
This commit handle the PF-to-VF reset event by performing all necessary
actions to bring the vf back online and available.
Signed-off-by: Shiyang He
---
Hi Jeremy, first, a few general points:
1. Send patches to maintainers (Thomas, me, Honnappa, Lijuan and
anyone else involved with DTS or who might be interested) and add the
devlist to cc.
2. Run the linter script before submitting.
3. The use of the various nested objects breaks the current
abst
> On Mon, 22 May 2023 15:04:52 -0400
> Kamil Godzwon wrote:
>
> > /home/vagrant/dpdk/build/include/rte_crypto_sym.h:1009:4: \
> > warning: Value stored to 'left' is never read [deadcode.DeadStores]
> > left = 0;
> > ^ ~
> > 1 warning gene
> -Original Message-
> From: Jerin Jacob
> Sent: Monday, May 22, 2023 4:26 PM
> To: Yan, Zhirun
> Cc: dev@dpdk.org; jer...@marvell.com; kirankum...@marvell.com;
> ndabilpu...@marvell.com; step...@networkplumber.org;
> pbhagavat...@marvell.com; Liang, Cunming ; Wang,
> Haiyue
> Subject:
On Tue, May 23, 2023 at 10:05 AM Juraj Linkeš
wrote:
>
> Hi Jeremy, first, a few general points:
>
One more general point - don't forget to add licenses to all new files
and possibly update licenses in other affected files.
Juraj
Adding fix to address the memory corruption issue for
qat_dev_cmd_param structure on QAT GEN3.
This fix aligns the storage where it stores the value
on 4 byte unsigned integer data type after
reading slice configuration of QAT capabilities.
Fixes: b3cbbcdffa4f ("common/qat: read HW slice configur
Add ROC APIs which allows to create NPA auras independently and
attach it to an existing NPA pool. Also add API to destroy
NPA auras independently.
Signed-off-by: Ashwin Sekhar T K
---
drivers/common/cnxk/roc_npa.c | 219
drivers/common/cnxk/roc_npa.h | 4 +
Use lower bits of pool_config to pass flags specific to
cnxk mempool PMD ops.
Signed-off-by: Ashwin Sekhar T K
---
drivers/mempool/cnxk/cnxk_mempool.h | 24
drivers/mempool/cnxk/cnxk_mempool_ops.c | 17 ++---
drivers/net/cnxk/cnxk_ethdev_sec.c | 25 +
All the insecure algorithms are default disable from
cryptodev Gen 1,2,3 and 4.
use qat_legacy_capa to enable all the legacy
algorithms.
These change effects both sym and asym insecure crypto
algorithms.
Signed-off-by: Vikash Poddar
---
v2:
Extend the support to enable the insecure algorithm in
Q
Add ROC APIs which allows to create NPA auras independently and
attach it to an existing NPA pool. Also add API to destroy
NPA auras independently.
Signed-off-by: Ashwin Sekhar T K
---
drivers/common/cnxk/roc_npa.c | 219
drivers/common/cnxk/roc_npa.h | 4 +
25/04/2023 15:13, David Marchand:
> Hello Aaron,
>
> On Fri, Apr 21, 2023 at 11:06 PM Aaron Conole wrote:
> > David Marchand writes:
> > > Fedora 35 has been declared EOL in 2022/12 (see [1]).
> > > Fedora 36 will soon be EOL too.
> > >
> > > Move to Fedora 37.
> > > Fedora 37 libbpf does not su
On 5/23/2023 4:45 AM, Ruifeng Wang wrote:
-Original Message-
From: Burakov, Anatoly
Sent: Monday, May 22, 2023 6:19 PM
To: Ruifeng Wang ; olivier.m...@6wind.com
Cc: dev@dpdk.org; sta...@dpdk.org; tho...@monjalon.net;
step...@networkplumber.org; Justin
He ; Honnappa Nagarahalli ; nd
Sub
05/05/2023 08:48, Yunjian Wang:
> After the memzone is freed, it is not removed from the 'rte_ring_tailq'.
> If rte_ring_lookup is called at this time, it will cause a use-after-free
> problem. This change prevents that from happening.
>
> Fixes: 4e32101f9b01 ("ring: support freeing")
> Cc: sta...
On 5/22/2023 4:45 PM, Rushil Gupta wrote:
> 1. This is the excerpt from the google's virtual nic spec:
> "In addition to the device-owned register file, vector table, and
> doorbells, the gVNIC device uses *DMA* (which in most cases amounts to
> ordinary memory access by host software since we're
On 5/19/2023 9:46 PM, Rushil Gupta wrote:
> diff --git a/drivers/net/gve/base/gve_osdep.h
> b/drivers/net/gve/base/gve_osdep.h
> index abf3d379ae..5e8ae1eac6 100644
> --- a/drivers/net/gve/base/gve_osdep.h
> +++ b/drivers/net/gve/base/gve_osdep.h
> @@ -21,9 +21,14 @@
> #include
> #include
> #
On 5/23/2023 2:45 AM, Deng, KaiwenX wrote:
>
>
>> -Original Message-
>> From: Deng, KaiwenX
>> Sent: Friday, May 5, 2023 10:31 AM
>> To: Ferruh Yigit ; dev@dpdk.org
>> Cc: sta...@dpdk.org; Yang, Qiming ; Zhou, YidingX
>> ; Chas Williams ; Min Hu (Connor)
>> ; Wu, Jingjing ; Xing, Beilei
>
22/05/2023 11:27, Burakov, Anatoly:
> On 5/20/2023 7:07 PM, Philip Prindeville wrote:
> > From: Philip Prindeville
> >
> > pread64() and pwrite64() are declared in in MUSL and
> > other (i.e. not glibc) C runtimes.
> >
> > Signed-off-by: Philip Prindeville
> Acked-by: Anatoly Burakov
It was
On 5/23/2023 7:59 AM, Ori Kam wrote:
> Hi
>
>> -Original Message-
>> From: Ferruh Yigit
>> Sent: Monday, May 22, 2023 1:28 PM
>>
>> On 5/18/2023 10:48 PM, Alexander Kozyrev wrote:
>>> Introduce the new rte_flow_update() API allowing users
>>> to update the action list in the already exis
Hi Michael,
> -Original Message-
> From: Michael Baum
> Sent: Monday, May 22, 2023 10:28 PM
> To: dev@dpdk.org
> Cc: Ori Kam ; Aman Singh ;
> Yuying Zhang ; Ferruh Yigit
> ; NBU-Contact-Thomas Monjalon (EXTERNAL)
>
> Subject: [PATCH v3 0/5] ethdev: modify field API for multiple headers
>
On 5/23/2023 3:50 AM, Kaisen You wrote:
When a DPDK application is started on only one numa node, memory is
allocated for only one socket. When interrupt threads use memory,
memory may not be found on the socket where the interrupt thread
is currently located, and memory has to be reallocated on
Add hwpool ops which can used to create a rte_mempool that attaches
to another rte_mempool. The hwpool will not have its own buffers and
will have a dummy populate callback. Only an NPA aura will be allocated
for this rte_mempool. The buffers will be allocate from the NPA pool
of the attached rte_m
Add the following cnxk mempool PMD APIs to facilitate exchanging mbufs
between pools.
* rte_pmd_cnxk_mempool_is_hwpool() - Allows user to check whether a pool
is hwpool or not.
* rte_pmd_cnxk_mempool_range_check_disable() - Disables range checking on
any rte_mempool.
* rte_pmd_cnxk_mempool
Hi Ferruh,
> -Original Message-
> From: Ferruh Yigit
> Sent: Tuesday, May 23, 2023 1:34 PM
>
> On 5/23/2023 7:59 AM, Ori Kam wrote:
> > Hi
> >
> >> -Original Message-
> >> From: Ferruh Yigit
> >> Sent: Monday, May 22, 2023 1:28 PM
> >>
> >> On 5/18/2023 10:48 PM, Alexander Kozyr
On 5/23/2023 3:50 AM, Kaisen You wrote:
When a DPDK application is started on only one numa node, memory is
allocated for only one socket. When interrupt threads use memory,
memory may not be found on the socket where the interrupt thread
is currently located, and memory has to be reallocated on
Use lower bits of pool_config to pass flags specific to
cnxk mempool PMD ops.
Signed-off-by: Ashwin Sekhar T K
---
drivers/mempool/cnxk/cnxk_mempool.h | 24
drivers/mempool/cnxk/cnxk_mempool_ops.c | 17 ++---
drivers/net/cnxk/cnxk_ethdev_sec.c | 25 +
Current APIs to set range on auras modifies both the
aura range limits in software and pool range limits
in NPA hardware.
Newly added ROC APIs allow to set/get aura range limits
in software alone without modifying hardware.
The existing aura range set functionality has been moved
as a pool range
This patch-set extend the modify field action API to support both
multiple MPLS and GENEVE option headers.
In current API, the header type is provided by rte_flow_field_id
enumeration and the encapsulation level (inner/outer/tunnel) is
specified by data.level field.
However, there is no way to spe
The modify field action description inside "Generic flow API (rte_flow)"
documentation, lists all operations supported for a destination field.
In addition, it lists the values supported for a encapsulation level
field.
Before the lists, in both cases, miss a blank line causing them to look
regula
The asynchronous operations description inside "Generic flow API
(rte_flow)" documentation, adds some bullets to describe asynchronous
operations behavior.
Before the first bullet, miss a blank line causing it to look a regular
text line.
This patch adds the blank line.
Fixes: 197e820c6685 ("eth
The RSS action description inside "Generic flow API (rte_flow)"
documentation, lists the values supported for a encapsulation level
field.
For "2" value, it uses 3 spaces as an indentation instead of 2 after
line breaking, causing the first line to be bold.
This patch updates the number of spaces
Add modify field support for GENEVE option fields:
- "RTE_FLOW_FIELD_GENEVE_OPT_TYPE"
- "RTE_FLOW_FIELD_GENEVE_OPT_CLASS"
- "RTE_FLOW_FIELD_GENEVE_OPT_DATA"
Each GENEVE TLV option is identified by both its "class" and "type", so
2 new fields were added to "rte_flow_action_modify_data" structure
Use lower bits of pool_config to pass flags specific to
cnxk mempool PMD ops.
Signed-off-by: Ashwin Sekhar T K
---
drivers/mempool/cnxk/cnxk_mempool.h | 24
drivers/mempool/cnxk/cnxk_mempool_ops.c | 17 ++---
drivers/net/cnxk/cnxk_ethdev_sec.c | 25 +
Add support for MPLS modify header using "RTE_FLOW_FIELD_MPLS" id.
Since MPLS heaser might appear more the one time in inner/outer/tunnel,
a new field was added to "rte_flow_action_modify_data" structure in
addition to "level" field.
The "tag_index" field is the index of the header inside encapsul
Current APIs to set range on auras modifies both the
aura range limits in software and pool range limits
in NPA hardware.
Newly added ROC APIs allow to set/get aura range limits
in software alone without modifying hardware.
The existing aura range set functionality has been moved
as a pool range
Add hwpool ops which can used to create a rte_mempool that attaches
to another rte_mempool. The hwpool will not have its own buffers and
will have a dummy populate callback. Only an NPA aura will be allocated
for this rte_mempool. The buffers will be allocate from the NPA pool
of the attached rte_m
Add the following cnxk mempool PMD APIs to facilitate exchanging mbufs
between pools.
* rte_pmd_cnxk_mempool_is_hwpool() - Allows user to check whether a pool
is hwpool or not.
* rte_pmd_cnxk_mempool_range_check_disable() - Disables range checking on
any rte_mempool.
* rte_pmd_cnxk_mempool
Current APIs to set range on auras modifies both the
aura range limits in software and pool range limits
in NPA hardware.
Newly added ROC APIs allow to set/get aura range limits
in software alone without modifying hardware.
The existing aura range set functionality has been moved
as a pool range
From: Pavan Nikhilesh
Use optimized rte_hash_k32_cmp_eq routine for key comparison for
x86 and ARM64.
Use CRC instructions for hash generation on ARM64.
Signed-off-by: Pavan Nikhilesh
---
lib/hash/rte_cmp_arm64.h | 16
lib/hash/rte_cmp_x86.h | 16
From: Pavan Nikhilesh
Add reassembly perf autotest for both ipv4 and ipv6 reassembly.
Each test is performed with variable number of fragments per flow,
either ordered or unordered fragments and interleaved flows.
Signed-off-by: Pavan Nikhilesh
---
v4 Changes:
- Rebase to master.
v3 Changes:
From: Pavan Nikhilesh
Improve reassembly lookup performance by using NEON intrinsics for
key validation.
Signed-off-by: Pavan Nikhilesh
---
lib/ip_frag/ip_frag_internal.c | 224 +--
lib/ip_frag/ip_reassembly.h | 6 +
lib/ip_frag/rte_ip_frag_common.c | 10 +
Currently, it is allowed to specify a cpuset for lcores such that it
will include physical cores from different NUMA nodes. This has an
effect of setting `rte_socket_id()` for that lcore to SOCKET_ID_ANY,
so add a warning about it.
Signed-off-by: Anatoly Burakov
---
lib/eal/common/eal_common_thr
Current APIs to set range on auras modifies both the
aura range limits in software and pool range limits
in NPA hardware.
Newly added ROC APIs allow to set/get aura range limits
in software alone without modifying hardware.
The existing aura range set functionality has been moved
as a pool range
Add ROC APIs which allows to create NPA auras independently and
attach it to an existing NPA pool. Also add API to destroy
NPA auras independently.
Signed-off-by: Ashwin Sekhar T K
---
drivers/common/cnxk/roc_npa.c | 219
drivers/common/cnxk/roc_npa.h | 4 +
https://bugs.dpdk.org/show_bug.cgi?id=1237
Bug ID: 1237
Summary: QAT Crypto PMD requires QAT compress PMD for no good
reasons
Product: DPDK
Version: 23.03
Hardware: All
OS: All
Status: UNCONFIRME
On Tue, May 23, 2023 at 01:06:16PM +, Anatoly Burakov wrote:
> Currently, it is allowed to specify a cpuset for lcores such that it
> will include physical cores from different NUMA nodes. This has an
> effect of setting `rte_socket_id()` for that lcore to SOCKET_ID_ANY,
> so add a warning abou
Acked-by: Kai Ji
From: Dooley, Brian
Sent: Monday, May 22, 2023 15:39
To: Ji, Kai
Cc: dev@dpdk.org ; gak...@marvell.com ;
Dooley, Brian
Subject: [PATCH v3] crypto/qat: default to IPsec MB for pre and post computes
Pre and post computations currently use the O
On 5/23/2023 2:55 PM, Bruce Richardson wrote:
On Tue, May 23, 2023 at 01:06:16PM +, Anatoly Burakov wrote:
Currently, it is allowed to specify a cpuset for lcores such that it
will include physical cores from different NUMA nodes. This has an
effect of setting `rte_socket_id()` for that lcor
Acked-by: Kai Ji
From: Poddar, Vikash ChandraX
Sent: Tuesday, May 23, 2023 10:14
To: Akhil Goyal ; Fan Zhang ; Ji,
Kai
Cc: dev@dpdk.org ; Poddar, Vikash ChandraX
Subject: [PATCH v2] crypto/qat: support to enable insecure algorithms
All the insecure algorithm
From: Pavan Nikhilesh
Improve reassembly lookup performance by using NEON intrinsics for
key validation.
Signed-off-by: Pavan Nikhilesh
---
lib/ip_frag/ip_frag_internal.c | 224 +--
lib/ip_frag/ip_reassembly.h | 6 +
lib/ip_frag/rte_ip_frag_common.c | 10 +
From: Pavan Nikhilesh
Use optimized rte_hash_k32_cmp_eq routine for key comparison for
x86 and ARM64.
Use CRC instructions for hash generation on ARM64.
Signed-off-by: Pavan Nikhilesh
---
v2 Changes:
- Fix compilation failure with non ARM64/x86 targets
lib/hash/rte_cmp_arm64.h | 16 ++
From: Pavan Nikhilesh
Add reassembly perf autotest for both ipv4 and ipv6 reassembly.
Each test is performed with variable number of fragments per flow,
either ordered or unordered fragments and interleaved flows.
Signed-off-by: Pavan Nikhilesh
---
app/test/meson.build|2 +
app
On Wed, May 17, 2023 at 7:05 PM Morten Brørup
wrote:
>
> > From: Jerin Jacob [mailto:jerinjac...@gmail.com]
> > Sent: Wednesday, 17 May 2023 15.20
> >
> > On Tue, Apr 18, 2023 at 8:46 PM Mattias Rönnblom
> > wrote:
> > >
> > > On 2023-04-18 16:07, Morten Brørup wrote:
> > > >> From: Mattias Rönn
Ping
Regards,
Rakesh
> -Original Message-
> From: Rakesh Kudurumalla
> Sent: Wednesday, April 26, 2023 2:58 PM
> To: Olivier Matz
> Cc: dev@dpdk.org; Jerin Jacob Kollanukkaran ; Nithin
> Kumar Dabilpuram ; Rakesh Kudurumalla
>
> Subject: [PATCH 1/1] app/test: resolve mbuf_test applicat
> On May 23, 2023, at 5:33 AM, Thomas Monjalon wrote:
>
> 22/05/2023 11:27, Burakov, Anatoly:
>> On 5/20/2023 7:07 PM, Philip Prindeville wrote:
>>> From: Philip Prindeville
>>>
>>> pread64() and pwrite64() are declared in in MUSL and
>>> other (i.e. not glibc) C runtimes.
>>>
>>> Signed-o
On Tue, 23 May 2023 08:12:28 +
Akhil Goyal wrote:
> >
> > This could happen if the passed in length to this routine was larger than
> > the amount of data in the mbuf. Should the function check and return an
> > error?
> >
> > Panic should only be reserved for seriously corrupted input (li
> -Original Message-
> From: pbhagavat...@marvell.com
> Sent: Tuesday, May 23, 2023 9:39 AM
> To: jer...@marvell.com; Honnappa Nagarahalli
> ; nd ; Konstantin Ananyev
>
> Cc: dev@dpdk.org; Pavan Nikhilesh
> Subject: [PATCH v2 2/3] ip_frag: improve reassembly lookup performance
>
> Fr
23/05/2023 17:46, Philip Prindeville:
>
> > On May 23, 2023, at 5:33 AM, Thomas Monjalon wrote:
> >
> > 22/05/2023 11:27, Burakov, Anatoly:
> >> On 5/20/2023 7:07 PM, Philip Prindeville wrote:
> >>> From: Philip Prindeville
> >>>
> >>> pread64() and pwrite64() are declared in in MUSL and
> >>
The rte_flow_async_destroy() and rte_flow_push() API is
intended to be as fast as possible and tracepoints for
these functions must be marked as fast-path tracepoints.
Fixes: 6679cf21d608 ("ethdev: add trace points")
Signed-off-by: Alexander Kozyrev
Acked-by: Ankur Dwivedi
Acked-by: Ori Kam
--
> Patch doesn't apply cleanly because it can't find
> 'rte_flow_trace_async_update', is there a dependency?
Fixed in v2. The patch was based on my "update rule" commit.
The rte_flow_async_destroy() and rte_flow_push() API is
intended to be as fast as possible and tracepoints for
these functions must be marked as fast-path tracepoints.
Fixes: 6679cf21d608 ("ethdev: add trace points")
Signed-off-by: Alexander Kozyrev
Acked-by: Ankur Dwivedi
Acked-by: Ori Kam
--
> > -Original Message-
> > From: pbhagavat...@marvell.com
> > Sent: Tuesday, May 23, 2023 9:39 AM
> > To: jer...@marvell.com; Honnappa Nagarahalli
> > ; nd ; Konstantin
> Ananyev
> >
> > Cc: dev@dpdk.org; Pavan Nikhilesh
> > Subject: [PATCH v2 2/3] ip_frag: improve reassembly lookup perf
Introduce the new rte_flow_actions_update() API allowing users
to update the action list in the already existing rule.
Flow rules can be updated now without the need to destroy
the rule first and create a new one instead.
A single API call ensures that no packets are lost by
guaranteeing atomicity
Targeting 23.07 if possible. Add support for AGX100 (N6000) and corner case
fixes.
Hernan Vargas (6):
baseband/fpga_5gnr_fec: fix possible div by zero
baseband/fpga_5gnr_fec: fix seg fault unconf queue
baseband/fpga_5gnr_fec: renaming for consistency
baseband/fpga_5gnr_fec: add Vista Cree
Add fix to have an early exit when z_c is zero to prevent a possible
division by zero.
Fixes: 44dc6faa796f ("baseband/fpga_5gnr_fec: add LDPC processing functions")
Cc: sta...@dpdk.org
Signed-off-by: Hernan Vargas
---
drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 2 ++
1 file changed, 2
Adding exception to prevent segmentation fault in case a queue is
started which was not configured earlier.
Fixes: c58109a8871d ("baseband/fpga_5gnr_fec: add queue configuration")
Cc: sta...@dpdk.org
Signed-off-by: Hernan Vargas
---
drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 4
1
Rename generic functions and constants using the FPGA 5GNR prefix naming
to prepare for code reuse for new FPGA implementation variant.
No functional impact.
Signed-off-by: Hernan Vargas
---
.../baseband/fpga_5gnr_fec/fpga_5gnr_fec.h| 117 +++--
.../fpga_5gnr_fec/rte_fpga_5gnr_fec.c
Create a new file vc_5gnr_pmd.h to store structures and macros specific
to Vista Creek 5G FPGA implementation and rename functions specific to
the Vista Creek variant.
Signed-off-by: Hernan Vargas
---
.../baseband/fpga_5gnr_fec/fpga_5gnr_fec.h| 183 +-
.../fpga_5gnr_fec/rte_fpga_5gnr_fec
Add support for new FPGA variant AGX100 (on Arrow Creek N6000).
Signed-off-by: Hernan Vargas
---
doc/guides/bbdevs/fpga_5gnr_fec.rst | 72 +-
drivers/baseband/fpga_5gnr_fec/agx100_pmd.h | 273
.../baseband/fpga_5gnr_fec/fpga_5gnr_fec.h|6 +
.../fpga_5gnr_fec/rte_fpga_
Cosmetic changes for comments.
No functional impact.
Signed-off-by: Hernan Vargas
---
.../baseband/fpga_5gnr_fec/fpga_5gnr_fec.h| 93 ++--
.../fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 398 +-
.../fpga_5gnr_fec/rte_pmd_fpga_5gnr_fec.h | 16 +-
3 files changed, 252 ins
> On May 23, 2023, at 11:36 AM, Thomas Monjalon wrote:
>
> 23/05/2023 17:46, Philip Prindeville:
>>
>>> On May 23, 2023, at 5:33 AM, Thomas Monjalon wrote:
>>>
>>> 22/05/2023 11:27, Burakov, Anatoly:
On 5/20/2023 7:07 PM, Philip Prindeville wrote:
> From: Philip Prindeville
>
Hi Hernan,
On 5/23/23 20:48, Hernan Vargas wrote:
Targeting 23.07 if possible. Add support for AGX100 (N6000) and corner case
fixes.
We can take the fixes in 23.07, but for the new devices support, it will
have to wait for v23.11. Indeed, the submission deadline was one month
ago (April 22nd)
On 5/23/23 20:48, Hernan Vargas wrote:
Add fix to have an early exit when z_c is zero to prevent a possible
division by zero.
Fixes: 44dc6faa796f ("baseband/fpga_5gnr_fec: add LDPC processing functions")
Cc: sta...@dpdk.org
Signed-off-by: Hernan Vargas
---
drivers/baseband/fpga_5gnr_fec/r
On 5/23/23 20:48, Hernan Vargas wrote:
Adding exception to prevent segmentation fault in case a queue is
started which was not configured earlier.
Fixes: c58109a8871d ("baseband/fpga_5gnr_fec: add queue configuration")
Cc: sta...@dpdk.org
Signed-off-by: Hernan Vargas
---
drivers/baseband/
Inline MACsec offload was supported in DPDK 22.11
using rte_security APIs.
This patchset adds few minor changes in the rte_security APIs
to specify the direction of SA/SC and update the SC configuration
to set packet number threshold.
The patchset also add functional test cases in dpdk-test app
to
MACsec SC/SA ids are created based on direction of the flow.
Hence, added the missing field for configuration and cleanup
of the SCs and SAs.
Signed-off-by: Akhil Goyal
---
lib/security/rte_security.c| 16 ++--
lib/security/rte_security.h| 14 ++
lib/secur
Added Packet number threshold parameter in MACsec SC
configuration to identify the maximum allowed threshold
for packet number field in the packet.
A field is_xpn is also added to identify if the SAs are
configured for extended packet number or not so that
packet number threshold can be configured
Updated test app to verify Inline MACsec offload using
rte_security APIs.
A couple of test cases are added to verify encap only
and decap only of some known test vectors from MACsec
specification.
Signed-off-by: Akhil Goyal
---
app/test/meson.build |1 +
app/test/tes
Added test vectors and test cases to verify
auth_only/verify_only and encap-decap/auth-verify
to verify the complete TX-RX path using the loopback
mode of ethdev.
Signed-off-by: Akhil Goyal
---
app/test/test_security_inline_macsec.c| 153 +++
.../test_security_inline_macsec_vectors.h
Added test case and test vectors to verify multiple
flows of MACsec.
Signed-off-by: Akhil Goyal
---
app/test/test_security_inline_macsec.c| 49
.../test_security_inline_macsec_vectors.h | 110 +-
2 files changed, 158 insertions(+), 1 deletion(-)
diff --git
Added cases to verify MACsec processing with VLAN
tags inserted. Vectors are added to verify 1/2/3
VLAN tags in clear or encrypted data.
Signed-off-by: Akhil Goyal
---
app/test/test_security_inline_macsec.c| 67 ++
.../test_security_inline_macsec_vectors.h | 217
Added MACsec negative test cases to verify
pkt drop, untagged rx, bad tag rx, sa not in use,
out packets untagged, pkts too long.
Signed-off-by: Akhil Goyal
---
app/test/test_security_inline_macsec.c| 346 +
.../test_security_inline_macsec_vectors.h | 475
Added cases to verify various stats of MACsec.
Signed-off-by: Akhil Goyal
---
app/test/test_security_inline_macsec.c | 222 +
1 file changed, 222 insertions(+)
diff --git a/app/test/test_security_inline_macsec.c
b/app/test/test_security_inline_macsec.c
index 9c4546fa38.
From: Ankur Dwivedi
This patch enables the test_inline_macsec_interrupts_all
test case for MACSEC.
Signed-off-by: Ankur Dwivedi
Signed-off-by: Akhil Goyal
---
app/test/test_security_inline_macsec.c| 124 +++
.../test_security_inline_macsec_vectors.h | 306 +-
2
This patch enables the Tx HW rekey test case for MACSEC.
Signed-off-by: Ankur Dwivedi
Signed-off-by: Akhil Goyal
---
app/test/test_security_inline_macsec.c| 137 +-
.../test_security_inline_macsec_vectors.h | 243 ++
2 files changed, 378 insertions(+), 2 dele
From: Ankur Dwivedi
This patch enables the Rx rekey test case for MACSEC.
Signed-off-by: Ankur Dwivedi
---
app/test/test_security_inline_macsec.c | 50 +-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/app/test/test_security_inline_macsec.c
b/app/test/te
From: Ankur Dwivedi
This patch enables anti replay test case for MACsec.
Signed-off-by: Ankur Dwivedi
Signed-off-by: Akhil Goyal
---
app/test/test_security_inline_macsec.c| 82 +++
.../test_security_inline_macsec_vectors.h | 467 ++
2 files changed, 549 insertions
Removed the test_capability_get_no_support_for_macsec case
as MACsec is now supported and capability can have valid
MACsec support.
Signed-off-by: Akhil Goyal
---
app/test/test_security.c | 37 -
1 file changed, 37 deletions(-)
diff --git a/app/test/test_secu
Added MACsec support in Marvell cnxk PMD.
The patchset is pending from last release [1]
Sending as a new series as the functionality is now
complete and tested on hardware.
Depends-on: https://patches.dpdk.org/project/dpdk/list/?series=28140
[1]
https://patches.dpdk.org/project/dpdk/cover/202209
Added ROC init and fini APIs for supporting MACsec.
Signed-off-by: Ankur Dwivedi
Signed-off-by: Vamsi Attunuru
Signed-off-by: Akhil Goyal
---
drivers/common/cnxk/meson.build | 1 +
drivers/common/cnxk/roc_api.h | 3 +
drivers/common/cnxk/roc_features.h | 6 +
drivers/common/cn
Added ROC APIs to configure MACsec secure channel(SC)
and its mapping with SAs for both Rx and Tx.
Signed-off-by: Ankur Dwivedi
Signed-off-by: Vamsi Attunuru
Signed-off-by: Akhil Goyal
---
drivers/common/cnxk/roc_mbox.h| 37 ++
drivers/common/cnxk/roc_mcs.h | 41 ++
d
Added ROC APIs to allocate/free MACsec resources
and APIs to write SA policy.
Signed-off-by: Ankur Dwivedi
Signed-off-by: Vamsi Attunuru
Signed-off-by: Akhil Goyal
---
drivers/common/cnxk/meson.build | 1 +
drivers/common/cnxk/roc_mbox.h| 12 ++
drivers/common/cnxk/roc_mcs.h
Added ROC APIs to configure MACsec secy policy and
flow entries.
Signed-off-by: Ankur Dwivedi
Signed-off-by: Vamsi Attunuru
Signed-off-by: Akhil Goyal
---
drivers/common/cnxk/roc_mbox.h| 38 +
drivers/common/cnxk/roc_mcs.h | 37 +
drivers/common/cnxk/roc_mcs_s
Added ROC APIs for setting packet number and LMAC
related configurations.
Signed-off-by: Ankur Dwivedi
Signed-off-by: Vamsi Attunuru
Signed-off-by: Akhil Goyal
---
drivers/common/cnxk/roc_mbox.h| 56 +
drivers/common/cnxk/roc_mcs.c | 71 +
Added ROC APIs for MACsec stats for SC/SECY/FLOW/PORT
Signed-off-by: Ankur Dwivedi
Signed-off-by: Vamsi Attunuru
Signed-off-by: Akhil Goyal
---
drivers/common/cnxk/meson.build | 1 +
drivers/common/cnxk/roc_mbox.h | 93 ++
drivers/common/cnxk/roc_mcs.h | 85 +
Added ROC APIs to support various MACsec interrupts.
Signed-off-by: Ankur Dwivedi
Signed-off-by: Vamsi Attunuru
Signed-off-by: Akhil Goyal
---
drivers/common/cnxk/roc_dev.c | 86 +
drivers/common/cnxk/roc_mbox.h | 37 +++-
drivers/common/cnxk/roc_mcs.c | 117
Added ROC APIs for MACsec port configurations
Signed-off-by: Ankur Dwivedi
Signed-off-by: Vamsi Attunuru
Signed-off-by: Akhil Goyal
---
drivers/common/cnxk/roc_mbox.h | 40
drivers/common/cnxk/roc_mcs.c | 345
drivers/common/cnxk/roc_mcs.h | 48
Added ROC APIs to configure MACsec control port.
Signed-off-by: Ankur Dwivedi
Signed-off-by: Vamsi Attunuru
Signed-off-by: Akhil Goyal
---
drivers/common/cnxk/roc_mbox.h | 72
drivers/common/cnxk/roc_mcs.c | 117
drivers/common/cnxk/roc
Added MACsec FIPS configuration mbox
Signed-off-by: Ankur Dwivedi
Signed-off-by: Vamsi Attunuru
Signed-off-by: Akhil Goyal
---
drivers/common/cnxk/roc_mbox.h | 74 ++
drivers/common/cnxk/roc_mcs.h | 69 +++
2 files changed, 143 inser
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