> Just for me, if the code is backward compatible, it should be no problem to 
> support enhanced architecture chips. Or did I miss something? What are 
> drawbacks of supporting these devices?

The enhanced devices use 14-bit instructions but address more memory
banks -- and for this they use different mechanisms: regular 14-bit
devices have data bank bits in STATUS, the enhanced devices do not use
any bank bits from STATUS but introduce a 16-bit-like register for
data bank selection. This breaks implicit compiler assumptions, as
SDCC occasionally "optimizes" BANKSEL directives (which typically
expand to 2 bit set/clear instructions on STATUS) to a single bit
set/clear instruction when the other bit is known to remain constant.
As the "support'" of the enhanced devices is thus pretty broken, I
would have removed it entirely in order not to raise false hopes --
that's pretty much it.

Raphael

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