frank.ch...@sifive.com writes:
> From: Frank Chang <frank.ch...@sifive.com> > > Signed-off-by: Frank Chang <frank.ch...@sifive.com> > --- > target/riscv/vector_helper.c | 24 ++++++++++++------------ > 1 file changed, 12 insertions(+), 12 deletions(-) > > diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c > index 42a48be5fd..d617d0dfbd 100644 > --- a/target/riscv/vector_helper.c > +++ b/target/riscv/vector_helper.c > @@ -3831,28 +3831,28 @@ GEN_VEXT_V_ENV(vfsqrt_v_w, 4, 4, clearl) > GEN_VEXT_V_ENV(vfsqrt_v_d, 8, 8, clearq) > > /* Vector Floating-Point MIN/MAX Instructions */ > -RVVCALL(OPFVV2, vfmin_vv_h, OP_UUU_H, H2, H2, H2, float16_minnum) > -RVVCALL(OPFVV2, vfmin_vv_w, OP_UUU_W, H4, H4, H4, float32_minnum) > -RVVCALL(OPFVV2, vfmin_vv_d, OP_UUU_D, H8, H8, H8, float64_minnum) > +RVVCALL(OPFVV2, vfmin_vv_h, OP_UUU_H, H2, H2, H2, float16_minnum_noprop) > +RVVCALL(OPFVV2, vfmin_vv_w, OP_UUU_W, H4, H4, H4, float32_minnum_noprop) > +RVVCALL(OPFVV2, vfmin_vv_d, OP_UUU_D, H8, H8, H8, > float64_minnum_noprop) This patch breaks bisection because you don't introduce this into softfloat until later. You should always ensure each step can build and run - practically this means the softfloat changes should be at the beginning of the series. > GEN_VEXT_VV_ENV(vfmin_vv_h, 2, 2, clearh) > GEN_VEXT_VV_ENV(vfmin_vv_w, 4, 4, clearl) > GEN_VEXT_VV_ENV(vfmin_vv_d, 8, 8, clearq) > -RVVCALL(OPFVF2, vfmin_vf_h, OP_UUU_H, H2, H2, float16_minnum) > -RVVCALL(OPFVF2, vfmin_vf_w, OP_UUU_W, H4, H4, float32_minnum) > -RVVCALL(OPFVF2, vfmin_vf_d, OP_UUU_D, H8, H8, float64_minnum) > +RVVCALL(OPFVF2, vfmin_vf_h, OP_UUU_H, H2, H2, float16_minnum_noprop) > +RVVCALL(OPFVF2, vfmin_vf_w, OP_UUU_W, H4, H4, float32_minnum_noprop) > +RVVCALL(OPFVF2, vfmin_vf_d, OP_UUU_D, H8, H8, float64_minnum_noprop) > GEN_VEXT_VF(vfmin_vf_h, 2, 2, clearh) > GEN_VEXT_VF(vfmin_vf_w, 4, 4, clearl) > GEN_VEXT_VF(vfmin_vf_d, 8, 8, clearq) > > -RVVCALL(OPFVV2, vfmax_vv_h, OP_UUU_H, H2, H2, H2, float16_maxnum) > -RVVCALL(OPFVV2, vfmax_vv_w, OP_UUU_W, H4, H4, H4, float32_maxnum) > -RVVCALL(OPFVV2, vfmax_vv_d, OP_UUU_D, H8, H8, H8, float64_maxnum) > +RVVCALL(OPFVV2, vfmax_vv_h, OP_UUU_H, H2, H2, H2, float16_maxnum_noprop) > +RVVCALL(OPFVV2, vfmax_vv_w, OP_UUU_W, H4, H4, H4, float32_maxnum_noprop) > +RVVCALL(OPFVV2, vfmax_vv_d, OP_UUU_D, H8, H8, H8, float64_maxnum_noprop) > GEN_VEXT_VV_ENV(vfmax_vv_h, 2, 2, clearh) > GEN_VEXT_VV_ENV(vfmax_vv_w, 4, 4, clearl) > GEN_VEXT_VV_ENV(vfmax_vv_d, 8, 8, clearq) > -RVVCALL(OPFVF2, vfmax_vf_h, OP_UUU_H, H2, H2, float16_maxnum) > -RVVCALL(OPFVF2, vfmax_vf_w, OP_UUU_W, H4, H4, float32_maxnum) > -RVVCALL(OPFVF2, vfmax_vf_d, OP_UUU_D, H8, H8, float64_maxnum) > +RVVCALL(OPFVF2, vfmax_vf_h, OP_UUU_H, H2, H2, float16_maxnum_noprop) > +RVVCALL(OPFVF2, vfmax_vf_w, OP_UUU_W, H4, H4, float32_maxnum_noprop) > +RVVCALL(OPFVF2, vfmax_vf_d, OP_UUU_D, H8, H8, float64_maxnum_noprop) > GEN_VEXT_VF(vfmax_vf_h, 2, 2, clearh) > GEN_VEXT_VF(vfmax_vf_w, 4, 4, clearl) > GEN_VEXT_VF(vfmax_vf_d, 8, 8, clearq) -- Alex Bennée
