On Tue, 23 Jun 2020 at 20:38, Richard Henderson <richard.hender...@linaro.org> wrote: > > We now implement all of the components of MTE, without actually > supporting any tagged memory. All MTE instructions will work, > trivially, so we can enable support. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > --- > v6: Delay user-only cpu reset bits to the user-only patch set. > --- > target/arm/cpu64.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c > index 778cecc2e6..45b0ca7188 100644 > --- a/target/arm/cpu64.c > +++ b/target/arm/cpu64.c > @@ -654,6 +654,7 @@ static void aarch64_max_initfn(Object *obj) > > t = cpu->isar.id_aa64pfr1; > t = FIELD_DP64(t, ID_AA64PFR1, BT, 1); > + t = FIELD_DP64(t, ID_AA64PFR1, MTE, 2); > cpu->isar.id_aa64pfr1 = t;
Worth a brief comment /* Will be downgraded to 1 if board provides no tag memory */ ? Otherwise Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
