Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.mayd...@linaro.org/
Hi, This series seems to have some coding style problems. See output below for more information: Message-id: 20190214190603.25030-1-peter.mayd...@linaro.org Subject: [Qemu-devel] [PULL 00/27] target-arm queue Type: series === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu t [tag update] patchew/20190214190603.25030-1-peter.mayd...@linaro.org -> patchew/20190214190603.25030-1-peter.mayd...@linaro.org Switched to a new branch 'test' f74396d116 gdbstub: Send a reply to the vKill packet. 52c1857391 target/arm: Add missing clear_tail calls 2f1aef96ec target/arm: Use vector operations for saturation 80683e5bc1 target/arm: Split out FPSCR.QC to a vector field 5d1d26f9eb target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR] 06fe48799d target/arm: Split out flags setting from vfp compares d0ce62513e target/arm: Fix arm_cpu_dump_state vs FPSCR f382917105 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR 21c80ed9cd target/arm: Remove neon min/max helpers 822434eb26 target/arm: Use tcg integer min/max primitives for neon ec47e8c916 target/arm: Use vector minmax expanders for aarch32 8e1c96f683 target/arm: Use vector minmax expanders for aarch64 5ce1275e65 target/arm: Rely on optimization within tcg_gen_gvec_or 7cf21d5648 hw/arm/armsse: Fix miswiring of expansion IRQs fc4f4fbe1c hw/intc/armv7m_nvic: Allow byte accesses to SHPR1 df4e1ca71d MAINTAINERS: Remove Peter Crosthwaite from various entries 0818f544d6 arm: Allow system registers for KVM guests to be changed by QEMU code 29ae44a595 linux-user/elfload: enable HWCAP_CPUID for AArch64 f5eb2f7c57 target/arm: expose remaining CPUID registers as RAZ ac0a14313e target/arm: expose MPIDR_EL1 to userspace 0263d9ab2d target/arm: expose CPUID registers to userspace 9b69c06e28 target/arm: relax permission checks for HWCAP_CPUID registers d61628698a target/arm: Restructure disas_fp_int_conv 385be0d097 target/arm: Force result size into dp after operation 1cc6b8631d target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be 2d2b73dc4d target/arm: Implement HACR_EL2 86f75ddfdd target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR === OUTPUT BEGIN === 1/27 Checking commit 86f75ddfddfc (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR) 2/27 Checking commit 2d2b73dc4d6c (target/arm: Implement HACR_EL2) 3/27 Checking commit 1cc6b8631d42 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be) 4/27 Checking commit 385be0d0977a (target/arm: Force result size into dp after operation) 5/27 Checking commit d61628698a25 (target/arm: Restructure disas_fp_int_conv) 6/27 Checking commit 9b69c06e28d4 (target/arm: relax permission checks for HWCAP_CPUID registers) 7/27 Checking commit 0263d9ab2de9 (target/arm: expose CPUID registers to userspace) 8/27 Checking commit ac0a14313eb2 (target/arm: expose MPIDR_EL1 to userspace) 9/27 Checking commit f5eb2f7c5740 (target/arm: expose remaining CPUID registers as RAZ) 10/27 Checking commit 29ae44a5951b (linux-user/elfload: enable HWCAP_CPUID for AArch64) 11/27 Checking commit 0818f544d6cd (arm: Allow system registers for KVM guests to be changed by QEMU code) 12/27 Checking commit df4e1ca71de6 (MAINTAINERS: Remove Peter Crosthwaite from various entries) 13/27 Checking commit fc4f4fbe1c98 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1) 14/27 Checking commit 7cf21d564829 (hw/arm/armsse: Fix miswiring of expansion IRQs) 15/27 Checking commit 5ce1275e65ee (target/arm: Rely on optimization within tcg_gen_gvec_or) 16/27 Checking commit 8e1c96f68344 (target/arm: Use vector minmax expanders for aarch64) 17/27 Checking commit ec47e8c9169b (target/arm: Use vector minmax expanders for aarch32) 18/27 Checking commit 822434eb2677 (target/arm: Use tcg integer min/max primitives for neon) 19/27 Checking commit 21c80ed9cd6e (target/arm: Remove neon min/max helpers) 20/27 Checking commit f38291710529 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR) ERROR: trailing statements should be on next line #25: FILE: target/arm/helper.c:84: + case 1: stl_p(buf, vfp_get_fpscr(env)); return 4; ERROR: trailing statements should be on next line #34: FILE: target/arm/helper.c:110: + case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4; total: 2 errors, 0 warnings, 16 lines checked Patch 20/27 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 21/27 Checking commit d0ce62513eae (target/arm: Fix arm_cpu_dump_state vs FPSCR) 22/27 Checking commit 06fe48799dc0 (target/arm: Split out flags setting from vfp compares) 23/27 Checking commit 5d1d26f9eba9 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]) 24/27 Checking commit 80683e5bc15a (target/arm: Split out FPSCR.QC to a vector field) 25/27 Checking commit 2f1aef96ec10 (target/arm: Use vector operations for saturation) ERROR: spaces required around that '*' (ctx:WxV) #360: FILE: target/arm/vec_helper.c:774: + TYPEN *d = vd, *n = vn; TYPEM *m = vm; \ ^ total: 1 errors, 0 warnings, 438 lines checked Patch 25/27 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 26/27 Checking commit 52c1857391d8 (target/arm: Add missing clear_tail calls) 27/27 Checking commit f74396d1168a (gdbstub: Send a reply to the vKill packet.) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190214190603.25030-1-peter.mayd...@linaro.org/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
