Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.mayd...@linaro.org/
Hi, This series seems to have some coding style problems. See output below for more information: Message-id: 20190214190603.25030-1-peter.mayd...@linaro.org Subject: [Qemu-devel] [PULL 00/27] target-arm queue Type: series === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu t [tag update] patchew/20190214190603.25030-1-peter.mayd...@linaro.org -> patchew/20190214190603.25030-1-peter.mayd...@linaro.org Switched to a new branch 'test' 11ea4f3150 gdbstub: Send a reply to the vKill packet. be0c840de4 target/arm: Add missing clear_tail calls 23ca71bf65 target/arm: Use vector operations for saturation 32960e7603 target/arm: Split out FPSCR.QC to a vector field 1145bf059b target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR] 754737362f target/arm: Split out flags setting from vfp compares 9eae8889db target/arm: Fix arm_cpu_dump_state vs FPSCR 0ce5d35ee2 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR 02666e516f target/arm: Remove neon min/max helpers 4d27e98f16 target/arm: Use tcg integer min/max primitives for neon 8e31e0c833 target/arm: Use vector minmax expanders for aarch32 be6d1d7c04 target/arm: Use vector minmax expanders for aarch64 9c42a28eca target/arm: Rely on optimization within tcg_gen_gvec_or df0e032414 hw/arm/armsse: Fix miswiring of expansion IRQs 84a7951b4a hw/intc/armv7m_nvic: Allow byte accesses to SHPR1 514aa8eda1 MAINTAINERS: Remove Peter Crosthwaite from various entries b9286febf7 arm: Allow system registers for KVM guests to be changed by QEMU code 7f9135d2ce linux-user/elfload: enable HWCAP_CPUID for AArch64 9fd22cfa69 target/arm: expose remaining CPUID registers as RAZ 9c0d85264b target/arm: expose MPIDR_EL1 to userspace fb5effe844 target/arm: expose CPUID registers to userspace ebebfe1ea5 target/arm: relax permission checks for HWCAP_CPUID registers 6ba2008b2f target/arm: Restructure disas_fp_int_conv dfa0134d29 target/arm: Force result size into dp after operation 035fc662c1 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be bd1643769b target/arm: Implement HACR_EL2 5d9278ba69 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR === OUTPUT BEGIN === 1/27 Checking commit 5d9278ba6904 (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR) 2/27 Checking commit bd1643769bf4 (target/arm: Implement HACR_EL2) 3/27 Checking commit 035fc662c10f (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be) 4/27 Checking commit dfa0134d2938 (target/arm: Force result size into dp after operation) 5/27 Checking commit 6ba2008b2f9f (target/arm: Restructure disas_fp_int_conv) 6/27 Checking commit ebebfe1ea53d (target/arm: relax permission checks for HWCAP_CPUID registers) 7/27 Checking commit fb5effe8444a (target/arm: expose CPUID registers to userspace) 8/27 Checking commit 9c0d85264bd2 (target/arm: expose MPIDR_EL1 to userspace) 9/27 Checking commit 9fd22cfa696b (target/arm: expose remaining CPUID registers as RAZ) 10/27 Checking commit 7f9135d2ce3c (linux-user/elfload: enable HWCAP_CPUID for AArch64) 11/27 Checking commit b9286febf73f (arm: Allow system registers for KVM guests to be changed by QEMU code) 12/27 Checking commit 514aa8eda196 (MAINTAINERS: Remove Peter Crosthwaite from various entries) 13/27 Checking commit 84a7951b4a75 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1) 14/27 Checking commit df0e032414fb (hw/arm/armsse: Fix miswiring of expansion IRQs) 15/27 Checking commit 9c42a28eca48 (target/arm: Rely on optimization within tcg_gen_gvec_or) 16/27 Checking commit be6d1d7c044b (target/arm: Use vector minmax expanders for aarch64) 17/27 Checking commit 8e31e0c83344 (target/arm: Use vector minmax expanders for aarch32) 18/27 Checking commit 4d27e98f164d (target/arm: Use tcg integer min/max primitives for neon) 19/27 Checking commit 02666e516fbe (target/arm: Remove neon min/max helpers) 20/27 Checking commit 0ce5d35ee28b (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR) ERROR: trailing statements should be on next line #25: FILE: target/arm/helper.c:84: + case 1: stl_p(buf, vfp_get_fpscr(env)); return 4; ERROR: trailing statements should be on next line #34: FILE: target/arm/helper.c:110: + case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4; total: 2 errors, 0 warnings, 16 lines checked Patch 20/27 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 21/27 Checking commit 9eae8889dbe3 (target/arm: Fix arm_cpu_dump_state vs FPSCR) 22/27 Checking commit 754737362f1b (target/arm: Split out flags setting from vfp compares) 23/27 Checking commit 1145bf059b88 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]) 24/27 Checking commit 32960e760343 (target/arm: Split out FPSCR.QC to a vector field) 25/27 Checking commit 23ca71bf6538 (target/arm: Use vector operations for saturation) ERROR: spaces required around that '*' (ctx:WxV) #360: FILE: target/arm/vec_helper.c:774: + TYPEN *d = vd, *n = vn; TYPEM *m = vm; \ ^ total: 1 errors, 0 warnings, 438 lines checked Patch 25/27 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 26/27 Checking commit be0c840de44a (target/arm: Add missing clear_tail calls) 27/27 Checking commit 11ea4f315038 (gdbstub: Send a reply to the vKill packet.) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190214190603.25030-1-peter.mayd...@linaro.org/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
