Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.mayd...@linaro.org/
Hi, This series seems to have some coding style problems. See output below for more information: Message-id: 20190214190603.25030-1-peter.mayd...@linaro.org Subject: [Qemu-devel] [PULL 00/27] target-arm queue Type: series === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu t [tag update] patchew/20190214190603.25030-1-peter.mayd...@linaro.org -> patchew/20190214190603.25030-1-peter.mayd...@linaro.org Switched to a new branch 'test' 3fb84accb1 gdbstub: Send a reply to the vKill packet. 1b05bfa0b0 target/arm: Add missing clear_tail calls 330663235d target/arm: Use vector operations for saturation 585d8235c3 target/arm: Split out FPSCR.QC to a vector field 0a651b397b target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR] f1e2193373 target/arm: Split out flags setting from vfp compares cc71f739ff target/arm: Fix arm_cpu_dump_state vs FPSCR e5abdca842 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR 71ab631c39 target/arm: Remove neon min/max helpers d64f04762c target/arm: Use tcg integer min/max primitives for neon 565ffb8175 target/arm: Use vector minmax expanders for aarch32 f07a3327ae target/arm: Use vector minmax expanders for aarch64 8566cb485c target/arm: Rely on optimization within tcg_gen_gvec_or a5516fece4 hw/arm/armsse: Fix miswiring of expansion IRQs e7ac553c27 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1 bcc7967dcb MAINTAINERS: Remove Peter Crosthwaite from various entries f88d98d250 arm: Allow system registers for KVM guests to be changed by QEMU code 351c302ef0 linux-user/elfload: enable HWCAP_CPUID for AArch64 5927860dc7 target/arm: expose remaining CPUID registers as RAZ 1629af984d target/arm: expose MPIDR_EL1 to userspace b9d5d582d0 target/arm: expose CPUID registers to userspace 44e3fc28e6 target/arm: relax permission checks for HWCAP_CPUID registers 705c2b3ae7 target/arm: Restructure disas_fp_int_conv d249dc5f66 target/arm: Force result size into dp after operation b7be3ad156 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be 7f06ec4f82 target/arm: Implement HACR_EL2 8f1fa8a2d4 target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR === OUTPUT BEGIN === 1/27 Checking commit 8f1fa8a2d44d (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR) 2/27 Checking commit 7f06ec4f82fc (target/arm: Implement HACR_EL2) 3/27 Checking commit b7be3ad1569d (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be) 4/27 Checking commit d249dc5f667b (target/arm: Force result size into dp after operation) 5/27 Checking commit 705c2b3ae778 (target/arm: Restructure disas_fp_int_conv) 6/27 Checking commit 44e3fc28e6b9 (target/arm: relax permission checks for HWCAP_CPUID registers) 7/27 Checking commit b9d5d582d0b8 (target/arm: expose CPUID registers to userspace) 8/27 Checking commit 1629af984d31 (target/arm: expose MPIDR_EL1 to userspace) 9/27 Checking commit 5927860dc734 (target/arm: expose remaining CPUID registers as RAZ) 10/27 Checking commit 351c302ef060 (linux-user/elfload: enable HWCAP_CPUID for AArch64) 11/27 Checking commit f88d98d2500b (arm: Allow system registers for KVM guests to be changed by QEMU code) 12/27 Checking commit bcc7967dcbce (MAINTAINERS: Remove Peter Crosthwaite from various entries) 13/27 Checking commit e7ac553c2731 (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1) 14/27 Checking commit a5516fece4af (hw/arm/armsse: Fix miswiring of expansion IRQs) 15/27 Checking commit 8566cb485cc1 (target/arm: Rely on optimization within tcg_gen_gvec_or) 16/27 Checking commit f07a3327aeb2 (target/arm: Use vector minmax expanders for aarch64) 17/27 Checking commit 565ffb817594 (target/arm: Use vector minmax expanders for aarch32) 18/27 Checking commit d64f04762c4e (target/arm: Use tcg integer min/max primitives for neon) 19/27 Checking commit 71ab631c3993 (target/arm: Remove neon min/max helpers) 20/27 Checking commit e5abdca84207 (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR) ERROR: trailing statements should be on next line #25: FILE: target/arm/helper.c:84: + case 1: stl_p(buf, vfp_get_fpscr(env)); return 4; ERROR: trailing statements should be on next line #34: FILE: target/arm/helper.c:110: + case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4; total: 2 errors, 0 warnings, 16 lines checked Patch 20/27 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 21/27 Checking commit cc71f739fff8 (target/arm: Fix arm_cpu_dump_state vs FPSCR) 22/27 Checking commit f1e2193373cd (target/arm: Split out flags setting from vfp compares) 23/27 Checking commit 0a651b397b27 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]) 24/27 Checking commit 585d8235c31a (target/arm: Split out FPSCR.QC to a vector field) 25/27 Checking commit 330663235d62 (target/arm: Use vector operations for saturation) ERROR: spaces required around that '*' (ctx:WxV) #360: FILE: target/arm/vec_helper.c:774: + TYPEN *d = vd, *n = vn; TYPEM *m = vm; \ ^ total: 1 errors, 0 warnings, 438 lines checked Patch 25/27 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 26/27 Checking commit 1b05bfa0b021 (target/arm: Add missing clear_tail calls) 27/27 Checking commit 3fb84accb10d (gdbstub: Send a reply to the vKill packet.) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190214190603.25030-1-peter.mayd...@linaro.org/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
