Patchew URL: https://patchew.org/QEMU/20190214190603.25030-1-peter.mayd...@linaro.org/
Hi, This series seems to have some coding style problems. See output below for more information: Message-id: 20190214190603.25030-1-peter.mayd...@linaro.org Subject: [Qemu-devel] [PULL 00/27] target-arm queue Type: series === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu t [tag update] patchew/20190214190603.25030-1-peter.mayd...@linaro.org -> patchew/20190214190603.25030-1-peter.mayd...@linaro.org * [new tag] patchew/20190214220453.15858-1-sv...@stackframe.org -> patchew/20190214220453.15858-1-sv...@stackframe.org Switched to a new branch 'test' 107d0c1054 gdbstub: Send a reply to the vKill packet. 1cefa94d4c target/arm: Add missing clear_tail calls 2d7acfba65 target/arm: Use vector operations for saturation 4cacb6d477 target/arm: Split out FPSCR.QC to a vector field af552d5a9a target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR] 889e25cedd target/arm: Split out flags setting from vfp compares 08ed30fcbd target/arm: Fix arm_cpu_dump_state vs FPSCR 58c34834b4 target/arm: Fix vfp_gdb_get/set_reg vs FPSCR 37ba9384f4 target/arm: Remove neon min/max helpers 3fe3bcd56e target/arm: Use tcg integer min/max primitives for neon 7917081632 target/arm: Use vector minmax expanders for aarch32 7be5894710 target/arm: Use vector minmax expanders for aarch64 3dc77fca6e target/arm: Rely on optimization within tcg_gen_gvec_or 0aa85c83b5 hw/arm/armsse: Fix miswiring of expansion IRQs a171b85781 hw/intc/armv7m_nvic: Allow byte accesses to SHPR1 535a7c3670 MAINTAINERS: Remove Peter Crosthwaite from various entries 824e72655d arm: Allow system registers for KVM guests to be changed by QEMU code c4582c22e5 linux-user/elfload: enable HWCAP_CPUID for AArch64 835edbcab5 target/arm: expose remaining CPUID registers as RAZ 00813a218f target/arm: expose MPIDR_EL1 to userspace 2fad8a0685 target/arm: expose CPUID registers to userspace 876f185d5f target/arm: relax permission checks for HWCAP_CPUID registers 1a8296d2a7 target/arm: Restructure disas_fp_int_conv 9ef7368140 target/arm: Force result size into dp after operation e6ffe03733 target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be 0588209db8 target/arm: Implement HACR_EL2 8be75be4ad target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR === OUTPUT BEGIN === 1/27 Checking commit 8be75be4ad21 (target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR) 2/27 Checking commit 0588209db891 (target/arm: Implement HACR_EL2) 3/27 Checking commit e6ffe03733b4 (target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be) 4/27 Checking commit 9ef736814077 (target/arm: Force result size into dp after operation) 5/27 Checking commit 1a8296d2a731 (target/arm: Restructure disas_fp_int_conv) 6/27 Checking commit 876f185d5fde (target/arm: relax permission checks for HWCAP_CPUID registers) 7/27 Checking commit 2fad8a068527 (target/arm: expose CPUID registers to userspace) 8/27 Checking commit 00813a218f3d (target/arm: expose MPIDR_EL1 to userspace) 9/27 Checking commit 835edbcab59c (target/arm: expose remaining CPUID registers as RAZ) 10/27 Checking commit c4582c22e533 (linux-user/elfload: enable HWCAP_CPUID for AArch64) 11/27 Checking commit 824e72655d47 (arm: Allow system registers for KVM guests to be changed by QEMU code) 12/27 Checking commit 535a7c36704b (MAINTAINERS: Remove Peter Crosthwaite from various entries) 13/27 Checking commit a171b857817d (hw/intc/armv7m_nvic: Allow byte accesses to SHPR1) 14/27 Checking commit 0aa85c83b58c (hw/arm/armsse: Fix miswiring of expansion IRQs) 15/27 Checking commit 3dc77fca6e12 (target/arm: Rely on optimization within tcg_gen_gvec_or) 16/27 Checking commit 7be5894710ec (target/arm: Use vector minmax expanders for aarch64) 17/27 Checking commit 7917081632bd (target/arm: Use vector minmax expanders for aarch32) 18/27 Checking commit 3fe3bcd56e94 (target/arm: Use tcg integer min/max primitives for neon) 19/27 Checking commit 37ba9384f40b (target/arm: Remove neon min/max helpers) 20/27 Checking commit 58c34834b47f (target/arm: Fix vfp_gdb_get/set_reg vs FPSCR) ERROR: trailing statements should be on next line #25: FILE: target/arm/helper.c:84: + case 1: stl_p(buf, vfp_get_fpscr(env)); return 4; ERROR: trailing statements should be on next line #34: FILE: target/arm/helper.c:110: + case 1: vfp_set_fpscr(env, ldl_p(buf)); return 4; total: 2 errors, 0 warnings, 16 lines checked Patch 20/27 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 21/27 Checking commit 08ed30fcbd5f (target/arm: Fix arm_cpu_dump_state vs FPSCR) 22/27 Checking commit 889e25cedd73 (target/arm: Split out flags setting from vfp compares) 23/27 Checking commit af552d5a9a15 (target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]) 24/27 Checking commit 4cacb6d47706 (target/arm: Split out FPSCR.QC to a vector field) 25/27 Checking commit 2d7acfba6561 (target/arm: Use vector operations for saturation) ERROR: spaces required around that '*' (ctx:WxV) #360: FILE: target/arm/vec_helper.c:774: + TYPEN *d = vd, *n = vn; TYPEM *m = vm; \ ^ total: 1 errors, 0 warnings, 438 lines checked Patch 25/27 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 26/27 Checking commit 1cefa94d4c1d (target/arm: Add missing clear_tail calls) 27/27 Checking commit 107d0c10546a (gdbstub: Send a reply to the vKill packet.) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190214190603.25030-1-peter.mayd...@linaro.org/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
