The SLCR needs to be able to reset the CPUs, so link the CPUs to the SLCR. Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> --- Changed since v3: Revert back to using TYPE_CPU Changed from v2: Soften type of CPU to Device Looped link creator
hw/arm/xilinx_zynq.c | 4 ++++ hw/misc/zynq_slcr.c | 11 +++++++++++ 2 files changed, 15 insertions(+) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index c09ff36..1445c60 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -193,6 +193,10 @@ static void zynq_init(QEMUMachineInitArgs *args) dev = qdev_create(NULL, "xilinx,zynq_slcr"); qdev_init_nofail(dev); + object_property_set_link(OBJECT(dev), OBJECT(cpu[0]), "cpu0", NULL); + if (smp_cpus > 1) { + object_property_set_link(OBJECT(dev), OBJECT(cpu[1]), "cpu1", NULL); + } sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xF8000000); dev = qdev_create(NULL, "a9mpcore_priv"); diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c index e42a5b0..83ffc3b 100644 --- a/hw/misc/zynq_slcr.c +++ b/hw/misc/zynq_slcr.c @@ -19,6 +19,8 @@ #include "hw/sysbus.h" #include "sysemu/sysemu.h" +#define NUM_CPUS 2 + #ifdef ZYNQ_ARM_SLCR_ERR_DEBUG #define DB_PRINT(...) do { \ fprintf(stderr, ": %s: ", __func__); \ @@ -122,6 +124,8 @@ typedef struct ZynqSLCRState { MemoryRegion iomem; + CPUState *cpus[NUM_CPUS]; + union { struct { uint16_t scl; @@ -496,10 +500,17 @@ static const MemoryRegionOps slcr_ops = { static int zynq_slcr_init(SysBusDevice *dev) { ZynqSLCRState *s = ZYNQ_SLCR(dev); + int i; memory_region_init_io(&s->iomem, OBJECT(s), &slcr_ops, s, "slcr", 0x1000); sysbus_init_mmio(dev, &s->iomem); + for (i = 0; i < NUM_CPUS; ++i) { + gchar *name = g_strdup_printf("cpu%d", i); + object_property_add_link(OBJECT(dev), name, TYPE_CPU, + (Object **)&s->cpus[i], NULL); + g_free(name); + } return 0; } -- 1.8.5.2