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• • [PULL 037/159] tcg: Convert not to TCGOutOpUnary Richard Henderson
  • [PULL 004/159] tcg: Add TCGType to tcg_op_insert_{after,before} Richard Henderson
  • [PULL 018/159] tcg: Merge INDEX_op_or_{i32,i64} Richard Henderson
  • [PULL 032/159] tcg/arm: Fix constraints for sub Richard Henderson
  • [PULL 025/159] tcg: Convert eqv to TCGOutOpBinary Richard Henderson
  • [PULL 014/159] tcg/optimize: Emit add r, r, -1 in fold_setcond_tst_pow2 Richard Henderson
  • [PULL 021/159] tcg: Merge INDEX_op_orc_{i32,i64} Richard Henderson
  • [PULL 012/159] tcg: Merge INDEX_op_and_{i32,i64} Richard Henderson
  • [PULL 017/159] tcg: Convert or to TCGOutOpBinary Richard Henderson
  • [PULL 035/159] tcg: Convert neg to TCGOutOpUnary Richard Henderson
  • [PULL 009/159] tcg: Convert add to TCGOutOpBinary Richard Henderson
  • [PULL 013/159] tcg/optimize: Fold andc with immediate to and Richard Henderson
  • [PULL 020/159] tcg: Convert orc to TCGOutOpBinary Richard Henderson
  • [PULL 002/159] tcg/loongarch64: Improve constraints for TCG_CT_CONST_VCMP Richard Henderson
  • [PULL 011/159] tcg: Convert and to TCGOutOpBinary Richard Henderson
  • [PULL 040/159] tcg: Merge INDEX_op_mul_{i32,i64} Richard Henderson
  • [PULL 051/159] tcg: Convert divu2 to TCGOutOpDivRem Richard Henderson
  • [PULL 060/159] tcg: Merge INDEX_op_shr_{i32,i64} Richard Henderson
  • [PULL 023/159] tcg: Merge INDEX_op_xor_{i32,i64} Richard Henderson
  • [PULL 041/159] tcg: Convert muluh to TCGOutOpBinary Richard Henderson
  • [PULL 054/159] tcg: Merge INDEX_op_rem_{i32,i64} Richard Henderson
  • [PULL 048/159] tcg: Merge INDEX_op_divu_{i32,i64} Richard Henderson
  • [PULL 008/159] tcg: Merge INDEX_op_mov_{i32,i64} Richard Henderson
  • [PULL 050/159] tcg: Merge INDEX_op_div2_{i32,i64} Richard Henderson
  • [PULL 069/159] tcg: Merge INDEX_op_ctz_{i32,i64} Richard Henderson
  • [PULL 007/159] tcg: Remove INDEX_op_ext{8,16,32}* Richard Henderson
  • [PULL 079/159] tcg: Remove TCG_TARGET_HAS_negsetcond_{i32,i64} Richard Henderson
  • [PULL 046/159] tcg: Merge INDEX_op_div_{i32,i64} Richard Henderson
  • [PULL 065/159] tcg: Merge INDEX_op_rot{l,r}_{i32,i64} Richard Henderson
  • [PULL 024/159] tcg/optimize: Fold eqv with immediate to xor Richard Henderson
  • [PULL 053/159] tcg: Convert rem to TCGOutOpBinary Richard Henderson
  • [PULL 071/159] tcg: Merge INDEX_op_ctpop_{i32,i64} Richard Henderson
  • [PULL 066/159] tcg: Convert clz to TCGOutOpBinary Richard Henderson
  • [PULL 059/159] tcg: Convert shr to TCGOutOpBinary Richard Henderson
  • [PULL 043/159] tcg: Convert mulsh to TCGOutOpBinary Richard Henderson
  • [PULL 064/159] tcg: Convert rotl, rotr to TCGOutOpBinary Richard Henderson
  • [PULL 058/159] tcg: Merge INDEX_op_shl_{i32,i64} Richard Henderson
  • [PULL 075/159] tcg: Merge INDEX_op_mulu2_{i32,i64} Richard Henderson
  • [PULL 073/159] tcg: Merge INDEX_op_muls2_{i32,i64} Richard Henderson
  • [PULL 027/159] tcg: Convert nand to TCGOutOpBinary Richard Henderson
  • [PULL 015/159] tcg: Convert andc to TCGOutOpBinary Richard Henderson
  • [PULL 049/159] tcg: Convert div2 to TCGOutOpDivRem Richard Henderson
  • [PULL 068/159] tcg: Convert ctz to TCGOutOpBinary Richard Henderson
  • [PULL 077/159] tcg/mips: Support negsetcond Richard Henderson
  • [PULL 055/159] tcg: Convert remu to TCGOutOpBinary Richard Henderson
  • [PULL 070/159] tcg: Convert ctpop to TCGOutOpUnary Richard Henderson
  • [PULL 101/159] tcg: Convert ext_i32_i64 to TCGOutOpUnary Richard Henderson
  • [PULL 067/159] tcg: Merge INDEX_op_clz_{i32,i64} Richard Henderson
  • [PULL 026/159] tcg: Merge INDEX_op_eqv_{i32,i64} Richard Henderson
  • [PULL 045/159] tcg: Convert div to TCGOutOpBinary Richard Henderson
  • [PULL 074/159] tcg: Convert mulu2 to TCGOutOpMul2 Richard Henderson
  • [PULL 137/159] tcg/arm: Implement add/sub carry opcodes Richard Henderson
  • [PULL 062/159] tcg: Merge INDEX_op_sar_{i32,i64} Richard Henderson
  • [PULL 112/159] tcg: Do not default add2/sub2_i32 for 32-bit hosts Richard Henderson
  • [PULL 146/159] tcg: Remove add2/sub2 opcodes Richard Henderson
  • [PULL 155/159] tcg: Remove INDEX_op_qemu_st8_* Richard Henderson
  • [PULL 057/159] tcg: Convert shl to TCGOutOpBinary Richard Henderson
  • [PULL 063/159] tcg: Do not require both rotr and rotl from the backend Richard Henderson
  • [PULL 139/159] tcg/s390x: Honor carry_live in tcg_out_movi Richard Henderson
  • [PULL 076/159] tcg/loongarch64: Support negsetcond Richard Henderson
  • [PULL 125/159] tcg/i386: Special case addci r, 0, 0 Richard Henderson
  • [PULL 080/159] tcg: Convert setcond, negsetcond to TCGOutOpSetcond Richard Henderson
  • [PULL 097/159] tcg: Convert extract to TCGOutOpExtract Richard Henderson
  • [PULL 148/159] tcg: Formalize tcg_out_br Richard Henderson
  • [PULL 144/159] tcg/sparc64: Implement add/sub carry opcodes Richard Henderson
  • [PULL 099/159] tcg: Convert sextract to TCGOutOpExtract Richard Henderson
  • [PULL 135/159] target/tricore: Use tcg_gen_addcio_i32 for gen_addc_CC Richard Henderson
  • [PULL 133/159] target/sh4: Use tcg_gen_addcio_i32 for addc Richard Henderson
  • [PULL 100/159] tcg: Merge INDEX_op_sextract_{i32,i64} Richard Henderson
  • [PULL 149/159] tcg: Formalize tcg_out_goto_ptr Richard Henderson
  • [PULL 120/159] tcg/optimize: With two const operands, prefer 0 in arg1 Richard Henderson
  • [PULL 118/159] tcg: Add TCGOutOp structures for add/sub carry opcodes Richard Henderson
  • [PULL 142/159] tcg/s390x: Use ADD LOGICAL WITH SIGNED IMMEDIATE Richard Henderson
  • [PULL 134/159] target/sparc: Use tcg_gen_addcio_tl for gen_op_addcc_int Richard Henderson
  • [PULL 121/159] tcg: Use add carry opcodes to expand add2 Richard Henderson
  • [PULL 107/159] tcg: Merge INDEX_op_deposit_{i32,i64} Richard Henderson
  • [PULL 052/159] tcg: Merge INDEX_op_divu2_{i32,i64} Richard Henderson
  • [PULL 088/159] tcg/ppc: Expand arguments to tcg_out_cmp2 Richard Henderson
  • [PULL 042/159] tcg: Merge INDEX_op_muluh_{i32,i64} Richard Henderson
  • [PULL 150/159] tcg: Convert ld to TCGOutOpLoad Richard Henderson
  • [PULL 111/159] tcg: Expand fallback sub2 with 32-bit operations Richard Henderson
  • [PULL 147/159] tcg: Formalize tcg_out_mb Richard Henderson
  • [PULL 153/159] tcg: Merge INDEX_op_st*_{i32,i64} Richard Henderson
  • [PULL 105/159] tcg: Convert deposit to TCGOutOpDeposit Richard Henderson
  • [PULL 106/159] tcg/aarch64: Improve deposit Richard Henderson
  • [PULL 154/159] tcg: Stash MemOp size in TCGOP_FLAGS Richard Henderson
  • [PULL 119/159] tcg/optimize: Handle add/sub with carry opcodes Richard Henderson
  • [PULL 022/159] tcg: Convert xor to TCGOutOpBinary Richard Henderson
  • [PULL 132/159] target/s390x: Use tcg_gen_addcio_i64 for op_addc64 Richard Henderson
  • [PULL 093/159] tcg: Convert bswap32 to TCGOutOpBswap Richard Henderson
  • [PULL 130/159] target/openrisc: Use tcg_gen_addcio_* for ADDC Richard Henderson
  • [PULL 126/159] tcg: Add tcg_gen_addcio_{i32,i64,tl} Richard Henderson
  • [PULL 082/159] tcg: Convert brcond to TCGOutOpBrcond Richard Henderson
  • [PULL 127/159] target/arm: Use tcg_gen_addcio_* for ADCS Richard Henderson
  • [PULL 016/159] tcg: Merge INDEX_op_andc_{i32,i64} Richard Henderson
  • [PULL 116/159] tcg: Sink def, nb_iargs, nb_oargs loads in liveness_pass_1 Richard Henderson
  • [PULL 102/159] tcg: Convert extu_i32_i64 to TCGOutOpUnary Richard Henderson
  • [PULL 072/159] tcg: Convert muls2 to TCGOutOpMul2 Richard Henderson
  • [PULL 089/159] tcg: Convert brcond2_i32 to TCGOutOpBrcond2 Richard Henderson
  • [PULL 092/159] tcg: Merge INDEX_op_bswap16_{i32,i64} Richard Henderson
  • [PULL 151/159] tcg: Merge INDEX_op_ld*_{i32,i64} Richard Henderson
  • [PULL 104/159] tcg: Convert extrh_i64_i32 to TCGOutOpUnary Richard Henderson
  • [PULL 141/159] tcg/s390x: Implement add/sub carry opcodes Richard Henderson
  • [PULL 086/159] tcg/ppc: Drop fallback constant loading in tcg_out_cmp Richard Henderson
  • [PULL 122/159] tcg: Use sub carry opcodes to expand sub2 Richard Henderson
  • [PULL 103/159] tcg: Convert extrl_i64_i32 to TCGOutOpUnary Richard Henderson
  • [PULL 138/159] tcg/ppc: Implement add/sub carry opcodes Richard Henderson
  • [PULL 047/159] tcg: Convert divu to TCGOutOpBinary Richard Henderson
  • [PULL 087/159] tcg/arm: Expand arguments to tcg_out_cmp2 Richard Henderson
  • [PULL 114/159] tcg/riscv: Drop support for add2/sub2 Richard Henderson
  • [PULL 156/159] tcg: Merge INDEX_op_{ld,st}_{i32,i64,i128} Richard Henderson
  • [PULL 038/159] tcg: Merge INDEX_op_not_{i32,i64} Richard Henderson
  • [PULL 128/159] target/hppa: Use tcg_gen_addcio_i64 Richard Henderson
  • [PULL 083/159] tcg: Merge INDEX_op_brcond_{i32,i64} Richard Henderson
  • [PULL 136/159] tcg/aarch64: Implement add/sub carry opcodes Richard Henderson
  • Re: [PULL 000/159] tcg patch queue Philippe Mathieu-Daudé
  • [PULL 081/159] tcg: Merge INDEX_op_{neg}setcond_{i32,i64}` Richard Henderson
  • [PULL 085/159] tcg: Merge INDEX_op_movcond_{i32,i64} Richard Henderson
  • [PULL 095/159] tcg: Convert bswap64 to TCGOutOpUnary Richard Henderson
  • [PULL 108/159] tcg: Convert extract2 to TCGOutOpExtract2 Richard Henderson
  • [PULL 157/159] tcg: Convert qemu_ld{2} to TCGOutOpLoad{2} Richard Henderson
  • [PULL 123/159] tcg/i386: Honor carry_live in tcg_out_movi Richard Henderson
  • [PULL 094/159] tcg: Merge INDEX_op_bswap32_{i32,i64} Richard Henderson
  • [PULL 030/159] tcg: Convert nor to TCGOutOpBinary Richard Henderson
  • [PULL 145/159] tcg/tci: Implement add/sub carry opcodes Richard Henderson
  • [PULL 143/159] tcg/sparc64: Hoist tcg_cond_to_bcond lookup out of tcg_out_movcc Richard Henderson
  • [PULL 140/159] tcg/s390x: Add TCG_CT_CONST_N32 Richard Henderson
  • [PULL 131/159] target/ppc: Use tcg_gen_addcio_tl for ADD and SUBF Richard Henderson
  • [PULL 117/159] tcg: Add add/sub with carry opcodes and infrastructure Richard Henderson
  • [PULL 159/159] tcg: Remove tcg_out_op Richard Henderson
  • [PULL 061/159] tcg: Convert sar to TCGOutOpBinary Richard Henderson
  • [PULL 115/159] tcg: Move i into each for loop in liveness_pass_1 Richard Henderson
  • [PULL 098/159] tcg: Merge INDEX_op_extract_{i32,i64} Richard Henderson
  • [PULL 096/159] tcg: Rename INDEX_op_bswap64_i64 to INDEX_op_bswap64 Richard Henderson
  • [PULL 044/159] tcg: Merge INDEX_op_mulsh_{i32,i64} Richard Henderson
  • [PULL 091/159] tcg: Convert bswap16 to TCGOutOpBswap Richard Henderson
  • [PULL 090/159] tcg: Convert setcond2_i32 to TCGOutOpSetcond2 Richard Henderson
  • [PULL 158/159] tcg: Convert qemu_st{2} to TCGOutOpLdSt{2} Richard Henderson
  • [PULL 124/159] tcg/i386: Implement add/sub carry opcodes Richard Henderson
  • [PULL 113/159] tcg/mips: Drop support for add2/sub2 Richard Henderson
  • [PULL 078/159] tcg/tci: Support negsetcond Richard Henderson
  • [PULL 152/159] tcg: Convert st to TCGOutOpStore Richard Henderson
  • [PULL 129/159] target/microblaze: Use tcg_gen_addcio_i32 Richard Henderson
  • [PULL 109/159] tcg: Merge INDEX_op_extract2_{i32,i64} Richard Henderson
  • [PULL 110/159] tcg: Expand fallback add2 with 32-bit operations Richard Henderson
  • [PULL 084/159] tcg: Convert movcond to TCGOutOpMovcond Richard Henderson
  • [PULL 028/159] tcg: Merge INDEX_op_nand_{i32,i64} Richard Henderson
  • [PULL 056/159] tcg: Merge INDEX_op_remu_{i32,i64} Richard Henderson
  • Re: [PULL 000/159] tcg patch queue Stefan Hajnoczi
• [PATCH v5 00/10] target/i386/kvm/pmu: PMU Enhancement, Bugfix and Cleanup Dongli Zhang
  • [PATCH v5 09/10] target/i386/kvm: support perfmon-v2 for reset Dongli Zhang
  • [PATCH v5 05/10] target/i386/kvm: extract unrelated code out of kvm_x86_build_cpuid() Dongli Zhang
  • [PATCH v5 07/10] target/i386/kvm: query kvm.enable_pmu parameter Dongli Zhang
  • [PATCH v5 08/10] target/i386/kvm: reset AMD PMU registers during VM reset Dongli Zhang
  • [PATCH v5 04/10] target/i386/kvm: set KVM_PMU_CAP_DISABLE if "-pmu" is configured Dongli Zhang
  • [PATCH v5 02/10] target/i386: disable PERFCORE when "-pmu" is configured Dongli Zhang
  • [PATCH v5 06/10] target/i386/kvm: rename architectural PMU variables Dongli Zhang
  • [PATCH v5 01/10] target/i386: disable PerfMonV2 when PERFCORE unavailable Dongli Zhang
  • [PATCH v5 03/10] kvm: Introduce kvm_arch_pre_create_vcpu() Dongli Zhang
  • [PATCH v5 10/10] target/i386/kvm: don't stop Intel PMU counters Dongli Zhang
• Re: [PATCH 07/21] hw/dma/zynq-devcfg: Indicate power-up status of PL Edgar E. Iglesias
• [PATCH 0/2] tcg/sparc64: Implement CTPOP Richard Henderson
  • [PATCH 2/2] tcg/sparc64: Implement CTPOP Richard Henderson
  • Re: [PATCH 2/2] tcg/sparc64: Implement CTPOP Philippe Mathieu-Daudé
  • [PATCH 1/2] tcg/sparc64: Unexport use_vis3_instructions Richard Henderson
  • Re: [PATCH 1/2] tcg/sparc64: Unexport use_vis3_instructions Philippe Mathieu-Daudé
• Re: [PATCH 10/21] hw/misc/zynq_slcr: Add logic for DCI configuration Edgar E. Iglesias
• [PULL 0/4] Block layer patches Kevin Wolf
  • [PULL 4/4] qemu-img: improve queue depth validation in img_bench Kevin Wolf
  • Re: [PULL 4/4] qemu-img: improve queue depth validation in img_bench Michael Tokarev
  • Re: [PULL 4/4] qemu-img: improve queue depth validation in img_bench Michael Tokarev
  • [PULL 2/4] block/io: skip head/tail requests on EINVAL Kevin Wolf
  • [PULL 3/4] block: Remove unused callback function *bdrv_aio_pdiscard Kevin Wolf
  • [PULL 1/4] file-posix: probe discard alignment on Linux block devices Kevin Wolf
  • Re: [PULL 0/4] Block layer patches Stefan Hajnoczi
• [PATCH] target/i386/hvf: Include missing 'exec/target_page.h' header Philippe Mathieu-Daudé
  • Re: [PATCH] target/i386/hvf: Include missing 'exec/target_page.h' header Pierrick Bouvier
• Re: [PATCH 06/21] hw/dma/zynq-devcfg: Simulate dummy PL reset Edgar E. Iglesias
• [PATCH alternate 0/2] target/riscv: Fix write_misa vs aligned next_pc Richard Henderson
  • [PATCH alternate 2/2] target/riscv: Fix write_misa vs aligned next_pc Richard Henderson
  • Re: [PATCH alternate 2/2] target/riscv: Fix write_misa vs aligned next_pc Daniel Henrique Barboza
  • Re: [PATCH alternate 2/2] target/riscv: Fix write_misa vs aligned next_pc Richard Henderson
  • [PATCH alternate 1/2] target/riscv: Update pc before csrw, csrrw Richard Henderson
  • Re: [PATCH alternate 1/2] target/riscv: Update pc before csrw, csrrw Daniel Henrique Barboza
  • Re: [PATCH alternate 0/2] target/riscv: Fix write_misa vs aligned next_pc Philippe Mathieu-Daudé
  • Re: [PATCH alternate 0/2] target/riscv: Fix write_misa vs aligned next_pc Daniel Henrique Barboza
• Re: [PATCH 09/21] hw/misc: Add dummy ZYNQ DDR controller Edgar E. Iglesias
• Re: [PATCH 08/21] hw/dma/zynq-devcfg: Fix register memory Edgar E. Iglesias
• Re: [PATCH 05/21] hw/dma/zynq: Notify devcfg on FPGA reset via SLCR control Edgar E. Iglesias
• Re: [PATCH 4/4] qemu-img: improve queue depth validation in img_bench Kevin Wolf
• Re: [PATCH 3/4] qemu-img: prevent stack overflow in bench by using bottom half Kevin Wolf
• Re: [PATCH 2/4] qemu-img: fix offset calculation in bench Kevin Wolf
• [PATCH v3 0/9] target/riscv/kvm: CSR related fixes Daniel Henrique Barboza
  • [PATCH v3 3/9] target/riscv/kvm: turn u32/u64 reg functions into macros Daniel Henrique Barboza
  • Re: [PATCH v3 3/9] target/riscv/kvm: turn u32/u64 reg functions into macros Alistair Francis
  • [PATCH v3 4/9] target/riscv/kvm: turn kvm_riscv_reg_id_ulong() into a macro Daniel Henrique Barboza
  • Re: [PATCH v3 4/9] target/riscv/kvm: turn kvm_riscv_reg_id_ulong() into a macro Alistair Francis
  • [PATCH v3 9/9] target/riscv/kvm: add scounteren CSR Daniel Henrique Barboza
  • [PATCH v3 7/9] target/riscv/kvm: add senvcfg CSR Daniel Henrique Barboza
  • [PATCH v3 5/9] target/riscv/kvm: add kvm_csr_cfgs[] Daniel Henrique Barboza

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