On 3 April 2013 05:33, Peter Crosthwaite <peter.crosthwa...@xilinx.com> wrote:
> The QSPI controller was using byte-wide stripes when striping across
> the two flashes in dual parallel mode. The real hardware however uses
> individual bit striping. QEMU misbehaves in the (corner) case where
> data is written/read in dual-parallel mode and read/written back in
> single mode.
>
> Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com>
> ---
>
> hw/xilinx_spips.c | 74
> ++++++++++++++++++++++++++++++++++++++---------------
> 1 files changed, 53 insertions(+), 21 deletions(-)
>
> diff --git a/hw/xilinx_spips.c b/hw/xilinx_spips.c
> index a2019e4..43ce2d8 100644
> --- a/hw/xilinx_spips.c
> +++ b/hw/xilinx_spips.c
> @@ -258,35 +258,67 @@ static void xilinx_spips_reset(DeviceState *d)
> xilinx_spips_update_cs_lines(s);
> }
>
> +static inline void stripe8(uint8_t *x, int num, bool dir)
> +{
> + uint8_t r[num];
> + memset(r, 0, sizeof(uint8_t) * num);
Don't interleave code and variable definitions, please.
> + int idx[2] = {0, 0};
> + int bit[2] = {0, 0};
> + int d = dir;
> +
> + for (idx[0] = 0; idx[0] < num; ++idx[0]) {
> + for (bit[0] = 0; bit[0] < 8; ++bit[0]) {
> + r[idx[d]] |= x[idx[!d]] & 1 << bit[!d] ? 1 << bit[d] : 0;
> + idx[1] = (idx[1] + 1) % num;
> + if (!idx[1]) {
> + bit[1]++;
> + }
> + }
> + }
> + memcpy(x, r, sizeof(uint8_t) * num);
> +}
This function could really use a comment saying what it's doing...
thanks
-- PMM
