Implement the automatic CS control feature. If the MANUAL_CS bit is cleared then the chip select stay de-asserted as long as the tx FIFO is empty.
Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> --- hw/xilinx_spips.c | 12 +++++++++--- 1 files changed, 9 insertions(+), 3 deletions(-) diff --git a/hw/xilinx_spips.c b/hw/xilinx_spips.c index f7d942e..16c2e1d 100644 --- a/hw/xilinx_spips.c +++ b/hw/xilinx_spips.c @@ -177,6 +177,12 @@ static inline int num_effective_busses(XilinxSPIPS *s) s->regs[R_LQSPI_CFG] & LQSPI_CFG_TWO_MEM) ? s->num_busses : 1; } +static inline bool xilinx_spips_cs_is_set(XilinxSPIPS *s, int i, int field) +{ + return ~field & (1 << i) && (s->regs[R_CONFIG] & MANUAL_CS + || !fifo8_is_empty(&s->tx_fifo)); +} + static void xilinx_spips_update_cs_lines(XilinxSPIPS *s) { int i, j; @@ -189,14 +195,14 @@ static void xilinx_spips_update_cs_lines(XilinxSPIPS *s) int cs_to_set = (j * s->num_cs + i + upage) % (s->num_cs * s->num_busses); - if (~field & (1 << i) && !found) { + if (xilinx_spips_cs_is_set(s, i, field) && !found) { DB_PRINT("selecting slave %d\n", i); qemu_set_irq(s->cs_lines[cs_to_set], 0); } else { qemu_set_irq(s->cs_lines[cs_to_set], 1); } } - if (~field & (1 << i)) { + if (xilinx_spips_cs_is_set(s, i, field)) { found = true; } } @@ -487,7 +493,7 @@ lqspi_read(void *opaque, hwaddr addr, unsigned int size) fifo8_reset(&s->rx_fifo); s->regs[R_CONFIG] &= ~CS; - s->regs[R_CONFIG] |= (~(1 << slave) << CS_SHIFT) & CS; + s->regs[R_CONFIG] |= ((~(1 << slave) << CS_SHIFT) & CS) | MANUAL_CS; xilinx_spips_update_cs_lines(s); /* instruction */ -- 1.7.0.4