Hi Florian, Thanks so much for your ideas. I will look into config.in Monday. Also, thanks for letting me know there are no known good R3k ports. So I guess I will be the first. Let's hear it for the pioneers. ( You can tell a pioneer from the arrows in his back :) ).
I am pretty sure my MIPS and DDR are OK. They run live stuff on the web (as the mlite project on opencores.org). I am not the mlite author, but have been working on an FPGA product design for some time and corresponding with Steve, mlite's author. Right now I have 2 x MIPS, 1 picoblaze and 1 "FastPIC" all running at the same time in the Spartan 3E Starter kit. Steve is serving web pages from his Starter Kit. So I am pretty sure that the MIPS and DDR work OK. Also, my own tests and running programs indicate that things OK. For example, I can run my debugger in the "main" mips using the first 3E serial port and simultaneously run a copy of my debugger in the "DDR" MIPS using the other 3E serial port. These connect to ttyS0 and ttyS1 of my Linux box. I run two copies of minicom, so I can see both ports at once. When I download OpenWRT into the 2nd MIPS I can watch the load pointers from the "main" MIPS. All this in real time :). . I can modify the code of the 2nd MIPS as it is running from the 1st MIPS. I can modify the PicoBlaze program and the FastPIC programs in real time as well. It makes code development quick, painless and fun. Its all working pretty well :). Maybe this product idea will actually get all the way to hardware ? The "main" MIPS runs my debugger. It has access to one port of the dual port block rams. So from the "main" MIPS I can reset and restart the 2nd MIPS which has 64MB of DDR on it. I can actually watch it run real-time. Pretty neat. I can seperately reset and restart the DDR, so I am pretty sure that is all OK too. I can also reset and reload the other processors. The FastPIC is my own design (based on opencores stuff). It runs at 100mhz and I am planning to use it for a software based network interface, eliminating many chips from my final product :). Thanks again to you all the other fine OpenWRT folks. wiz On Sun, 23 Mar 2008, Florian Fainelli wrote: > Hi Wiz > > Le dimanche 23 mars 2008, RHS Linux User a écrit : > > From what I can tell, however, the kernel and modules are not (from > > what I can tell) being compiled for MIPS1 but rather for MIPS32? This MAY > > be the reason I have yet to see any boot up serial output? I have yet to > > find the right place to modify in the build tree to get MIPS1 kernel and > > module compilation? Suggestions please.... > > If your kernel is correctly compiled for MIPS-1, you should be able to see it > running on your FPGA. Are you sure the IP cores (UART, DDRAM ...) are working > fine ? Most of the time problems come from here, but I am sure you did > validate all the cores. > > From the OpenWrt perspective, if you did change the CFLAGS to match the > MIPS-1 > instruction set in toolchain/Config.in when selecting your architecture, > those CFLAGS will be passed to the kernel and so will the modules be compiled > with. > > > > > I would GREATLY appreciate any other suggestions any of you might have > > as to how you did your port, etc. Maybe there is another version that is > > already known to run on R3000? This would, I suspect, make my port MUCH > > easier. > > There is currently no OpenWrt port on the MIPS R3K architecture. > -- > Best regards, Florian Fainelli > Email : [EMAIL PROTECTED] > http://openwrt.org > ------------------------------- >
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