On Friday 29 January 2010, Matthew Fletcher wrote: > >Are you testing on a chip with an ICE that > >does hardware stepping? > > Its a phillips/NXP LPC2292, it does have EmbeddedICE but im > not 100% sure in what mode of operation i've got it.
So it's an ARM7TDMI. Those don't have the hardware stepping support. Your Thumb single stepping is going to be figuring out where the next instruction (or statement) starts, then setting a breakpoint there. Since it's ARM7TDMI it doesn't have the BKPT instruction; it'll use a hardware breakpoint. The Thumb single stepping bugfixes I recall were mostly in that "where will the next instruction's address be?" logic. (OpenOCD uses a small instruction set "simulator".) Hardware stepping is a different mechanism than setting a breakpoint before the next instruction ... the debugger can actually tell the hardware "run just one instruction!" before it resumes execution, and that's what the hardware does. ARM9TDMI has it, as do some ARM9E-S parts (rev 1). ARMv6-M and ARMv7-M chips have it. Higher end parts (ARM11, Cortex-A, ARM9E-S rev2) seem not to have it; pipeline issues, I'd guess. Some can set breakpoints on instruction address mismatch, which acts like hardware single-step except in cases like loop-to-self instructions or returning from some recursive subroutines. - Dave _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
