>> There appears to be a certain amount of rot in the amt_jtagaccel driver, > >That was my conclusion when I noticed, not long ago, that >it wouldn't even *build* with PPDEV enabled ... an issue >that's been around for quite some time.
I can post a patch for review of some of the fixups i've done so far, but i think amt_jtagaccel / common_arm7-9 needs some attention as stepping in arm thumb mode seems to cause invalid instruction traps and is generally pretty unstable. >Those unexpected IDCODE message, like > >> Warn : Unexpected idcode after end of chain: 320 0x8000007f > >are frequently caused by clocking problems. The correct >values would be 0x000000ff ... a one-bit shift of what >is actually reported. Getting the scope out showed that the jtag clock lines RTCK/TCK were not showing anything, dropping the speed down to 500khz and then letting the RTCK be the master clock seemed to fix these. Ended up hacking the code to do this as the driver code was easier to understand than the option parsing ! - Matthew ********************************************************************** Serck Controls Ltd, Rowley Drive, Coventry, CV3 4FH, UK A company registered in England Reg. No. 4353634 Tel: +44 (0) 24 7630 5050 Fax: +44 (0) 24 7630 2437 Web: www.serck-controls.com Admin: p...@serck-controls.co.uk A subsidiary of Serck Controls Pty. Ltd. ********************************************************************** This email and files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error please notify the above. Any views or opinions presented are those of the author and do not necessarily represent those of Serck Controls Ltd. This message has been scanned for malware by Mailcontrol. www.Mailcontrol.com _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
