David Brownell wrote: > On Monday 11 January 2010, Thomas Kindler wrote: >> Joseph Yiu suggested this code to cause a hard-fault: >> >> __asm( >> "movs r0, #1 \t\n" // unaligned .. >> "ldm r0, {r1-r2} \t\n" // .. load-multiple >> "bx lr \t\n" >> ); >> >> (see http://www.st.com/mcu/forums-cat-6778-23.html) > > Doesn't that presume escalation to a HardFault because > you didn't enable UsageFault in SHCSR, and the system > handler priority registers cooperate? > > Not everyone uses that escalation logic. But if it > works in your test cases, great. :)
Well, I only have to switch off PWM outputs in case of any error -- the exact cause doesn't matter so much at the moment ;) > My own runtime code enables all faults, so that if I > override the default loop-to-self handler (by just > providing a non-weak symbol) it will always kick in. I tried that, also. But as I understand, the HardFault handler can be used to find out the exact cause of the escalated fault anyways. So I can have all my exception handling code in one place. _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development