Hi,
attached (because of a buggy mailer not inline) is a patch that adds basic
support for XScale/PXA3xx. Tested on PXA320 CPU.
Please consider applying. Thanks.
Signed-off-by: Marek Vasut <marek.va...@gmail.com>
From f4653c4af3c5fc093f9df69b7d0d16843c221d0d Mon Sep 17 00:00:00 2001
From: Marek Vasut <marek.va...@gmail.com>
Date: Sun, 29 Nov 2009 03:04:27 +0100
Subject: [PATCH] Add initial PXA3xx support
---
src/target/xscale.c | 31 +++++++++++++++++++++----------
src/target/xscale.h | 4 ++++
2 files changed, 25 insertions(+), 10 deletions(-)
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 49653a9..5772284 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -70,6 +70,13 @@ static int xscale_set_watchpoint(struct target *, struct watchpoint *);
static int xscale_unset_breakpoint(struct target *, struct breakpoint *);
static int xscale_read_trace(struct target *);
+/* This variable determines which CPU we are connecting to.
+ *
+ * Possible values are:
+ * 0 - For PXA2xx and IXP4xx (default).
+ * 4 - For PXA3xx, which has JTAG Instructions shifted by four to left.
+ */
+static int xscale_version = XSCALE_IXP4XX_PXA2XX;
/* This XScale "debug handler" is loaded into the processor's
* mini-ICache, which is 2K of code writable only via JTAG.
@@ -191,7 +198,7 @@ static int xscale_read_dcsr(struct target *target)
uint8_t field2_check_mask = 0x1;
jtag_set_end_state(TAP_DRPAUSE);
- xscale_jtag_set_instr(target->tap, XSCALE_SELDCSR);
+ xscale_jtag_set_instr(target->tap, XSCALE_SELDCSR << xscale_version);
buf_set_u32(&field0, 1, 1, xscale->hold_rst);
buf_set_u32(&field0, 2, 1, xscale->external_debug_break);
@@ -289,7 +296,7 @@ static int xscale_receive(struct target *target, uint32_t *buffer, int num_words
fields[2].check_mask = &field2_check_mask;
jtag_set_end_state(TAP_IDLE);
- xscale_jtag_set_instr(target->tap, XSCALE_DBGTX);
+ xscale_jtag_set_instr(target->tap, XSCALE_DBGTX << xscale_version);
jtag_add_runtest(1, jtag_get_end_state()); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */
/* repeat until all words have been collected */
@@ -371,7 +378,7 @@ static int xscale_read_tx(struct target *target, int consume)
jtag_set_end_state(TAP_IDLE);
- xscale_jtag_set_instr(target->tap, XSCALE_DBGTX);
+ xscale_jtag_set_instr(target->tap, XSCALE_DBGTX << xscale_version);
path[0] = TAP_DRSELECT;
path[1] = TAP_DRCAPTURE;
@@ -469,7 +476,7 @@ static int xscale_write_rx(struct target *target)
jtag_set_end_state(TAP_IDLE);
- xscale_jtag_set_instr(target->tap, XSCALE_DBGRX);
+ xscale_jtag_set_instr(target->tap, XSCALE_DBGRX << xscale_version);
memset(&fields, 0, sizeof fields);
@@ -548,7 +555,7 @@ static int xscale_send(struct target *target, uint8_t *buffer, int count, int si
jtag_set_end_state(TAP_IDLE);
- xscale_jtag_set_instr(target->tap, XSCALE_DBGRX);
+ xscale_jtag_set_instr(target->tap, XSCALE_DBGRX << xscale_version);
bits[0]=3;
t[0]=0;
@@ -629,7 +636,7 @@ static int xscale_write_dcsr(struct target *target, int hold_rst, int ext_dbg_br
xscale->external_debug_break = ext_dbg_brk;
jtag_set_end_state(TAP_IDLE);
- xscale_jtag_set_instr(target->tap, XSCALE_SELDCSR);
+ xscale_jtag_set_instr(target->tap, XSCALE_SELDCSR << xscale_version);
buf_set_u32(&field0, 1, 1, xscale->hold_rst);
buf_set_u32(&field0, 2, 1, xscale->external_debug_break);
@@ -692,7 +699,7 @@ static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8]
/* LDIC into IR */
jtag_set_end_state(TAP_IDLE);
- xscale_jtag_set_instr(target->tap, XSCALE_LDIC);
+ xscale_jtag_set_instr(target->tap, XSCALE_LDIC << xscale_version);
/* CMD is b011 to load a cacheline into the Mini ICache.
* Loading into the main ICache is deprecated, and unused.
@@ -743,7 +750,7 @@ static int xscale_invalidate_ic_line(struct target *target, uint32_t va)
struct scan_field fields[2];
jtag_set_end_state(TAP_IDLE);
- xscale_jtag_set_instr(target->tap, XSCALE_LDIC);
+ xscale_jtag_set_instr(target->tap, XSCALE_LDIC << xscale_version);
/* CMD for invalidate IC line b000, bits [6:4] b000 */
buf_set_u32(&cmd, 0, 6, 0x0);
@@ -1479,7 +1486,7 @@ static int xscale_assert_reset(struct target *target)
* end up in T-L-R, which would reset JTAG
*/
jtag_set_end_state(TAP_IDLE);
- xscale_jtag_set_instr(target->tap, XSCALE_SELDCSR);
+ xscale_jtag_set_instr(target->tap, XSCALE_SELDCSR << xscale_version);
/* set Hold reset, Halt mode and Trap Reset */
buf_set_u32(xscale->reg_cache->reg_list[XSCALE_DCSR].value, 30, 1, 0x1);
@@ -2882,6 +2889,7 @@ static int xscale_init_arch_info(struct target *target,
/* we don't really *need* variant info ... */
if (variant) {
int ir_length = 0;
+ xscale_version = XSCALE_IXP4XX_PXA2XX; /* PXA2xx and IXP4xx */
if (strcmp(variant, "pxa250") == 0
|| strcmp(variant, "pxa255") == 0
@@ -2892,7 +2900,10 @@ static int xscale_init_arch_info(struct target *target,
|| strcmp(variant, "ixp45x") == 0
|| strcmp(variant, "ixp46x") == 0)
ir_length = 7;
- else
+ else if (strcmp(variant, "pxa3xx") == 0) {
+ ir_length = 11;
+ xscale_version = XSCALE_PXA3XX; /* PXA3xx */
+ } else
LOG_WARNING("%s: unrecognized variant %s",
tap->dotted_name, variant);
diff --git a/src/target/xscale.h b/src/target/xscale.h
index 4f1b54d..e0648fe 100644
--- a/src/target/xscale.h
+++ b/src/target/xscale.h
@@ -37,6 +37,10 @@
#define XSCALE_LDIC 0x07
#define XSCALE_SELDCSR 0x09
+/* Possible CPU types */
+#define XSCALE_IXP4XX_PXA2XX 0x0
+#define XSCALE_PXA3XX 0x4
+
enum xscale_debug_reason
{
XSCALE_DBG_REASON_GENERIC,
--
1.6.5
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