On Sunday 01 November 2009, Freddie Chopin wrote:
> David Brownell pisze:
> > With "this" being the warning about "-irmask 1" ... since
> > you have that particular hardware, you can test to see if
> > the config files even need to include those two optional
> > parameters for those TAPs.
> 
> I thought it was more complicated than "trial & error"

In this case the point was just to establish that the chip
didn't violate the JTAG spec so much that it couldn't use
the defaults.

If you wanted to be fancier, you can look at BSDL files, but
not all manufacturers publish them.  STM does; and I'm not
surprised, they went to the effort of providing a separate TAP
for boundary scan, they'd be unlikely not to finish the job!
(And also: unlikely to violate the JTAB specs for that TAP.)

One of the several dozen STM32 BSDL files has a chunk like:

  -- Specifies the bit pattern that is loaded into the
  -- instruction register when the TAP controller passes
  -- through the Capture-IR state. The standard mandates
  -- that the two LSBs must be "01". The remaining bits
  -- are design specific.
  attribute INSTRUCTION_CAPTURE of STM32F101VB: entity is "00001";

which explains what's going on ... and says that not only does
this conform to the JTAG standard, but that it specifies the
upper three bits are zeroes.  "XXX01" would mean it uses them
for its own purposes.  Maybe one of the other BSDL Files doesn't
define those bits ... I'm unwilling to check.  Maybe this could
have used "-irmask 0x1f" if no other STM32 ever uses "XXX01"
(now or in the future).


> 
> > And if they don't ... you know how to submit patches.  :)
> 
> Creating patches is simple, but other things in git are not [;

It's still easy to work on top of git without committing patches
to your own repository; that simplifies things.  Lots of folk use
quilt and don't use more of git than clone/pull/diff.


> See the attachment.

Thanks.  I merged it with a minor tweak.

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