On Thursday 29 October 2009, Freddie Chopin wrote: > 2. When using stm32.cfg OpenOCD says (beside the above): > > > Warn : stm32.bs: nonstandard IR mask > > which is because of > > > jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 > > -expected-id $_BSTAPID1 -expected-id $_BSTAPID2 -expected-id > > $_BSTAPID3 -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 > > The warning pops up when the last two bits of irmask are not set (tcl.c) > , but I don't know what the "standard" value should be. There are other > script files that have 1 as irmask.
A fully standard chip can just strike "-ircapture ..." and "-irmask ..." parameters to "jtag newtap". The deal is: JTAG specifies that IRCAPTURE loads the shift register with some value that has the two LSBs with value 0b01. So that is (now) the default. But ... (a) there are chips that don't conform to JTAG, where those LSBs have a different value. And (b) there are also chips (like many ARM cores) which specify the MSBs (e.g. on ARMs, often as zeroes). Though of course most are (c) conformant. So the "-ircapture" and "-irmask" values should not normally be needed. But you should check against each chip to make sure it's not in the (a) category. Looks like you can fix this for the LPC2103 and STM32 chips... _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
