On Mon, Oct 26, 2009 at 11:02 PM, David Brownell <davi...@pacbell.net> wrote: > On Monday 26 October 2009, Yegor Yefremov wrote: >> What about making a common target file for the whole 6000 series? > > You could have a common target for all current Stellaris > chips, for that matter... just make sure you include both > Cortex-M3 TAP identifiers, v3 for r1p1 and v3 for r2p0. > > Some of those config files are goofy. All that should be > part of the chip spec is declarations of the TAP, CPU, > flash, and SRAM work area.
@David: I just tried the lm3s6xxx.cfg for LM3S811 and it is functioning. The only problem I saw was with IDCODE. LM3S811's revision is 2 and not 3 as assumed in tcl/target/lm3s811.cfg or lm3s6xxx.cfg, so I get these warnigs/errors: JTAG tap: lm3sxxxx.cpu tap/device found: 0x2ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x2) JTAG tap: lm3sxxxx.cpu UNEXPECTED: 0x2ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x2) JTAG tap: lm3sxxxx.cpu expected 1 of 1: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) Trying to use configured scan chain anyway... Bypassing JTAG setup events due to errors In the data sheets for all lm3s811 revisions only version 1 is described. What to do with the stuff? Can revision number be made "don't care" or for info purpose only, if it really has no impact on the function? @Joe: do you have access to various CPUs? So you could test one or two from all series with the lm3s6xxx.cfg. I only have access to lm3s811 and lm3s6432 chips. And I use lm3s811 board as JTAG device. Regards, Yegor _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
