>> I talked to Abatron and they said I have to buy a new firmware for
>> that CPU family (till now we had only ARM7/ARM9 CPUs). So I'll try
>> bundled software for Windows and then try to port my CPU to OpenOCD.
>>
>
> Ah - in that case, a config file will not help, you need the new BDI
> firmware first. IIRC, Cortex support is in the ARM11 version.
I've looked through the lm3s* target files and found out that they all
are almost the same. I took lm3s6965.cfg and could talk to LM3S6432
without a problem. What about making a common target file for the
whole 6000 series?
Regards,
Yegor
Index: openocd/tcl/target/lm3s6xxx.cfg
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ openocd/tcl/target/lm3s6xxx.cfg 2009-10-26 12:39:28.000000000 +0100
@@ -0,0 +1,39 @@
+# TI/Luminary Stellaris lm3s6xxx
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME lm3s6xxx
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x3ba00477
+}
+
+# jtag speed
+jtag_khz 500
+
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+#LM3S6xxx Evaluation Board has only srst
+reset_config srst_only
+
+#jtag scan chain
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf
-expected-id $_CPUTAPID
+
+# the luminary variant causes a software reset rather than asserting SRST
+# this stops the debug registers from being cleared
+# this will be fixed in later revisions of silicon
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu
-variant lm3s
+
+# 8k working area at base of ram, not backed up
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
+
+#flash configuration
+flash bank stellaris 0 0 0 0 $_TARGETNAME
+
+
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