Øyvind Harboe wrote:
> Patch? :-)
>
> I'd like to take those changes for a spin.
>
>
>
Im not sure about current path practices, but here is a svn diff from trunk
Regards
Magnus
[lundin trunk 23:17:58]$svn diff
Index: src/target/cortex_swjdp.c
===================================================================
--- src/target/cortex_swjdp.c (revision 1435)
+++ src/target/cortex_swjdp.c (working copy)
@@ -191,10 +191,12 @@
https://lists.berlios.de/pipermail/openocd-development/2008-September/003107.html
*/
+/*
if ((retval=jtag_execute_queue())!=ERROR_OK)
{
LOG_ERROR("BUG: Why does this fail the first time????");
}
+*/
/* Why??? second time it works??? */
scan_inout_check_u32(swjdp, SWJDP_IR_DPACC, DP_CTRL_STAT,
DPAP_READ, 0, &ctrlstat);
if ((retval=jtag_execute_queue())!=ERROR_OK)
@@ -925,7 +927,7 @@
/* because the DCB_DCRDR is used for the emulated dcc channel
* we gave to save/restore the DCB_DCRDR when used */
- ahbap_read_system_atomic_u32(swjdp, DCB_DCRDR, &dcrdr);
+ ahbap_read_system_u32(swjdp, DCB_DCRDR, &dcrdr);
swjdp->trans_mode = TRANS_MODE_COMPOSITE;
@@ -937,8 +939,8 @@
ahbap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_OFF,
DCB_DCRDR & 0xFFFFFFF0);
ahbap_read_reg_u32(swjdp, AHBAP_BD0 | (DCB_DCRDR & 0xC), value );
+ ahbap_write_system_u32(swjdp, DCB_DCRDR, dcrdr);
retval = swjdp_transaction_endcheck(swjdp);
- ahbap_write_system_atomic_u32(swjdp, DCB_DCRDR, dcrdr);
return retval;
}
@@ -950,7 +952,7 @@
/* because the DCB_DCRDR is used for the emulated dcc channel
* we gave to save/restore the DCB_DCRDR when used */
- ahbap_read_system_atomic_u32(swjdp, DCB_DCRDR, &dcrdr);
+ ahbap_read_system_u32(swjdp, DCB_DCRDR, &dcrdr);
swjdp->trans_mode = TRANS_MODE_COMPOSITE;
@@ -962,8 +964,8 @@
ahbap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_OFF,
DCB_DCRSR & 0xFFFFFFF0);
ahbap_write_reg_u32(swjdp, AHBAP_BD0 | (DCB_DCRSR & 0xC), regnum |
DCRSR_WnR );
+ ahbap_write_system_u32(swjdp, DCB_DCRDR, dcrdr);
retval = swjdp_transaction_endcheck(swjdp);
- ahbap_write_system_atomic_u32(swjdp, DCB_DCRDR, dcrdr);
return retval;
}
Index: src/flash/stm32x.c
===================================================================
--- src/flash/stm32x.c (revision 1435)
+++ src/flash/stm32x.c (working copy)
@@ -484,7 +484,7 @@
{
stm32x_flash_bank_t *stm32x_info = bank->driver_priv;
target_t *target = bank->target;
- u32 buffer_size = 8192;
+ u32 buffer_size = 16384;
working_area_t *source;
u32 address = bank->base + offset;
reg_param_t reg_params[4];
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