> This works with a configured 72 MHz clock on the target, > in my case from the preprogrammed board test application. > > The performance of the target flash controller is now the main > limiting factor. >
I would commit this aswell, this could also be applied to the arm4_5 target. Currently we save/restore the registers after every algorithm run - during a flash write this could mean multiple runs to complete. I would like to change the scheme so that we save at the start of a flash algorithm and restore when programming is fully complete. Cheers Spen _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
