Enables the BPTC extension on Gen>=7 and adds the necessary format mappings to
get the right surface type value.
---
src/mesa/drivers/dri/i965/brw_surface_formats.c | 5 +++++
src/mesa/drivers/dri/i965/intel_extensions.c | 2 ++
2 files changed, 7 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c
b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index 41f4221..974f2df 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -487,6 +487,11 @@ brw_format_for_mesa_format(mesa_format mesa_format)
[MESA_FORMAT_ETC2_RGB8_PUNCHTHROUGH_ALPHA1] =
BRW_SURFACEFORMAT_ETC2_RGB8_PTA,
[MESA_FORMAT_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1] =
BRW_SURFACEFORMAT_ETC2_SRGB8_PTA,
+ [MESA_FORMAT_BPTC_RGBA_UNORM] = BRW_SURFACEFORMAT_BC7_UNORM,
+ [MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM] = BRW_SURFACEFORMAT_BC7_UNORM_SRGB,
+ [MESA_FORMAT_BPTC_RGB_SIGNED_FLOAT] = BRW_SURFACEFORMAT_BC6H_SF16,
+ [MESA_FORMAT_BPTC_RGB_UNSIGNED_FLOAT] = BRW_SURFACEFORMAT_BC6H_UF16,
+
[MESA_FORMAT_A_SNORM8] = 0,
[MESA_FORMAT_L_SNORM8] = 0,
[MESA_FORMAT_L8A8_SNORM] = 0,
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index 4ee8636..b14b9c7 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -302,6 +302,8 @@ intelInitExtensions(struct gl_context *ctx)
ctx->Extensions.ARB_viewport_array = true;
ctx->Extensions.AMD_vertex_shader_viewport_index = true;
}
+
+ ctx->Extensions.ARB_texture_compression_bptc = true;
}
if (brw->gen >= 8) {
--
1.9.3
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