As is evident from patches like this, this series is nowhere near ready for
upstream. There's quite a bit of clean up work to do before it will be
really ready to merge. I've been working on trying to clean up Francisco's
original branch and sent out the first 19 ready-for-upstream patches on
Friday: https://patchwork.freedesktop.org/series/43450/ I intend to send
more later this week once I get a couple of GPU hangs sorted out.
--Jason
On Sun, May 20, 2018 at 8:29 PM, Shaofeng Tang <shaofeng.t...@intel.com>
wrote:
> From: Kevin Rogovin <kevin.rogo...@intel.com>
>
> Change-Id: Ic5948415e0b4d6799b6a88ac507c1999ccb1df39
> ---
> src/intel/compiler/brw_fs.cpp | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
> index 121f9f8..b089b79 100644
> --- a/src/intel/compiler/brw_fs.cpp
> +++ b/src/intel/compiler/brw_fs.cpp
> @@ -3349,7 +3349,11 @@ fs_visitor::emit_repclear_shader()
>
> assign_constant_locations();
> assign_curb_setup();
> - allocate_registers(16, false);
> + /* WARNING: the original SIMD32 series has this line added, in patch
> + * "i965/fs: Rework FB write header setup for SIMD32 and better
> scheduling."
> + * but giving this line makes bad things happen later.
> + */
> + // allocate_registers(16, false);
>
> /* Now that we have the uniform assigned, go ahead and force it to a
> vec4. */
> if (uniforms > 0) {
> --
> 2.7.4
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
