It returns an isl_format, not uint32_t BRW_FORMAT.
I updated every brw_isl_format_for_mesa_format() found by git-grep.
No change in behavior.
---
src/mesa/drivers/dri/i965/brw_context.c | 5 +++--
src/mesa/drivers/dri/i965/brw_state.h | 3 +--
src/mesa/drivers/dri/i965/brw_surface_formats.c | 13 ++++++++-----
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 8 ++++----
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ++--
5 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 3e3fe2d..f2a7f61 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -205,9 +205,10 @@ intel_texture_view_requires_resolve(struct brw_context
*brw,
!intel_miptree_is_lossless_compressed(brw, intel_tex->mt))
return false;
- const uint32_t brw_format =
brw_isl_format_for_mesa_format(intel_tex->_Format);
+ const enum isl_format format =
+ brw_isl_format_for_mesa_format(intel_tex->_Format);
- if (isl_format_supports_ccs_e(&brw->screen->devinfo, brw_format))
+ if (isl_format_supports_ccs_e(&brw->screen->devinfo, format))
return false;
perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
index bec7b03..cb341f0 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -205,8 +205,7 @@ uint32_t brw_state_batch_size(struct brw_context *brw,
uint32_t offset);
void gen4_init_vtable_surface_functions(struct brw_context *brw);
uint32_t brw_get_surface_tiling_bits(uint32_t tiling);
uint32_t brw_get_surface_num_multisamples(unsigned num_samples);
-
-uint32_t brw_isl_format_for_mesa_format(mesa_format mesa_format);
+enum isl_format brw_isl_format_for_mesa_format(mesa_format mesa_format);
GLuint translate_tex_target(GLenum target);
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c
b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index b176a21..f482f22 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -28,7 +28,7 @@
#include "brw_state.h"
#include "brw_defines.h"
-uint32_t
+enum isl_format
brw_isl_format_for_mesa_format(mesa_format mesa_format)
{
/* This table is ordered according to the enum ordering in formats.h. We do
@@ -300,7 +300,7 @@ brw_init_surface_formats(struct brw_context *brw)
gen += 5;
for (format = MESA_FORMAT_NONE + 1; format < MESA_FORMAT_COUNT; format++) {
- uint32_t texture, render;
+ enum isl_format texture, render;
bool is_integer = _mesa_is_format_integer_color(format);
render = texture = brw_isl_format_for_mesa_format(format);
@@ -376,6 +376,8 @@ brw_init_surface_formats(struct brw_context *brw)
case ISL_FORMAT_R8G8B8X8_UNORM_SRGB:
render = ISL_FORMAT_R8G8B8A8_UNORM_SRGB;
break;
+ default:
+ break;
}
/* Note that GL_EXT_texture_integer says that blending doesn't occur for
@@ -555,7 +557,8 @@ translate_tex_format(struct brw_context *brw,
case MESA_FORMAT_RGBA_ASTC_10x10:
case MESA_FORMAT_RGBA_ASTC_12x10:
case MESA_FORMAT_RGBA_ASTC_12x12: {
- GLuint brw_fmt = brw_isl_format_for_mesa_format(mesa_format);
+ enum isl_format isl_fmt =
+ brw_isl_format_for_mesa_format(mesa_format);
/**
* It is possible to process these formats using the LDR Profile
@@ -566,9 +569,9 @@ translate_tex_format(struct brw_context *brw,
* processing sRGBs, which are incompatible with this mode.
*/
if (ctx->Extensions.KHR_texture_compression_astc_hdr)
- brw_fmt |= GEN9_SURFACE_ASTC_HDR_FORMAT_BIT;
+ isl_fmt |= GEN9_SURFACE_ASTC_HDR_FORMAT_BIT;
- return brw_fmt;
+ return isl_fmt;
}
default:
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index e019adc..f041d9a 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -686,7 +686,7 @@ brw_update_buffer_texture_surface(struct gl_context *ctx,
uint32_t size = tObj->BufferSize;
struct brw_bo *bo = NULL;
mesa_format format = tObj->_BufferObjectFormat;
- uint32_t brw_format = brw_isl_format_for_mesa_format(format);
+ enum isl_format isl_format = brw_isl_format_for_mesa_format(format);
int texel_size = _mesa_get_format_bytes(format);
if (intel_obj) {
@@ -712,14 +712,14 @@ brw_update_buffer_texture_surface(struct gl_context *ctx,
*/
size = MIN2(size, ctx->Const.MaxTextureBufferSize * (unsigned) texel_size);
- if (brw_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) {
+ if (isl_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) {
_mesa_problem(NULL, "bad format %s for texture buffer\n",
_mesa_get_format_name(format));
}
brw_emit_buffer_surface_state(brw, surf_offset, bo,
tObj->BufferOffset,
- brw_format,
+ isl_format,
size,
texel_size,
false /* rw */);
@@ -1587,7 +1587,7 @@ static uint32_t
get_image_format(struct brw_context *brw, mesa_format format, GLenum access)
{
const struct gen_device_info *devinfo = &brw->screen->devinfo;
- uint32_t hw_format = brw_isl_format_for_mesa_format(format);
+ enum isl_format hw_format = brw_isl_format_for_mesa_format(format);
if (access == GL_WRITE_ONLY) {
return hw_format;
} else if (isl_has_matching_typed_storage_image_format(devinfo, hw_format))
{
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 6acf48e..3a4ba6d 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -209,8 +209,8 @@ intel_miptree_supports_non_msrt_fast_clear(struct
brw_context *brw,
if (brw->gen >= 9) {
mesa_format linear_format = _mesa_get_srgb_format_linear(mt->format);
- const uint32_t brw_format =
brw_isl_format_for_mesa_format(linear_format);
- return isl_format_supports_ccs_e(&brw->screen->devinfo, brw_format);
+ const enum isl_format isl_format =
brw_isl_format_for_mesa_format(linear_format);
+ return isl_format_supports_ccs_e(&brw->screen->devinfo, isl_format);
} else
return true;
}
--
2.9.3
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