From: Marek Olšák <marek.ol...@amd.com>
---
src/amd/addrlib/addrinterface.cpp | 4 ++--
src/amd/addrlib/gfx9/gfx9addrlib.cpp | 10 +++++-----
src/amd/addrlib/gfx9/rbmap.cpp | 10 +++++-----
src/amd/addrlib/r800/egbaddrlib.cpp | 6 +++---
4 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/src/amd/addrlib/addrinterface.cpp
b/src/amd/addrlib/addrinterface.cpp
index 12985fc..6a0c330 100644
--- a/src/amd/addrlib/addrinterface.cpp
+++ b/src/amd/addrlib/addrinterface.cpp
@@ -825,29 +825,29 @@ ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel(
*
****************************************************************************************************
*/
BOOL_32 ADDR_API ElemGetExportNorm(
ADDR_HANDLE hLib, ///< addrlib handle
const ELEM_GETEXPORTNORM_INPUT* pIn) ///< [in] input structure
{
Addr::Lib* pLib = Lib::GetLib(hLib);
BOOL_32 enabled = FALSE;
- ADDR_E_RETURNCODE returnCode = ADDR_OK;
+ //ADDR_E_RETURNCODE returnCode = ADDR_OK;
if (pLib != NULL)
{
enabled = pLib->GetExportNorm(pIn);
}
else
{
- returnCode = ADDR_ERROR;
+ //returnCode = ADDR_ERROR;
}
ADDR_ASSERT(returnCode == ADDR_OK);
return enabled;
}
/**
****************************************************************************************************
* AddrConvertTileInfoToHW
diff --git a/src/amd/addrlib/gfx9/gfx9addrlib.cpp
b/src/amd/addrlib/gfx9/gfx9addrlib.cpp
index c6e2b97..fce0c00 100644
--- a/src/amd/addrlib/gfx9/gfx9addrlib.cpp
+++ b/src/amd/addrlib/gfx9/gfx9addrlib.cpp
@@ -1460,21 +1460,21 @@ VOID Gfx9Lib::GetMetaEquation(
UINT_32 metaBlkWidthLog2, ///< [in] meta block width
UINT_32 metaBlkHeightLog2, ///< [in] meta block height
UINT_32 metaBlkDepthLog2, ///< [in] meta block depth
UINT_32 compBlkWidthLog2, ///< [in] compress block width
UINT_32 compBlkHeightLog2, ///< [in] compress block height
UINT_32 compBlkDepthLog2) ///< [in] compress block depth
const
{
UINT_32 numPipeTotalLog2 =
GetPipeLog2ForMetaAddressing(metaFlag.pipeAligned, swizzleMode);
UINT_32 pipeInterleaveLog2 = m_pipeInterleaveLog2;
- UINT_32 blockSizeLog2 = GetBlockSizeLog2(swizzleMode);
+ //UINT_32 blockSizeLog2 = GetBlockSizeLog2(swizzleMode);
// Get the correct data address and rb equation
CoordEq dataEq;
GetDataEquation(&dataEq, dataSurfaceType, swizzleMode, resourceType,
elementBytesLog2, numSamplesLog2);
// Get pipe and rb equations
CoordEq pipeEquation;
GetPipeEquation(&pipeEquation, &dataEq, pipeInterleaveLog2,
numPipeTotalLog2,
numSamplesLog2, dataSurfaceType, swizzleMode,
resourceType);
@@ -1914,22 +1914,22 @@ UINT_32 Gfx9Lib::HwlGetEquationIndex(
index =
m_equationLookupTable[rsrcTypeIdx][swModeIdx][elementBytesLog2];
if (pMipInfo != NULL)
{
pMipInfo->equationIndex = index;
pMipInfo->mipOffsetXBytes = 0;
pMipInfo->mipOffsetYPixel = 0;
pMipInfo->mipOffsetZPixel = 0;
pMipInfo->postSwizzleOffset = 0;
- static const UINT_32 Prt_Xor_Gap =
- static_cast<UINT_32>(ADDR_SW_64KB_Z_T) -
static_cast<UINT_32>(ADDR_SW_64KB_Z);
+ /*static const UINT_32 Prt_Xor_Gap =
+ static_cast<UINT_32>(ADDR_SW_64KB_Z_T) -
static_cast<UINT_32>(ADDR_SW_64KB_Z);*/
for (UINT_32 i = 1; i < numMipLevels; i++)
{
Dim3d mipStartPos = {0};
UINT_32 mipTailOffset = 0;
mipStartPos = GetMipStartPos(rsrcType,
swMode,
pOut->pitch,
pOut->height,
@@ -2152,21 +2152,21 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeBlock256Equation(
}
else
{
ADDR_ASSERT_ALWAYS();
ret = ADDR_INVALIDPARAMS;
}
// Post validation
if (ret == ADDR_OK)
{
- Dim2d microBlockDim = Block256b[elementBytesLog2];
+ //Dim2d microBlockDim = Block256b[elementBytesLog2];
ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 0)) ==
(microBlockDim.w * (1 << elementBytesLog2)));
ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 1)) ==
microBlockDim.h);
}
return ret;
}
/**
****************************************************************************************************
@@ -2598,21 +2598,21 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeThickEquation(
* Check if a swizzle mode is supported by display engine
*
* @return
* TRUE is swizzle mode is supported by display engine
****************************************************************************************************
*/
BOOL_32 Gfx9Lib::HwlIsValidDisplaySwizzleMode(const
ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const
{
BOOL_32 support = FALSE;
- const AddrResourceType resourceType = pIn->resourceType;
+ //const AddrResourceType resourceType = pIn->resourceType;
const AddrSwizzleMode swizzleMode = pIn->swizzleMode;
if (m_settings.isDce12)
{
switch (swizzleMode)
{
case ADDR_SW_256B_D:
case ADDR_SW_256B_R:
support = (pIn->bpp == 32);
break;
diff --git a/src/amd/addrlib/gfx9/rbmap.cpp b/src/amd/addrlib/gfx9/rbmap.cpp
index 470b9f3..789140d 100644
--- a/src/amd/addrlib/gfx9/rbmap.cpp
+++ b/src/amd/addrlib/gfx9/rbmap.cpp
@@ -40,21 +40,21 @@ RB_MAP::RB_MAP(void)
Initialize();
}
VOID RB_MAP::Get_Comp_Block_Screen_Space( CoordEq& addr, int bytes_log2, int*
w, int* h, int* d)
{
int n, i;
if( w ) *w = 0;
if( h ) *h = 0;
if( d ) *d = 0;
for( n=0; n<bytes_log2; n++ ) { // go up to the bytes_log2 bit
- for( i=0; i<addr[n].getsize(); i++ ) {
+ for( i=0; (unsigned)i<addr[n].getsize(); i++ ) {
char dim = addr[n][i].getdim();
int ord = addr[n][i].getord();
if( w && dim == 'x' && ord >= *w ) *w = ord+1;
if( h && dim == 'y' && ord >= *h ) *h = ord+1;
if( d && dim == 'z' && ord >= *d ) *d = ord+1;
}
}
}
void
@@ -678,21 +678,21 @@ RB_MAP::get_meta_eq( CoordEq& metaaddr,
int xmode,
int data_type,
int meta_alignment, bool meta_linear)
{
// Metaaddressing
Coordinate co;
CoordEq cur_rbeq, pipe_equation, orig_pipe_equation;
bool data_linear = ( data_type == DATA_COLOR1D || data_type ==
DATA_COLOR2D_LINEAR );
bool is_color = ( data_linear || data_type == DATA_COLOR2D || data_type ==
DATA_COLOR3D_S || data_type == DATA_COLOR3D_Z || data_type ==
DATA_COLOR3D_D_NOT_USED );
- bool is3d = ( data_type == DATA_COLOR3D_S || data_type == DATA_COLOR3D_Z
|| data_type == DATA_COLOR3D_D_NOT_USED );
+ //bool is3d = ( data_type == DATA_COLOR3D_S || data_type == DATA_COLOR3D_Z
|| data_type == DATA_COLOR3D_D_NOT_USED );
bool is_thick = ( data_type == DATA_COLOR3D_S || data_type ==
DATA_COLOR3D_Z );
bool is_fmask = (data_type == DATA_FMASK);
bool is_pipe_aligned = (meta_alignment == META_ALIGN_PIPE) ||
(meta_alignment == META_ALIGN_PIPE_RB);
bool is_rb_aligned = (meta_alignment == META_ALIGN_RB) || (meta_alignment
== META_ALIGN_PIPE_RB);
bool is_mipmapped = (max_mip > 0) ? true : false;
int pipe_mask = 0x0;
int comp_frag_log2 = (is_color && (num_samples_log2 > max_comp_frag_log2))
? max_comp_frag_log2 : num_samples_log2;
@@ -926,21 +926,21 @@ RB_MAP::get_meta_eq( CoordEq& metaaddr,
metaaddr.Filter( '=', co );
new_size = metaaddr.getsize();
if( new_size != old_size-1 ) {
// assert warning
}
pipe_equation.remove( co );
for( j=0; j<num_total_rbs_log2; j++ ) {
if( cur_rbeq[j].remove( co ) ) {
// if we actually removed something from this bit, then add
the remaining
// channel bits, as these can be removed for this bit
- for( k=0; k<pipe_equation[i].getsize(); k++ ) {
+ for( k=0; (unsigned)k<pipe_equation[i].getsize(); k++ ) {
if( pipe_equation[i][k] != co ) {
cur_rbeq[j].add( pipe_equation[i][k] );
}
}
// if the rb bit is still empty, then we have to mark all pipe
bits as affecting the RB
if( cur_rbeq[j].getsize() == 0 ) {
pipe_mask = (1 << num_pipes_log2) - 1;
}
}
}
@@ -955,21 +955,21 @@ RB_MAP::get_meta_eq( CoordEq& metaaddr,
old_size = metaaddr.getsize();
metaaddr.Filter( '=', co );
new_size = metaaddr.getsize();
if( new_size != old_size-1 ) {
// assert warning
}
for( j=i+1; j<num_total_rbs_log2; j++ ) {
if( cur_rbeq[j].remove( co ) ) {
// if we actually removed something from this bit, then
add the remaining
// rb bits, as these can be removed for this bit
- for( k=0; k<cur_rbeq[i].getsize(); k++ ) {
+ for( k=0; (unsigned)k<cur_rbeq[i].getsize(); k++ ) {
if( cur_rbeq[i][k] != co ) {
cur_rbeq[j].add( cur_rbeq[i][k] );
}
}
}
}
}
}
// capture the size of the metaaddr
@@ -1065,21 +1065,21 @@ RB_MAP::get_meta_addr_calc( int x, int y, int z, int s,
bool meta_linear
)
{
int bpp_log2 = element_bytes_log2;
int mip_base_x = x_mip_org;
int mip_base_y = y_mip_org;
int mip_base_z = z_mip_org;
CoordEq metaaddr;
- bool se_affinity_enable = false;
+ //bool se_affinity_enable = false;
//int max_pipe_bytes = std::max(1<<num_pipes_log2 *
1<<pipe_interleave_log2, 1024 * 1<<log2_element_bytes);
//int max_banks_samples = std::max(1<<num_banks_log2, 1<<num_samples_log2);
//int block_size_log2 = max(4096, max_pipe_bytes * max_bank_samples *
1<<num_ses_log2);
bool data_linear = ( data_type == DATA_COLOR1D || data_type ==
DATA_COLOR2D_LINEAR );
bool is_color = ( data_linear || data_type == DATA_COLOR2D || data_type ==
DATA_COLOR3D_S || data_type == DATA_COLOR3D_Z || data_type ==
DATA_COLOR3D_D_NOT_USED );
bool is_thick = ( data_type == DATA_COLOR3D_S || data_type ==
DATA_COLOR3D_Z );
bool is_fmask = (data_type == DATA_FMASK);
bool is_pipe_aligned = (meta_alignment == META_ALIGN_PIPE) ||
(meta_alignment == META_ALIGN_PIPE_RB);
diff --git a/src/amd/addrlib/r800/egbaddrlib.cpp
b/src/amd/addrlib/r800/egbaddrlib.cpp
index 0cd27ad..03f3a31 100644
--- a/src/amd/addrlib/r800/egbaddrlib.cpp
+++ b/src/amd/addrlib/r800/egbaddrlib.cpp
@@ -971,21 +971,21 @@ BOOL_32 EgBasedLib::ComputeSurfaceAlignmentsMacroTiled(
* Check if macro-tiled parameters are valid
* @return
* TRUE if valid
****************************************************************************************************
*/
BOOL_32 EgBasedLib::SanityCheckMacroTiled(
ADDR_TILEINFO* pTileInfo ///< [in] macro-tiled parameters
) const
{
BOOL_32 valid = TRUE;
- UINT_32 numPipes = HwlGetPipes(pTileInfo);
+ //UINT_32 numPipes = HwlGetPipes(pTileInfo);
switch (pTileInfo->banks)
{
case 2: //fall through
case 4: //fall through
case 8: //fall through
case 16:
break;
default:
valid = FALSE;
@@ -4741,30 +4741,30 @@ UINT_64 EgBasedLib::HwlGetSizeAdjustmentMicroTiled(
UINT_32 bpp, ///< [in] bits per pixel
ADDR_SURFACE_FLAGS flags, ///< [in] surface flags
UINT_32 numSamples, ///< [in] number of samples
UINT_32 baseAlign, ///< [in] base alignment
UINT_32 pitchAlign, ///< [in] pitch alignment
UINT_32* pPitch, ///< [in,out] pointer to pitch
UINT_32* pHeight ///< [in,out] pointer to height
) const
{
UINT_64 logicalSliceSize;
- UINT_64 physicalSliceSize;
+ //UINT_64 physicalSliceSize;
UINT_32 pitch = *pPitch;
UINT_32 height = *pHeight;
// Logical slice: pitch * height * bpp * numSamples (no 1D MSAA so
actually numSamples == 1)
logicalSliceSize = BITS_TO_BYTES(static_cast<UINT_64>(pitch) * height *
bpp * numSamples);
// Physical slice: multiplied by thickness
- physicalSliceSize = logicalSliceSize * thickness;
+ //physicalSliceSize = logicalSliceSize * thickness;
//
// R800 will always pad physical slice size to baseAlign which is
pipe_interleave_bytes
//
ADDR_ASSERT((physicalSliceSize % baseAlign) == 0);
return logicalSliceSize;
}
/**
--
2.7.4
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