Note that on 3D render path gen >= 6 check is needed even though
one considers BLORP driver state bit (although blorp itsels is
effective only on gen6+). This is because driver state flags are
all set unconditionally in initialization. Compute in turn does
not need the check as it is not available on gen < 6.
Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
---
src/mesa/drivers/dri/i965/brw_compute.c | 2 ++
src/mesa/drivers/dri/i965/brw_context.c | 2 +-
src/mesa/drivers/dri/i965/brw_context.h | 2 ++
src/mesa/drivers/dri/i965/brw_draw.c | 2 ++
src/mesa/drivers/dri/i965/intel_pixel.c | 4 ++++
src/mesa/drivers/dri/i965/intel_pixel_read.c | 2 ++
6 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_compute.c
b/src/mesa/drivers/dri/i965/brw_compute.c
index 16b5df7..081d6e6 100644
--- a/src/mesa/drivers/dri/i965/brw_compute.c
+++ b/src/mesa/drivers/dri/i965/brw_compute.c
@@ -185,6 +185,8 @@ brw_dispatch_compute_common(struct gl_context *ctx)
if (ctx->NewState)
_mesa_update_state(ctx);
+ else if (ctx->NewDriverState & BRW_NEW_BLORP)
+ intel_resolve_and_sync_surfaces(ctx);
brw_validate_textures(brw);
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 75d4920..52f8c17 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -386,7 +386,7 @@ brw_prepare_framebuffer(struct gl_context *ctx)
return flush;
}
-static bool
+bool
intel_resolve_and_sync_surfaces(struct gl_context *ctx)
{
struct brw_context *brw = brw_context(ctx);
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 34aea56..f4305c9 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1226,6 +1226,8 @@ void intel_prepare_render(struct brw_context *brw);
void intel_resolve_for_dri2_flush(struct brw_context *brw,
__DRIdrawable *drawable);
+bool intel_resolve_and_sync_surfaces(struct gl_context *ctc);
+
GLboolean brwCreateContext(gl_api api,
const struct gl_config *mesaVis,
__DRIcontext *driContextPriv,
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index 564739c..6ca6a7a 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -417,6 +417,8 @@ brw_try_draw_prims(struct gl_context *ctx,
if (ctx->NewState)
_mesa_update_state(ctx);
+ else if (brw->gen >= 6 && ctx->NewDriverState & BRW_NEW_BLORP)
+ intel_resolve_and_sync_surfaces(ctx);
/* We have to validate the textures *before* checking for fallbacks;
* otherwise, the software fallback won't be able to rely on the
diff --git a/src/mesa/drivers/dri/i965/intel_pixel.c
b/src/mesa/drivers/dri/i965/intel_pixel.c
index d4f86fd..a5b366a 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel.c
@@ -55,8 +55,12 @@ effective_func(GLenum func, bool src_alpha_is_one)
bool
intel_check_blit_fragment_ops(struct gl_context * ctx, bool src_alpha_is_one)
{
+ struct brw_context *brw = brw_context(ctx);
+
if (ctx->NewState)
_mesa_update_state(ctx);
+ else if (brw->gen >= 6 && ctx->NewDriverState & BRW_NEW_BLORP)
+ intel_resolve_and_sync_surfaces(ctx);
if (ctx->FragmentProgram._Enabled) {
DBG("fallback due to fragment program\n");
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c
b/src/mesa/drivers/dri/i965/intel_pixel_read.c
index 8e5e8d9..9e99a1d 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c
@@ -263,6 +263,8 @@ intelReadPixels(struct gl_context * ctx,
if (ctx->NewState)
_mesa_update_state(ctx);
+ else if (brw->gen >= 6 && ctx->NewDriverState & BRW_NEW_BLORP)
+ intel_resolve_and_sync_surfaces(ctx);
_mesa_readpixels(ctx, x, y, width, height, format, type, pack, pixels);
--
2.5.5
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