[Mesa-dev] [PATCH 10/16] i965: Add end-of-pipe sync before non-gpu read of color resolves

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c  |  8 ++++----
 src/mesa/drivers/dri/i965/intel_tex_image.c    | 10 ++++++++--
 src/mesa/drivers/dri/i965/intel_tex_subimage.c | 11 +++++++++--
 3 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c 
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index b0148d2..49f148c 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2527,10 +2527,10 @@ intel_update_r8stencil(struct brw_context *brw,
 static void *
 intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt)
 {
-   /* CPU accesses to color buffers don't understand fast color clears, so
-    * resolve any pending fast color clears before we map.
-    */
-   intel_miptree_all_slices_resolve_color(brw, mt, 0);
+   if (intel_miptree_all_slices_resolve_color(brw, mt, 0)) {
+      brw_end_of_pipe_sync(brw);
+      brw_render_cache_set_clear(brw);
+   }
 
    drm_intel_bo *bo = mt->bo;
 
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c 
b/src/mesa/drivers/dri/i965/intel_tex_image.c
index 141996f..cff831b 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -521,9 +521,15 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
    }
 
    /* Since we are going to write raw data to the miptree, we need to resolve
-    * any pending fast color clears before we start.
+    * any pending fast color clears before we start. There is no need to
+    * call brw_end_of_pipe_sync() here - drm_intel_bo_references() check below
+    * will trigger if any resolve was needed and intel_batchbuffer_flush()
+    * syncs in the end.
     */
-   intel_miptree_all_slices_resolve_color(brw, image->mt, 0);
+   if (intel_miptree_all_slices_resolve_color(brw, image->mt, 0)) {
+      brw_end_of_pipe_sync(brw);
+      brw_render_cache_set_clear(brw);
+   }
 
    bo = image->mt->bo;
 
diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c 
b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
index b7e52bc..a2db953 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
@@ -36,6 +36,7 @@
 
 #include "brw_context.h"
 #include "intel_batchbuffer.h"
+#include "intel_fbo.h"
 #include "intel_tex.h"
 #include "intel_mipmap_tree.h"
 #include "intel_blit.h"
@@ -137,9 +138,15 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
    }
 
    /* Since we are going to write raw data to the miptree, we need to resolve
-    * any pending fast color clears before we start.
+    * any pending fast color clears before we start. There is no need to
+    * call brw_end_of_pipe_sync() here - drm_intel_bo_references() check below
+    * will trigger if any resolve was needed and intel_batchbuffer_flush()
+    * syncs in the end.
     */
-   intel_miptree_all_slices_resolve_color(brw, image->mt, 0);
+   if (intel_miptree_all_slices_resolve_color(brw, image->mt, 0)) {
+      brw_end_of_pipe_sync(brw);
+      brw_render_cache_set_clear(brw);
+   }
 
    bo = image->mt->bo;
 
-- 
2.5.5

_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev