From: Chad Versace <chad.vers...@intel.com>
- Add field brw_context.state.stencil_region.
- Define dirty bit BRW_NEW_STENCIL_BUFFER, which signals that
brw_context.state.stencil_region has changed.
- Define 'struct brw_tracked_state brw_stencil_buffer' and add it to
gen4_atoms.
Signed-off-by: Chad Versace <chad.vers...@intel.com>
---
src/mesa/drivers/dri/i965/brw_context.h | 5 +++
src/mesa/drivers/dri/i965/brw_misc_state.c | 45 ++++++++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_state.h | 1 +
src/mesa/drivers/dri/i965/brw_state_upload.c | 2 +
src/mesa/drivers/dri/i965/brw_vtbl.c | 1 +
5 files changed, 54 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 26cd820..4e1cb0b 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -146,6 +146,8 @@ struct brw_context;
#define BRW_NEW_INDEX_BUFFER 0x100000
#define BRW_NEW_VS_CONSTBUF 0x200000
#define BRW_NEW_WM_CONSTBUF 0x400000
+/** \see brw_context.state.stencil_region */
+#define BRW_NEW_STENCIL_BUFFER 0x800000
struct brw_state_flags {
/** State update flags signalled by mesa internals */
@@ -482,6 +484,9 @@ struct brw_context
/** \see struct brw_tracked_state brw_depthbuffer */
struct intel_region *depth_region;
+ /** \see struct brw_tracked_state brw_stencil_buffer */
+ struct intel_region *stencil_region;
+
/** \} */
/**
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c
b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 874a1d5..972d6c5 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -326,7 +326,52 @@ const struct brw_tracked_state brw_depthbuffer = {
.emit = emit_depthbuffer,
};
+static void prepare_stencil_buffer(struct brw_context *brw)
+{
+ struct intel_region *region = brw->state.stencil_region;
+
+ if (region != NULL) {
+ /* Separate stencil can only be used when HiZ is enabled. */
+ assert(intel_framebuffer_has_hiz(brw->intel.ctx.DrawBuffer));
+
+ brw_add_validated_bo(brw, region->buffer);
+ }
+}
+
+static void emit_stencil_buffer(struct brw_context *brw)
+{
+ struct intel_context *intel = &brw->intel;
+ struct intel_region *region = brw->state.stencil_region;
+ uint32_t length = 3;
+ uint32_t bias = 2;
+
+ if (region == NULL)
+ return;
+
+ /* Separate stencil can only be used when HiZ is enabled. */
+ assert(intel_framebuffer_has_hiz(brw->intel.ctx.DrawBuffer));
+ BEGIN_BATCH(length);
+ OUT_BATCH((_3DSTATE_STENCIL_BUFFER << 16) | (length - bias));
+ OUT_BATCH(region->pitch * region->cpp - 1);
+ OUT_RELOC(region->buffer,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ 0);
+ ADVANCE_BATCH();
+}
+
+/**
+ * \see brw_context.state.stencil_region
+ */
+const struct brw_tracked_state brw_stencil_buffer = {
+ .dirty = {
+ .mesa = 0,
+ .brw = BRW_NEW_STENCIL_BUFFER | BRW_NEW_BATCH,
+ .cache = 0,
+ },
+ .prepare = prepare_stencil_buffer,
+ .emit = emit_stencil_buffer,
+};
/***********************************************************************
* Polygon stipple packet
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
index 8b9e3a4..55e65a4 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -72,6 +72,7 @@ extern const struct brw_tracked_state brw_sf_prog;
extern const struct brw_tracked_state brw_sf_unit;
extern const struct brw_tracked_state brw_sf_vp;
extern const struct brw_tracked_state brw_state_base_address;
+extern const struct brw_tracked_state brw_stencil_buffer;
extern const struct brw_tracked_state brw_urb_fence;
extern const struct brw_tracked_state brw_vertex_state;
extern const struct brw_tracked_state brw_vs_surfaces;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 008aceb..bc24f75 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -88,6 +88,7 @@ static const struct brw_tracked_state *gen4_atoms[] =
&brw_blend_constant_color,
&brw_depthbuffer,
+ &brw_stencil_buffer,
&brw_polygon_stipple,
&brw_polygon_stipple_offset,
@@ -309,6 +310,7 @@ static struct dirty_bit_map brw_bits[] = {
DEFINE_BIT(BRW_NEW_NR_VS_SURFACES),
DEFINE_BIT(BRW_NEW_VS_CONSTBUF),
DEFINE_BIT(BRW_NEW_WM_CONSTBUF),
+ DEFINE_BIT(BRW_NEW_STENCIL_BUFFER),
{0, 0, 0}
};
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c
b/src/mesa/drivers/dri/i965/brw_vtbl.c
index 4939e97..fc98c92 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -73,6 +73,7 @@ static void brw_destroy_context( struct intel_context *intel )
}
intel_region_release(&brw->state.depth_region);
+ intel_region_release(&brw->state.stencil_region);
dri_bo_release(&brw->curbe.curbe_bo);
dri_bo_release(&brw->vs.prog_bo);
--
1.7.5
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