From: Chad Versace <chad.vers...@intel.com>
Given a format, is_hiz_depth_format() indicates if HiZ can be enabled on
a depthbuffer of that format.
Signed-off-by: Chad Versace <chad.vers...@intel.com>
---
src/mesa/drivers/dri/i915/i915_vtbl.c | 9 +++++++++
src/mesa/drivers/dri/i965/brw_vtbl.c | 11 +++++++++++
src/mesa/drivers/dri/intel/intel_context.h | 4 ++++
3 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c
b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 89650b6..820feba 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -687,6 +687,14 @@ i915_assert_not_dirty( struct intel_context *intel )
(void) dirty;
}
+/** Return false; i915 does not support HiZ. */
+static bool
+i915_is_hiz_depth_format(struct intel_context *intel,
+ gl_format format)
+{
+ return false;
+}
+
void
i915InitVtbl(struct i915_context *i915)
{
@@ -702,4 +710,5 @@ i915InitVtbl(struct i915_context *i915)
i915->intel.vtbl.assert_not_dirty = i915_assert_not_dirty;
i915->intel.vtbl.finish_batch = intel_finish_vb;
i915->intel.vtbl.render_target_supported = i915_render_target_supported;
+ i915->intel.vtbl.is_hiz_depth_format = i915_is_hiz_depth_format;
}
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c
b/src/mesa/drivers/dri/i965/brw_vtbl.c
index f2c417d..4939e97 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -149,6 +149,16 @@ static void brw_invalidate_state( struct intel_context
*intel, GLuint new_state
/* nothing */
}
+/**
+ * \see intel_context.vtbl.is_hiz_depth_format
+ */
+static bool brw_is_hiz_depth_format(struct intel_context *intel,
+ gl_format format)
+{
+ /* In the future this will support other formats such as Z_FLOAT32. */
+ return intel->has_hiz && format == MESA_FORMAT_X8_Z24;
+}
+
void brwInitVtbl( struct brw_context *brw )
{
@@ -165,4 +175,5 @@ void brwInitVtbl( struct brw_context *brw )
brw->intel.vtbl.set_draw_region = brw_set_draw_region;
brw->intel.vtbl.debug_batch = brw_debug_batch;
brw->intel.vtbl.render_target_supported = brw_render_target_supported;
+ brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format;
}
diff --git a/src/mesa/drivers/dri/intel/intel_context.h
b/src/mesa/drivers/dri/intel/intel_context.h
index 629279f..770febe 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -149,6 +149,10 @@ struct intel_context
void (*debug_batch)(struct intel_context *intel);
bool (*render_target_supported)(gl_format format);
+
+ /** Can HiZ be enabled on a depthbuffer of the given format? */
+ bool (*is_hiz_depth_format)(struct intel_context *intel,
+ gl_format format);
} vtbl;
GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */
--
1.7.5
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