From: Chad Versace <chad.vers...@intel.com>
In table intel_contex.ctx.TextureFormatsSupported, enable support for
X8_Z24 unconditionally and enable support for S8 when hardware supports
HiZ. These formats are necessary because HiZ requires separate depth and
stencil buffers.
Signed-off-by: Chad Versace <chad.vers...@intel.com>
---
src/mesa/drivers/dri/intel/intel_context.c | 5 +++++
src/mesa/drivers/dri/intel/intel_fbo.c | 5 ++++-
src/mesa/drivers/dri/intel/intel_tex_format.c | 1 +
3 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_context.c
b/src/mesa/drivers/dri/intel/intel_context.c
index d91a300..4866d41 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -716,7 +716,12 @@ intelInitContext(struct intel_context *intel,
ctx->TextureFormatSupported[MESA_FORMAT_AL88] = GL_TRUE;
if (intel->gen >= 4)
ctx->TextureFormatSupported[MESA_FORMAT_AL1616] = GL_TRUE;
+
+ /* Depth and stencil */
+ ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = GL_TRUE;
ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = GL_TRUE;
+ ctx->TextureFormatSupported[MESA_FORMAT_S8] = intel->has_hiz;
+
/*
* This was disabled in initial FBO enabling to avoid combinations
* of depth+stencil that wouldn't work together. We since decided
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c
b/src/mesa/drivers/dri/intel/intel_fbo.c
index ad2468a..d539942 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -129,7 +129,10 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx,
struct gl_renderbuffer
case GL_STENCIL_INDEX8_EXT:
case GL_STENCIL_INDEX16_EXT:
/* These aren't actual texture formats, so force them here. */
- rb->Format = MESA_FORMAT_S8_Z24;
+ if (intel->has_hiz)
+ rb->Format = MESA_FORMAT_S8;
+ else
+ rb->Format = MESA_FORMAT_S8_Z24;
break;
}
diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c
b/src/mesa/drivers/dri/intel/intel_tex_format.c
index befa615..6890a69 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_format.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_format.c
@@ -22,6 +22,7 @@ intel_mesa_format_to_rb_datatype(gl_format format)
case MESA_FORMAT_RGB565:
case MESA_FORMAT_ARGB1555:
case MESA_FORMAT_ARGB4444:
+ case MESA_FORMAT_S8:
return GL_UNSIGNED_BYTE;
case MESA_FORMAT_R16:
case MESA_FORMAT_RG1616:
--
1.7.5
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