On Wed, 23 Feb 2011 09:50:58 -0700 Grant Likely <grant.lik...@secretlab.ca> wrote:
> On Wed, Feb 23, 2011 at 11:38:17AM +0100, Richard Cochran wrote: > > + > > +* Gianfar PTP clock nodes > > + > > +General Properties: > > + > > + - compatible Should be "fsl,etsec-ptp" > > Should specify an *exact* part; ie: "fsl,mpc8313-etsec-ptp" instead of > trying to define a generic catchall. The reason is that the same > marketing name can end up getting applied to a wide range of parts. > > Instead, choose one specific device to stand in as the 'common' > implementation and get all parts with the same core to claim > compatibility with it. ie: a p2020 might have: > > compatible = "fsl,mpc2020-etsec-ptp", "fsl,mpc8313-etsec-ptp"; eTSEC is versioned, that's more reliable than the chip name since chips have revisions (rev 2.1 of mpc8313 has eTSEC 1.6, not sure about previous revs of mpc8313). Logic blocks can be and have been uprevved between one revision of a chip to the next. I think "fsl,mpc8313rev2.1-etsec-ptp" would be taking things a bit too far (and there could be board-level bugs too...). If you really need to know the exact SoC you're on, look in SVR (which will provide revision info as well). Isn't the device tree for things that can't be probed? The eTSEC revision is probeable as well, but due the way PTP is described as a separate node, the driver doesn't have straightforward access to those registers. Insisting on an explicit chip also encourages people to claim compatibility with that chip without ensuring that it really is fully compatible. -Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
