On Thu, 24 Feb 2011 17:39:44 +0100 Richard Cochran <richardcoch...@gmail.com> wrote:
> On Wed, Feb 23, 2011 at 10:54:59AM -0700, Grant Likely wrote: > > On Wed, Feb 23, 2011 at 11:26:12AM -0600, Scott Wood wrote: > > > > The eTSEC revision is probeable as well, but due the way PTP is described > > > as > > > a separate node, the driver doesn't have straightforward access to those > > > registers. > > > > Ignorant question: Should the ptp be described as a separate node? > > Well, the PTP Hardware Clock function is logically separate from the > MAC function. The eTSEC node doesn't describe the MAC function, it describes the whole device (or at least it should... we make an exception for MDIO, which should probably have been a subnode instead). > PHCs can be implemented in the MAC, in the PHY, or in > between in an FPGA on MII bus. > > If the PHC is in the MAC, then it might be wise to implement one > driver that offers both the MAC and the PHC. > > In the case of gianfar, it is not really necessary to combine the PHC > into the gianfar driver, since the registers are pretty well > separated. How the drivers are structured in Linux is a separate concern from how the devices are described in the device tree. The tree is supposed to be an OS-independent representation of hardware. If Linux has multiple drivers that correspond to portions of one node, a toplevel driver can register platform devices for the components, adding in any additional information like versioning that it gets from the toplevel registers. -Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
