On Fri, 13 Feb 2009 17:47:22 +0300 Anton Vorontsov <avoront...@ru.mvista.com> wrote:
> SDHCI driver must take special care when working with "triggering"
> registers on hosts with strict 32 bit addressing.
>
> In FSL eSDHC hosts all registers are 32 bit width, writing to the
> first half of any register will cause [undefined?] write the second
> half of the register. That is, 16 bit write to the TRANSFER_MODE
> register, makes hardware see a bogus write to the COMMAND register
> (these two registers are adjacent).
>
> This patch adds SDHCI_QUIRK_32BIT_REGISTERS quirk. When specified,
> the sdhci driver will try to "pack" all dangerous writes into single
> 32 bit write transaction.
>
> Signed-off-by: Anton Vorontsov <avoront...@ru.mvista.com>
> ---
What about the other places where we have 16 and 8 bit registers?
--
-- Pierre Ossman
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