On Fri, May 04, 2012 at 05:18:15PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni <paulo.r.zan...@intel.com> > > intel_wait_for_vblank uses PIPESTAT, which does not exist on Ironlake > and newer, so now we use PIPEFRAME. > > There's also a check to see if the pipe is stopped. > > Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com> > --- > drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 613f871..5036efe 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -806,6 +806,22 @@ intel_find_pll_g4x_dp(const intel_limit_t *limit, struct > drm_crtc *crtc, > return true; > } > > +static void ironlake_wait_for_vblank(struct drm_device *dev, int pipe) > +{ > + struct drm_i915_private *dev_priv = dev->dev_private; > + u32 frame, frame_reg = PIPEFRAME(pipe); > + u32 pipeconf = I915_READ(PIPECONF(pipe)); > + > + if (!((pipeconf & PIPECONF_ENABLE) && > + (pipeconf & I965_PIPECONF_ACTIVE))) > + return;
Hm, why do we have this check here? The other wait_for_vblank implementation doesn't bother with this. And if we call wait_for_vblank on a disabled pipe, that's a bug imo. -Daniel > + > + frame = I915_READ(frame_reg); > + > + if (wait_for(I915_READ_NOTRACE(frame_reg) != frame, 50)) > + DRM_DEBUG_KMS("vblank wait timed out\n"); > +} > + > /** > * intel_wait_for_vblank - wait for vblank on a given pipe > * @dev: drm device > @@ -819,6 +835,11 @@ void intel_wait_for_vblank(struct drm_device *dev, int > pipe) > struct drm_i915_private *dev_priv = dev->dev_private; > int pipestat_reg = PIPESTAT(pipe); > > + if (INTEL_INFO(dev)->gen >= 5) { > + ironlake_wait_for_vblank(dev, pipe); > + return; > + } > + > /* Clear existing vblank status. Note this will clear any other > * sticky status fields as well. > * > -- > 1.7.10 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx