On Fri, Jan 16, 2015 at 8:24 AM, Bob Shannon <[email protected]> wrote:
> > So, as an extremely silly example. SMT will not "help" in the following > program: I.e. in a "hard loop" which uses data & instructions > > There are exceptions to every rule. If that’s the type of workload you > run, turn SMT off. > > Bob Shannon > Rocket Software > Basically, I'm trying to conceptualize how z SMT compares to Intel's. It _appears to me_ to be quite different. Depending on the instruction stream, Intel's SMT can actually run two instruction streams simultaneously. From what I am getting from this email thread (which is not a hyper-thread itself but a thread on hyper-threads) is that the z SMT is more like a form of "time division multiplexing" rather than "frequency division multiplexing". Of course, given the superscalar design of the z, even without SMT, for something such as I postulated (everything in i- an d- cache), the performance will be awesome. SMT _seems to me_ to be a way to use the superscaling facility when the code being executed is not really "cache friendly". Or, if I want to be cynical, it is just a way to be "buzz word" compliant since Intel makes such a big deal out of SMT on the Core i-7 and Xeon processors. -- While a transcendent vocabulary is laudable, one must be eternally careful so that the calculated objective of communication does not become ensconced in obscurity. In other words, eschew obfuscation. 111,111,111 x 111,111,111 = 12,345,678,987,654,321 Maranatha! <>< John McKown ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
