Colm O' Flaherty wrote:
Happy days.. That wasn't obvious to me. I'll check out the details later.
In fact many RISC chips have no specific hardware support for a stack (MIPS is another example of such an architecture).
Colm O' Flaherty wrote:
Happy days.. That wasn't obvious to me. I'll check out the details later.
In fact many RISC chips have no specific hardware support for a stack (MIPS is another example of such an architecture).