On Mon, Jun 10, 2013 at 11:41:20AM -0400, David Edelsohn wrote: > Mike, > > This patch is okay, but something seems really broken with respect to > TImode. I don't know if we have to separate TImode from V1TImode or > some distinction for atomics from other uses of TImode. This isn't > like float modes where they mostly live in FPRs and only occassionally > need to live in GPRs. TImode between VSX and GPRs really is bimodal. > Something is wrong with this preferencing design.
Yes, though at present, I'm not sure how to solve it. I worry that when the 128-bit add/subtract support is done, it will make the problem worse. > Maybe we need a separate set of logical TImode instructions for the > atomic ops with a neutral set of preferences on the constraints for > movti. Then the registers chosen for the computation will correctly > drive the register allocation decisions. I can redo the atomics to have all of the logical operations done in PTImode, which restricts it to GPRs. I need to think about it for the logical operation revist. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460, USA email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
