On Wed, Jun 05, 2013 at 05:50:21PM +0200, Segher Boessenkool wrote: > >* config/rs6000/rs6000.md (eqv<mode>3): Add support for powerp eqv > >instruction. > > [Typo, "powerp". There are many more typos and non-grammatical > sentences.] > > >Why isn't this covered by boolean_operator and %q output operand? > > The existing patterns (boolc<mode>3_...) do for eqv: > > (set reg (xor (not reg) reg)) > > which is not canonical RTL.
I wasn't really aware of boolc and friends when I wrote the patches. However, I need named insns to enable vector builtin functions, so except for the splitting part, I wouldn't be able to save much rtl. I also wonder whether it would be useful to have 32-bit do the vector logical ops in gprs as well. At the moment, the patches don't allow it (vector types must be done in the altivec/vsx registers, an TImode is done by splitting the operation into 4 separate categories). On the 64-bit side, having __int128_t passed in GPRs, means you want to avoid ping-ponging between the GPRs and VSX registers. In addition, the atomic quad word support (patch #7) has to run in GPRs, so we need add/subtract/logical to have versions that run in GPRs. I can rewrite the pattern for the vector eqv so that when split it uses the format used by boolc, but since it is not canonical we would never generate it in the rare cases it might be useful to generate it. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460, USA email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
