On Thu, Nov 19, 2020 at 11:25:08AM -0600, Pat Haugen wrote: > > +(define_insn "vmodu_<mode>" > > + [(set (match_operand:VIlong 0 "vsx_register_operand" "=v") > > + (umod:VIlong (match_operand:VIlong 1 "vsx_register_operand" "v") > > + (match_operand:VIlong 2 "vsx_register_operand" "v")))] > > + "TARGET_POWER10" > > + "vmodu<VIlong_char> %0,%1,%2" > > + [(set_attr "type" "vecsimple")]) > > Since the vdiv.../vmod... instructions execute in the fixed point divide unit,
... on some implementations. The only one currently, sure, but... > all the above instructions should have a type of "div" instead of "vecsimple". ... it should use "vecdiv" instead (which already exists). And set "size" to a proper value as well, so that the scheduling models can see the difference with e.g. xsdivqp (which should perhaps not use vecdiv at all itself, it is a scalar div, but we do not currently have good types for that). > > +;; Vector multiply low double word > > +(define_insn "mulv2di3" > > + [(set (match_operand:V2DI 0 "vsx_register_operand" "=v") > > + (mult:V2DI (match_operand:V2DI 1 "vsx_register_operand" "v") > > + (match_operand:V2DI 2 "vsx_register_operand" "v")))] > > + "TARGET_POWER10" > > + "vmulld %0,%1,%2" > > + [(set_attr "type" "vecsimple")]) > > Similarly, the above 3 insns should have a "mul" instruction type. The existing AltiVec vmul* are type "veccomplex", because that was the execution pipe used on original AltiVec... This needs to be adapted as well. Not sure what is best. Segher
